CN111987156A - Epitaxial structure of gallium nitride-based transistor device, preparation method of epitaxial structure and device - Google Patents
Epitaxial structure of gallium nitride-based transistor device, preparation method of epitaxial structure and device Download PDFInfo
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- CN111987156A CN111987156A CN202010902507.1A CN202010902507A CN111987156A CN 111987156 A CN111987156 A CN 111987156A CN 202010902507 A CN202010902507 A CN 202010902507A CN 111987156 A CN111987156 A CN 111987156A
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- 229910002601 GaN Inorganic materials 0.000 title claims abstract description 72
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 51
- 238000002360 preparation method Methods 0.000 title abstract description 7
- 150000004767 nitrides Chemical class 0.000 claims abstract description 86
- 238000005530 etching Methods 0.000 claims abstract description 39
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 238000000034 method Methods 0.000 claims abstract description 20
- 239000004065 semiconductor Substances 0.000 claims abstract description 8
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 claims description 20
- 229910052782 aluminium Inorganic materials 0.000 claims description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 7
- 150000001875 compounds Chemical class 0.000 claims description 5
- 230000000873 masking effect Effects 0.000 claims description 4
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical group Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims description 2
- 230000005533 two-dimensional electron gas Effects 0.000 abstract description 26
- 239000012535 impurity Substances 0.000 abstract description 8
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- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 abstract description 3
- 229910052749 magnesium Inorganic materials 0.000 abstract description 3
- 230000004888 barrier function Effects 0.000 description 27
- 239000000463 material Substances 0.000 description 10
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- 238000010586 diagram Methods 0.000 description 4
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- 238000005229 chemical vapour deposition Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000000407 epitaxy Methods 0.000 description 2
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- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
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- DSAJWYNOEDNPEQ-UHFFFAOYSA-N barium atom Chemical compound [Ba] DSAJWYNOEDNPEQ-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052790 beryllium Inorganic materials 0.000 description 1
- ATBAMAFKBVZNFJ-UHFFFAOYSA-N beryllium atom Chemical compound [Be] ATBAMAFKBVZNFJ-UHFFFAOYSA-N 0.000 description 1
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- 230000006872 improvement Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000009616 inductively coupled plasma Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
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- 229910052760 oxygen Inorganic materials 0.000 description 1
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- 229910052594 sapphire Inorganic materials 0.000 description 1
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- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 230000002269 spontaneous effect Effects 0.000 description 1
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 description 1
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- 229910052725 zinc Inorganic materials 0.000 description 1
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- H01L29/76—Unipolar devices, e.g. field effect transistors
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- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
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Abstract
The invention provides a gallium nitride-based transistor device epitaxial structure, a preparation method thereof and a device, and belongs to the technical field of semiconductor devices. A gallium nitride-based transistor device epitaxial structure, comprising: the semiconductor device comprises a substrate, and a buffer layer, a first layer of heterojunction, an etching termination layer and a second layer of heterojunction which are sequentially formed on the substrate, wherein a groove is formed in the second layer of heterojunction, a P-type nitride layer is formed on one side, deviating from the etching termination layer, of the second layer of heterojunction, and the groove is filled with the P-type nitride layer. On one hand, the two-dimensional electronic air channels of the two heterojunction structures can generate strong coupling through the formed first layer of heterojunction structure and the second layer of heterojunction structure, so that the on-resistance of the power device is reduced; on the other hand, the thickness of the epitaxial layer at the non-groove position is increased, the influence of the surface state on the two-dimensional electron gas of the channel is reduced, and meanwhile acceptor impurities such as magnesium are prevented from diffusing to the two-dimensional electron gas channel in the process of filling the groove by the P-type nitride layer, so that the dynamic stability of the device is improved.
Description
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to a gallium nitride-based transistor device epitaxial structure, a preparation method thereof and a device.
Background
A HEMT (High-Electron-Mobility Transistors) device is a power device which is made by making full use of two-dimensional Electron gas formed by a heterojunction structure of a semiconductor and has a larger breakdown voltage and power density. Due to piezoelectric polarization and spontaneous polarization effects of group III nitride semiconductor materials, group III nitride materials, such as AlGaN/GaN, etc., are typically employed for the heterojunction structure.
Generally, in HEMT devices, for the purpose of safety and simplification of a gate driving circuit, a channel is disconnected and a threshold voltage is positive under zero bias, i.e., an enhancement mode device is designed. The main method for realizing enhancement of the HEMT device at present is a P-type cap layer technology, namely, a P-type cap layer (commonly used P-type nitride) is arranged between a grid and a barrier layer. In addition, in order to ensure that the P-type nitride can completely deplete the two-dimensional electron gas in the gate region, thereby obtaining a positive threshold voltage, the thickness of the barrier layer is generally thin. The thin barrier layer enables the two-dimensional electron gas channel to be closer to the surface, on one hand, the two-dimensional electron gas in the channel is more obviously influenced by the surface state, and on the other hand, in the growth process of the P-type nitride, acceptor impurities such as Mg atoms are easier to diffuse into the two-dimensional electron gas channel, and the dynamic stability of the device is finally influenced. In addition, because the two-dimensional electron gas concentration in the heterojunction is closely related to the thickness of the barrier layer, the thinner barrier layer can cause the two-dimensional electron gas concentration in the current enhancement type device to be lower, so that the resistance of the non-gate region is larger, and further the on-resistance of the enhancement type device is larger.
Disclosure of Invention
The invention aims to provide a gallium nitride-based transistor device epitaxial structure and a preparation method thereof, which can generate strong coupling between two-dimensional electronic air channels of two heterojunctions through a first layer of heterojunction and a second layer of heterojunction, thereby reducing the on-resistance of a power device and improving the dynamic stability of the device.
The embodiment of the invention is realized by the following steps:
in one aspect of the embodiments of the present invention, an epitaxial structure of a gallium nitride-based transistor device is provided, including: the semiconductor device comprises a substrate, and a buffer layer, a first layer of heterojunction, an etching termination layer and a second layer of heterojunction which are sequentially formed on the substrate, wherein a groove is formed in the second layer of heterojunction, a P-type nitride layer is formed on one side, deviating from the etching termination layer, of the second layer of heterojunction, and the groove is filled with the P-type nitride layer.
Optionally, a mask dielectric layer is formed on one side of the P-type nitride layer close to the second layer of heterojunction, the mask dielectric layer corresponds to a non-groove region of the second layer of heterojunction, and the P-type nitride layer partially covers the mask dielectric layer.
Optionally, a nitride cap layer corresponding to a non-groove region of the second layer heterojunction is formed on one side of the second layer heterojunction, which is close to the P-type nitride layer.
Optionally, the nitride cap layer is a gallium nitride cap layer.
Optionally, the first layer of heterojunction comprises a gallium nitride layer and an aluminum gallium nitride layer sequentially formed on the buffer layer; the etching stop layer is an aluminum gallium nitride compound, and the aluminum component proportion of the etching stop layer is higher than that of the aluminum gallium nitride layer.
Optionally, the etch stop layer is an aluminum nitride layer.
Optionally, the second layer heterojunction comprises a gallium nitride layer and an aluminum gallium nitride layer sequentially formed on the etch stop layer.
In another aspect of the embodiments of the present invention, a method for preparing an epitaxial structure of a gallium nitride-based transistor device is provided, including:
sequentially forming a buffer layer, a first heterojunction layer, an etching stop layer and a second heterojunction layer on a substrate;
forming a groove on the second layer heterojunction;
and forming a P-type nitride layer on one side of the second layer heterojunction, which is far away from the etching stop layer, and filling the groove with the P-type nitride layer.
Optionally, before forming the recess on the second layer heterojunction, the method further comprises:
forming a mask dielectric layer on the second heterojunction layer;
forming a recess on the second layer heterojunction, comprising:
etching the mask dielectric layer and the second layer heterojunction to form a groove;
forming a P-type nitride layer on a side of the second layer heterojunction facing away from the etch stop layer, including:
and forming a P-type nitride layer on the selective area of the mask dielectric layer, wherein the P-type nitride layer partially covers the mask dielectric layer.
In yet another aspect of an embodiment of the present invention, there is provided a gallium nitride-based transistor device including the epitaxial structure of the gallium nitride-based transistor device of any one of the above.
The embodiment of the invention has the beneficial effects that:
the epitaxial structure of the gallium nitride-based transistor device comprises a substrate, and a buffer layer, a first layer of heterojunction, an etching stop layer and a second layer of heterojunction which are sequentially formed on the substrate. The second layer of heterojunction is divided into a groove area and a non-groove area, and a groove is formed in the groove area. And a P-type nitride layer is also formed on one side of the second layer heterojunction, which is far away from the etching stop layer, and the groove formed by the second layer heterojunction is filled with the P-type nitride layer. The two-dimensional electron gas in the first layer of heterojunction and the second layer of heterojunction gate region can be exhausted by combining the P-type nitride layer with the groove etching, so that the enhancement type HEMT device is realized. And through the formed first layer of heterojunction and the second layer of heterojunction, strong coupling can be generated between two-dimensional electron gases in the two-layer heterojunction structure, so that the on-resistance of the epitaxial structure of the gallium nitride-based transistor device is reduced, and the on-resistance of a power device adopting the epitaxial structure is further reduced. And through forming the recess on the second layer heterojunction to make the P type nitride layer fill this recess, can make the P type nitride layer play good exhaust effect to two heterojunction structures respectively, thereby make the threshold voltage of first layer heterojunction and second layer heterojunction can have good uniformity.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
Fig. 1 is a schematic structural diagram of an epitaxial structure of a gan-based transistor device according to an embodiment of the present invention;
fig. 2 is a second schematic structural diagram of an epitaxial structure of a gan-based transistor device according to an embodiment of the present invention;
fig. 3 is a third schematic structural diagram of an epitaxial structure of a gan-based transistor device according to an embodiment of the present invention;
fig. 4 is a fourth schematic structural diagram of an epitaxial structure of a gan-based transistor device according to an embodiment of the present invention;
fig. 5 is a schematic flow chart of a method for fabricating an epitaxial structure of a gan-based transistor device according to an embodiment of the present invention;
fig. 6 is a second flowchart of a method for fabricating an epitaxial structure of a gan-based transistor device according to an embodiment of the present invention.
Icon: 110-a substrate; 120-a buffer layer; 130-first layer heterojunction; 131-a first channel layer; 132 — a first barrier layer; 140-etch stop layer; 150-a second layer heterojunction; 151-a second channel layer; 152-a second barrier layer; a 160-P type nitride layer; 170-a mask dielectric layer; a 180-nitride cap layer.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. The components of embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
In the description of the present invention, it should be noted that the terms "first", "second", "third", and the like are used only for distinguishing the description, and are not intended to indicate or imply relative importance.
Generally, in a group III nitride based HEMT (High-Electron-Mobility Transistors) device, for the purpose of safety and simplification of a gate driving circuit, it is necessary to make a channel off at zero bias, a threshold voltage positive, that is, set as an enhancement mode device. Therefore, a P-type cap layer (usually P-type nitride) is generally provided between the gate and barrier layers provided on the barrier layer. And in order to ensure that the P-type nitride can completely exhaust the two-dimensional electron gas in the gate region, thereby obtaining a positive threshold voltage, the thickness of the barrier layer is generally thin. However, since the two-dimensional electron gas concentration in the heterojunction is closely related to the thickness of the barrier layer, the two-dimensional electron gas concentration in the conventional enhancement device is low, the resistance of the non-gate region is high, and the on-resistance of the enhancement device is high.
Therefore, embodiments of the present invention provide an epitaxial structure of a gan-based transistor device, which can generate strong coupling between two-dimensional electronic air channels of two heterojunctions through a first layer of heterojunction and a second layer of heterojunction, so as to reduce the on-resistance of the power device.
As shown in fig. 1, the epitaxial structure of the gallium nitride-based transistor device may include: the semiconductor device comprises a substrate 110, and a buffer layer 120, a first heterojunction layer 130, an etching stop layer 140 and a second heterojunction layer 150 which are sequentially formed on the substrate 110, wherein a groove is formed in the second heterojunction layer 150, a P-type nitride layer 160 is formed on one side of the second heterojunction layer 150, which is far away from the etching stop layer 140, and the groove is filled with the P-type nitride layer 160.
Generally, the first layer heterojunction 130 is composed of a first channel layer 131 adjacent to the buffer layer 120 and a first barrier layer 132 formed on the first channel layer 131, and the second layer heterojunction 150 is composed of a second channel layer 151 adjacent to the etch stop layer 140 and a second barrier layer 152. A two-dimensional electron gas channel can be formed between the channel layer and the barrier layer. In addition, the channel layer and the barrier layer in the first layer heterojunction 130 and the second layer heterojunction 150 may be a gallium nitride channel layer and an aluminum gallium nitride barrier layer, respectively, and certainly, in the embodiment of the present invention, the channel layer and the barrier layer may also be respectively configured as a gallium nitride channel layer, an indium gallium nitride barrier layer, and the like, where specific channel layer materials and barrier layer materials of the first layer heterojunction 130 and the second layer heterojunction 150 are not limited, as long as the channel layer and the barrier layer can form a heterojunction structure to generate a two-dimensional electron gas channel. Also, in practical applications, the materials of the first layer heterojunction 130 and the second layer heterojunction 150 may be the same, but of course, in the embodiment of the present invention, different materials may be provided.
Illustratively, the first-layer heterojunction 130 includes a gallium nitride layer and an aluminum gallium nitride layer sequentially formed on the buffer layer 120, and the second-layer heterojunction 150 includes a gallium nitride layer and an aluminum gallium nitride layer sequentially formed on the etch stop layer 140.
The thickness of the gallium nitride layer in the first layer heterojunction 130 can be 50-500nm, such as 50nm, 70nm, 100nm, 220nm, 300nm, 400nm, 500nm, etc. And the aluminum gallium nitride (Al) layer in the first layer heterojunction 130xGa(1-x)The aluminum component x in N) may be 0.5 to 1, e.g., 0.5, 0.7, 1, etc. The thickness may be 0.5 to 10nm, for example, 0.5nm, 2nm, 5nm, 5.5nm, 7nm, 8.5nm, 10nm, or the like. Preferably, the thickness of the AlGaN layer in the first layer heterojunction 130 is less than 5 nm.
The thickness of the gallium nitride layer in the second layer heterojunction 150 may be 5-10nm, e.g., 5nm, 7nm, 10nm, etc. And an aluminum gallium nitride (Al) layer in the second layer heterojunction 150xGa(1-x)The aluminum component x in N) may be 0 to 0.5, e.g., 0.1, 0.2, 0.5, etc. The thickness may be 5 to 50nm, for example, 5nm, 20nm, 25nm, 35nm, 50nm, or the like. Preferably, the thickness of the AlGaN layer in the second layer heterojunction 150 is less than 25 nm.
The substrate 110 may be a heterogeneous substrate 110, such as sapphire, silicon carbide, or silicon. Therefore, by first forming the buffer layer 120 between the substrate 110 and the channel layer of the first-layer heterojunction 130, lattice mismatch and thermal mismatch between the channel layer and the substrate 110 may be mitigated, thereby enabling better epitaxial growth of the channel layer on the substrate 110. Of course, the embodiment of the present invention does not limit the specific implementation form or the arrangement form of the buffer layer 120 in the epitaxial structure of the gan-based transistor device, and those skilled in the art may perform the arrangement according to actual requirements, for example, the thickness of the channel layer of the first layer heterojunction 130 may be increased to enable the portion of the channel layer close to the substrate 110 to function as the buffer layer 120, and the portion of the channel layer far from the substrate 110 may have better crystallization quality to form a good heterojunction structure with the barrier layer of the first layer heterojunction 130.
In the epitaxial structure of the gan-based transistor device, the P-type nitride layer 160 can be P-type gan, P-type algan, P-type ingan, or the like, but not hereThe enhancement type HEMT device is limited to a P-type doped material which can be used as a P-type cap layer in the enhancement type HEMT device. The doped P-type impurity may be magnesium, and certainly, in practical applications, the P-type impurity may also be zinc, beryllium, calcium, barium, and the like, which is not limited herein. And, the doping concentration of the P-type impurity may be 1017cm-3To 1020cm-3E.g. 1017cm-3、1018cm-3、1020cm-3And the like.
Generally, the groove formed by the second layer heterojunction 150 in the epitaxial structure of the gan-based transistor device is a groove body penetrating through the second layer heterojunction 150, so that the P-type nitride layer 160 can be in contact with the etch stop layer 140, and the P-type nitride layer 160 can generate a better gate depletion effect on the first layer heterojunction 130.
In addition, by the epitaxial structure of the gallium nitride-based transistor device, the thickness of the epitaxial layer at the non-groove position can be increased, the influence of a surface state on the two-dimensional electron gas of the channel is reduced, acceptor impurities such as magnesium are prevented from diffusing to the two-dimensional electron gas channel in the process of filling the groove by the P-type nitride layer 160, and the dynamic stability of the device is improved.
The epitaxial structure of the gallium nitride-based transistor device provided by the embodiment of the invention comprises a substrate 110, and a buffer layer 120, a first heterojunction layer 130, an etching stop layer 140 and a second heterojunction layer 150 which are sequentially formed on the substrate 110. The second layer of heterojunction 150 is divided into a groove region and a non-groove region, and the groove region is formed therein. A P-type nitride layer 160 is also formed on the second layer of heterojunction 150 on the side facing away from the etch stop layer 140, and the recess formed by the second layer of heterojunction 150 is filled with the P-type nitride layer 160. The two-dimensional electron gas in the gate region of the first layer heterojunction 130 and the second layer heterojunction 150 can be depleted by the P-type nitride layer 160, thereby realizing an enhancement type HEMT device. In addition, through the formed first-layer heterojunction 130 and the second-layer heterojunction 150, strong coupling can be generated between two-dimensional electron gases in the two-layer heterojunction structure, so that the on-resistance of the epitaxial structure of the gallium nitride-based transistor device is reduced, and the on-resistance of a power device adopting the epitaxial structure is further reduced. In addition, by forming a groove on the second heterojunction layer 150 and filling the groove with the P-type nitride layer 160, the P-type nitride layer 160 can have a good depletion effect on the two heterojunction structures, respectively, so that the threshold voltages of the first heterojunction layer 130 and the second heterojunction layer 150 can have good consistency.
Optionally, as shown in fig. 2, a mask dielectric layer 170 is formed on a side of the P-type nitride layer 160 close to the second layer heterojunction 150, the mask dielectric layer 170 corresponds to a non-recessed region of the second layer heterojunction 150, and the P-type nitride layer 160 partially covers the mask dielectric layer 170.
By forming the mask dielectric layer 170 on the side of the P-type nitride layer 160 close to the second heterojunction 150, that is, before the P-type nitride layer 160 is formed, the mask dielectric layer 170 is formed, and the epitaxial region of the P-type nitride layer 160 can be defined and selected by using the mask dielectric layer 170, so that the P-type nitride layer 160 is subjected to selective epitaxy on the side of the second heterojunction 150 away from the etching stop layer 140, and partial coverage of the second heterojunction 150 by the P-type nitride layer 160 is realized, that is, partial coverage on the mask dielectric layer 170 is realized. The mask dielectric layer 170 may be made of silicon nitride, silicon dioxide, or other materials, which are not limited herein as long as the mask dielectric layer can be used for the selective epitaxy of the P-type nitride layer 160.
Alternatively, as shown in fig. 3, a side of the second-layer heterojunction 150 close to the P-type nitride layer 160 is formed with a nitride cap layer 180 corresponding to a non-recessed region of the second-layer heterojunction 150.
As shown in fig. 4, when the epitaxial structure of the gan-based transistor device further includes a mask dielectric layer 170, the second layer of the heterojunction 150, the nitride cap layer 180, and the mask dielectric layer 170 are sequentially layered.
By forming the nitride cap layer 180 on the second-layer heterojunction 150, it is possible to play a role of preventing stress release between the channel layer and the barrier layer of the second-layer heterojunction 150, thereby stabilizing the surface of the barrier layer.
The nitride cap layer 180 may be typically a group III nitride material.
Illustratively, the nitride cap layer 180 is a gallium nitride cap layer. Of course, in other embodiments of the present invention, the nitride cap layer 180 may also adopt an aluminum gallium nitride layer, etc.
Alternatively, when the first layer heterojunction 130 includes a gallium nitride layer (channel layer) and an aluminum gallium nitride layer (barrier layer), the etch stop layer 140 may be an aluminum gallium nitride compound, and the aluminum composition ratio of the etch stop layer 140 is higher than that of the aluminum gallium nitride layer (barrier layer).
Illustratively, the aluminum gallium nitride compound (Al)xGa(1-x)The aluminum component x in N) may be 0.5 to 1, e.g., 0.5, 0.7, 1, etc. Also, the etch stop layer 140 may have a thickness of 0.5-3nm, such as 0.5nm, 1nm, 1.5nm, 2nm, 2.5nm, 3nm, and the like.
By setting the etching stop layer 140 to be an aluminum gallium nitride compound with an aluminum component ratio higher than that of the aluminum gallium nitride layer of the first layer heterojunction 130, when a groove is formed on the second layer heterojunction 150 by means of etching, the etching can be automatically stopped to the etching stop layer 140, so that the phenomenon that the first layer heterojunction 130 is damaged due to over-etching and the two-dimensional electron gas characteristic of the first layer heterojunction 130 is affected is avoided.
Of course, in practical applications, the etch stop layer 140 may also be provided as an aluminum nitride layer, so that when the second layer heterojunction 150 is etched to form the recess, the etching can be self-stopped at the etch stop layer 140. The specific material of the etch stop layer 140 is not limited herein, as long as it can protect the first layer heterojunction 130 from being etched, so as to prevent the first layer heterojunction 130 from being etched.
In another aspect of the embodiments of the present invention, a method for manufacturing an epitaxial structure of a gallium nitride-based transistor device is provided, in which specific implementation and arrangement of the hierarchical structures, such as the buffer layer 120, the first layer of heterojunction 130, the etch stop layer 140, the second layer of heterojunction 150, and the P-type nitride layer 160, involved in the method are the same as or similar to the aforementioned epitaxial structure of the gallium nitride-based transistor device, and therefore, details are not repeated here. Hereinafter, the method will be explained.
As shown in fig. 5, the method for preparing the epitaxial structure of the gallium nitride-based transistor device may include:
s201: a buffer layer 120, a first layer heterojunction 130, an etch stop layer 140, and a second layer heterojunction 150 are sequentially formed on the substrate 110.
S202: a recess is formed on the second layer heterojunction 150.
S203: a P-type nitride layer 160 is formed at a side of the second layer heterojunction 150 facing away from the etch stop layer 140, and the P-type nitride layer 160 fills the recess.
The formation of the buffer layer 120, the first heterojunction layer 130, the etch stop layer 140 and the second heterojunction layer 150 on the substrate 110, and the formation of the P-type nitride layer 160 can be achieved by using epitaxial growth processes such as Metal Oxide Chemical Vapor Deposition (MOCVD), Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE), and Chemical Vapor Deposition (CVD).
In addition, when the P-type nitride layer 160 is epitaxially grown, the P-type nitride layer 160 may be directly epitaxially grown by directly introducing a P-type impurity source into an epitaxial gas source, or the P-type nitride layer may be epitaxially grown first and then doped with P-type impurities by ion implantation, diffusion, or the like to form the P-type nitride layer 160.
Forming the recess on the second layer heterojunction 150 can be achieved by performing dry etching and/or wet etching process on the second layer heterojunction. For example, the second layer heterojunction 150 is selectively etched by an Inductively Coupled Plasma (ICP) etching method using a Plasma etcher, and the Plasma may be configured as reactive Plasma (RIE), downstream Plasma (downstream), direct Plasma (direct Plasma), or the like.
In general, when the groove is formed on the second layer heterojunction 150 by etching, the etching can be self-terminated at the etching termination layer 140 by adjusting the proportion of the etching atmosphere (for example, by introducing oxygen into boron trichloride/chlorine gas as the etching atmosphere to adjust the proportion).
According to the preparation method of the epitaxial structure of the gallium nitride-based transistor device provided by the embodiment of the invention, firstly, the buffer layer 120, the first layer of heterojunction 130, the etching stop layer 140 and the second layer of heterojunction 150 are sequentially formed on the substrate 110. The two-dimensional electron gas of the first layer of heterojunction 130 and the second layer of heterojunction 150 can form strong coupling, so that the concentration of the two-dimensional electron gas of the epitaxial structure of the gallium nitride-based transistor device is improved, and the on-resistance of the power device is reduced. Then, a groove is formed on the second layer heterojunction 150; and a P-type nitride layer 160 is formed on one side of the second layer heterojunction 150, which is far away from the etching stop layer 140, and the P-type nitride layer 160 fills the groove, so that the P-type nitride layer 160 can be used as a P-type cap layer to achieve good two-dimensional electron gas depletion effects of the gate regions on the two heterojunction structures, respectively, thereby realizing an enhanced power device with lower on-resistance and enabling the threshold voltage of the power device to have better consistency.
In practical application, the two-dimensional electron gas concentration in the first layer heterojunction 130 can be adjusted by controlling the thicknesses of the first layer heterojunction 130 and the second layer heterojunction 150 and the size of the groove formed by the second layer heterojunction 150 in the preparation process, so that the threshold voltage of the epitaxial structure of the prepared gallium nitride-based transistor device is improved.
Optionally, as shown in fig. 6, before forming the recess on the second layer heterojunction 150, the method further comprises:
s301: a masking dielectric layer 170 is formed on the second layer heterojunction 150.
Accordingly, as shown in fig. 6, forming a groove on the second layer heterojunction 150 includes:
s302: the mask dielectric layer 170 and the second layer heterojunction 150 are etched to form a recess.
Accordingly, as shown in fig. 6, forming a P-type nitride layer 160 on a side of the second layer heterojunction 150 facing away from the etch stop layer 140 includes:
s303: a P-type nitride layer 160 is selectively formed on the mask dielectric layer 170, and the P-type nitride layer 160 partially covers the mask dielectric layer 170.
It should be noted that in practical applications, a nitride cap layer 180 may be further disposed in the second-layer heterojunction 150 and the mask dielectric layer 170 to prevent stress release between the channel layer and the barrier layer of the second-layer heterojunction 150, thereby stabilizing the surface of the barrier layer. Accordingly, forming a recess on the second layer heterojunction 150 can be achieved by a process of etching the mask dielectric layer 170, the nitride cap layer 180, and the second layer heterojunction 150.
The masking dielectric layer 170, the nitride cap layer 180, and the like may also adopt the same epitaxial growth process as other layered structures, which is not limited herein.
In an embodiment of the present invention, a device (gallium nitride-based transistor device) using the above epitaxial structure of the gallium nitride-based transistor device is also provided.
Those skilled in the art will appreciate that the device typically further comprises a gate disposed above the second heterojunction (e.g., a gate of a gallium nitride-based transistor device formed by an ohmic or schottky contact on the P-type nitride layer 160 of the epitaxial structure), and a source and a drain respectively connected (ohmic contact) to a channel (two-dimensional electron-gas channel) in the second heterojunction 150, which will not be described in detail herein.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A gallium nitride-based transistor device epitaxial structure, comprising: the semiconductor device comprises a substrate, and a buffer layer, a first layer of heterojunction, an etching termination layer and a second layer of heterojunction which are sequentially formed on the substrate, wherein a groove is formed in the second layer of heterojunction, a P-type nitride layer is formed on one side, deviating from the etching termination layer, of the second layer of heterojunction, and the groove is filled with the P-type nitride layer.
2. The gallium nitride-based transistor device epitaxial structure of claim 1, wherein a side of the P-type nitride layer proximate to the second layer heterojunction is formed with a masking dielectric layer corresponding to a non-recessed region of the second layer heterojunction, the P-type nitride layer partially covering the masking dielectric layer.
3. The gallium nitride-based transistor device epitaxial structure of claim 1 or 2, wherein a side of the second layer heterojunction near the P-type nitride layer is formed with a nitride cap layer corresponding to a non-recessed region of the second layer heterojunction.
4. The gallium nitride-based transistor device epitaxial structure of claim 3, wherein the nitride cap layer is a gallium nitride cap layer.
5. The gallium nitride-based transistor device epitaxial structure of claim 1, wherein the first layer of heterojunctions comprises a gallium nitride layer and an aluminum gallium nitride layer sequentially formed on the buffer layer; the etching stop layer is an aluminum gallium nitride compound, and the aluminum component proportion of the etching stop layer is higher than that of the aluminum gallium nitride layer.
6. The gallium nitride-based transistor device epitaxial structure of claim 1, wherein the etch stop layer is an aluminum nitride layer.
7. The gallium nitride-based transistor device epitaxial structure of claim 1, wherein the second layer heterojunction comprises a gallium nitride layer and an aluminum gallium nitride layer sequentially formed on the etch stop layer.
8. A method for preparing an epitaxial structure of a gallium nitride-based transistor device is characterized by comprising the following steps:
sequentially forming a buffer layer, a first heterojunction layer, an etching stop layer and a second heterojunction layer on a substrate;
forming a groove on the second layer heterojunction;
and forming a P-type nitride layer on one side of the second layer heterojunction departing from the etching stop layer, wherein the P-type nitride layer fills the groove.
9. The method of fabricating an epitaxial structure for a gallium nitride-based transistor device according to claim 8, wherein before forming the recess on the second layer heterojunction, the method further comprises:
forming a mask dielectric layer on the second heterojunction layer;
the forming a recess on the second layer heterojunction comprises:
etching the mask dielectric layer and the second layer heterojunction to form the groove;
the forming of the P-type nitride layer on the side of the second layer heterojunction departing from the etching stop layer comprises:
and forming the P-type nitride layer on the mask dielectric layer in a selected area, wherein the P-type nitride layer partially covers the mask dielectric layer.
10. A gallium nitride-based transistor device comprising the gallium nitride-based transistor device epitaxial structure of any one of claims 1 to 7.
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