CN111983952A - Design method and circuit of motor control MCU chip with dual-core structure - Google Patents

Design method and circuit of motor control MCU chip with dual-core structure Download PDF

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Publication number
CN111983952A
CN111983952A CN202010799394.7A CN202010799394A CN111983952A CN 111983952 A CN111983952 A CN 111983952A CN 202010799394 A CN202010799394 A CN 202010799394A CN 111983952 A CN111983952 A CN 111983952A
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mcu chip
motor control
motor
circuit
dual
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孙缵
陈毅成
张明宇
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Wuhan Ruinajie Electronic Technology Co ltd
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Wuhan Ruinajie Electronic Technology Co ltd
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0423Input/output
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/25Pc structure of the system
    • G05B2219/25257Microcontroller

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Electric Motors In General (AREA)
  • Control Of Ac Motors In General (AREA)
  • Control Of Motors That Do Not Use Commutators (AREA)

Abstract

The invention relates to the field of motor control, in particular to a design method and a circuit of a motor control MCU chip with a dual-core structure; the invention integrates a CPU inner core for parameter configuration and conventional affair processing and a motor control engine inner core for processing motor operation control affairs on an MCU chip, and the dual cores work cooperatively to realize various high-performance motor controls; the complex motor control algorithm is subjected to hardware by the motor control engine kernel, so that the operation speed and the real-time performance of motor control are improved; the motor control engine is used as a hardware coprocessor to automatically complete the operation control of the motor, and motor application developers can realize the control of various high-performance motors by only configuring control parameters without compiling special motor control algorithm programs.

Description

Design method and circuit of motor control MCU chip with dual-core structure
Technical Field
The invention relates to the field of motor control, in particular to a design method and a circuit of a motor control MCU chip with a dual-core structure.
Background
The conventional motor control is based on MCU or DSP, wherein the motor control algorithm is realized by adopting a pure software mode; however, due to the complexity of the motor control algorithm, the programming and debugging of the motor control algorithm often become the main task of motor control application development, which not only puts higher technical requirements on developers, but also takes more development time.
At present, a pure software-mode motor control method not only means higher subsequent software maintenance cost, but also the reliability of codes of the motor control method often depends on the personal experience and the specialty of programmers and testers and is not easy to control; in addition, the conventional motor control needs an external pre-driving circuit, a current sampling circuit, a power amplifying circuit and the like, so that the whole scheme has more peripheral elements, higher cost and higher development difficulty.
Disclosure of Invention
The invention mainly solves the technical problem of providing a design method of a motor control MCU chip with a dual-core structure, which integrates a CPU core and a motor control engine core, wherein the CPU core processes conventional affairs, the motor control engine core processes motor operation control affairs, and dual cores work cooperatively to realize various high-performance motor controls; also provides a design circuit of the motor control MCU chip with a dual-core structure,
in order to solve the technical problems, the invention adopts a technical scheme that: the design method of the motor control MCU chip with the dual-core structure is provided, wherein a CPU core for parameter configuration and conventional transaction processing and a motor control engine core for processing motor operation control transactions are integrated on the MCU chip.
As an improvement of the invention, the CPU core adopts an 8051 processor core.
As a further improvement of the invention, a functional peripheral module connected with an 8051 processor and a motor control engine through a system bus is arranged in the MCU chip.
As a further improvement of the present invention, the functional peripheral module includes:
a memory for read-write storage;
the watchdog is used for ensuring the MCU chip to operate;
the digital communication interface module is used for communicating with external digital equipment;
and the general input and output module is used for inputting and outputting signals.
As a further improvement of the present invention, the functional peripheral module further includes:
the timer is used for timing and timing the running of the MCU chip;
and the analog-to-digital conversion module is used for receiving an external analog detection signal and outputting the signal to the CPU core or the motor control engine.
As a further improvement of the present invention, the functional peripheral module further includes:
the pre-driving circuit is used for receiving the three comparison values output by the motor control engine and outputting three groups of PWM control signals so as to drive the UVW three phases of the motor;
the reset circuit is used for providing a reset signal for the MCU chip;
the clock circuit is used for providing a counting clock and a working clock for the MCU chip;
and the debugging circuit is used for debugging the MCU chip.
A design circuit of a motor control MCU chip with a dual-core structure comprises the MCU chip integrating a CPU for parameter configuration and conventional transaction processing and a motor control engine for processing motor operation control transactions.
As an improvement of the present invention, the CPU employs an 8051 processor.
As a further improvement of the invention, a functional peripheral module connected with the 8051 processor and the motor control engine through a system bus is arranged in the MCU chip.
As a further improvement of the present invention, the functional peripheral module includes:
a memory for read-write storage;
the watchdog is used for ensuring the MCU chip to operate;
the digital communication interface module is used for communicating with external digital equipment;
the general input and output module is used for inputting and outputting signals;
the timer is used for timing and timing the running of the MCU chip;
the analog-to-digital conversion module is used for receiving an external analog detection signal and outputting the signal to the CPU core or the motor control engine;
the pre-driving circuit is used for receiving the three comparison values output by the motor control engine and outputting three groups of PWM control signals so as to drive the UVW three phases of the motor;
the reset circuit is used for providing a reset signal for the MCU chip;
the clock circuit is used for providing a counting clock and a working clock for the MCU chip;
and the debugging circuit is used for debugging the MCU chip.
The invention has the beneficial effects that: compared with the prior art, the invention integrates the CPU inner core and the motor control engine inner core, the CPU inner core processes the conventional affairs, the motor control engine inner core processes the motor operation control affairs, the dual cores work together to realize various high-performance motor controls, and the complex motor control algorithm is hardwared by the motor control engine inner core, thereby improving the operation speed and the real-time performance of the motor control, the motor control engine is used as a hardware coprocessor to automatically complete the operation control of the motor, and the motor application developer can realize various high-performance motor controls only by configuring control parameters without compiling a special motor control algorithm program.
Drawings
FIG. 1 is a block diagram of the MCU chip of the present invention;
FIG. 2 is a block diagram of a pre-driver circuit according to the present invention;
FIG. 3 is a schematic block diagram of an FOC module of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Referring to fig. 1 to 3, a design method of a dual core structure MCU chip for motor control according to the present invention includes: a CPU core for parameter configuration and conventional transaction processing and a motor control engine core for processing motor operation control transactions are integrated on the MCU chip; the CPU core adopts an 8051 processor core.
In the invention, an MCU chip integrates an 8051 processor core and a motor control engine core, and a plurality of necessary functional peripheral modules are arranged in the MCU chip; the 8051 kernel processes conventional affairs, the motor control engine kernel processes motor operation control affairs, and the dual cores work cooperatively to realize various high-performance motor controls and provide various driving modes such as square waves, SPWM/SVPWM, FOC and the like; the motor application developer can realize various high-performance motor controls by only configuring control parameters without compiling a special motor control algorithm program.
In the invention, a functional peripheral module connected with an 8051 processor and a motor control engine through a system bus is arranged in an MCU chip.
In the invention, the 8051 processor is a high-performance 8-bit RISC processor, the main frequency of which is designed to be 32MHz, supports an 18-way interrupt source, and is connected with each functional peripheral module in the MCU chip through an AHB system bus.
In the present invention, the functional peripheral module includes:
the memory is used for reading and writing storage and comprises a 64KB Flash and an 8KB SRAM, and a flexibly designed reading and writing protection mode which are connected with the 8051 processor through an AHB system bus;
the watchdog is used for ensuring the running of the MCU chip, is a watchdog timer and is connected with the 8051 processor through an AHB system bus so as to improve the running reliability of the system;
the digital communication interface module is used for communicating with external digital equipment, and comprises a 1-path I2C interface, a 1-path SPI interface and a 1-path UART interface which are connected with an 8051 processor through an AHB system bus;
the general input and output module is used for inputting and outputting signals, comprises 4 groups (18 in total) of GPIOs (general purpose input and output) which can be hidden to an interrupt vector and are connected with an 8051 processor through an AHB (advanced high performance bus) system bus;
the timer is used for timing and timing the running of the MCU chip and comprises 1 BLDC special timer, 1 advanced timer, 4 general timers with capture input/comparison output functions and 1 RTC timer which are connected with the 8051 processor through an AHB system bus;
the analog-to-digital conversion module is used for receiving an external analog detection signal and outputting the signal to the CPU core or the motor control engine, is an 8-channel 12-bit analog-to-digital converter, has a sampling conversion rate as high as 1MSPS, receives the external analog detection signal, outputs the signal which can be directly connected with the motor control engine, and is also connected with an 8051 processor through an AHB system bus;
the pre-driving circuit is used for receiving the three comparison values output by the motor control engine and outputting three sets of PWM control signals to drive the UVW three phases of the motor, as shown in fig. 2, and is a Predriver with a 6N structure, which receives the three comparison values output by the motor control engine and outputs three sets of PWM control signals to drive the UVW three phases of the motor;
the reset circuit is used for providing reset signals for the MCU chip, comprises 1 POR power-on reset circuit and 1 LVD low-voltage detection circuit and provides reset signals for a system;
and the clock circuit is used for providing a counting clock and a working clock for the MCU chip and comprises 1 32MHz high-speed RC oscillator and 1 32KHz low-speed RC oscillator. The high-speed RC oscillator provides a stable 32MHz working clock for the system, and the low-speed RC oscillator provides a 32768Hz counting clock for RTC application;
and the debugging circuit is used for debugging the MCU chip, supports JTAG and SWD debugging interfaces and supports ICP, ISP and IAP downloading.
The invention also provides a design circuit of a motor control MCU chip with a dual-core structure, which comprises the MCU chip integrating a CPU for parameter configuration and conventional transaction processing and a motor control engine for processing motor operation control transactions, wherein the CPU adopts an 8051 processor.
In the invention, a functional peripheral module connected with an 8051 processor and a motor control engine through a system bus is arranged in the MCU chip.
The functional peripheral module includes:
the memory is used for reading and writing storage and comprises a 64KB Flash and an 8KB SRAM, and a flexibly designed reading and writing protection mode which are connected with the 8051 processor through an AHB system bus;
the watchdog is used for ensuring the running of the MCU chip, is a watchdog timer and is connected with the 8051 processor through an AHB system bus so as to improve the running reliability of the system;
the digital communication interface module is used for communicating with external digital equipment, and comprises a 1-path I2C interface, a 1-path SPI interface and a 1-path UART interface which are connected with an 8051 processor through an AHB system bus;
the general input and output module is used for inputting and outputting signals, comprises 4 groups (18 in total) of GPIOs (general purpose input and output) which can be hidden to an interrupt vector and are connected with an 8051 processor through an AHB (advanced high performance bus) system bus;
the timer is used for timing and timing the running of the MCU chip and comprises 1 BLDC special timer, 1 advanced timer, 4 general timers with capture input/comparison output functions and 1 RTC timer which are connected with the 8051 processor through an AHB system bus;
the analog-to-digital conversion module is used for receiving an external analog detection signal and outputting the signal to the CPU core or the motor control engine, is an 8-channel 12-bit analog-to-digital converter, has a sampling conversion rate as high as 1MSPS, receives the external analog detection signal, outputs the signal which can be directly connected with the motor control engine, and is also connected with an 8051 processor through an AHB system bus;
the pre-driving circuit is used for receiving the three comparison values output by the motor control engine and outputting three sets of PWM control signals to drive the UVW three phases of the motor, as shown in fig. 2, and is a Predriver with a 6N structure, which receives the three comparison values output by the motor control engine and outputs three sets of PWM control signals to drive the UVW three phases of the motor;
the reset circuit is used for providing reset signals for the MCU chip, comprises 1 POR power-on reset circuit and 1 LVD low-voltage detection circuit and provides reset signals for a system;
and the clock circuit is used for providing a counting clock and a working clock for the MCU chip and comprises 1 32MHz high-speed RC oscillator and 1 32KHz low-speed RC oscillator. The high-speed RC oscillator provides a stable 32MHz working clock for the system, and the low-speed RC oscillator provides a 32768Hz counting clock for RTC application;
and the debugging circuit is used for debugging the MCU chip, supports JTAG and SWD debugging interfaces and supports ICP, ISP and IAP downloading.
As shown in fig. 1, the other functional peripheral modules include 1 CRC check circuit, 1 VREF reference circuit, 1 VHALF reference circuit, 3 independent operational amplifiers, 4 analog comparators, and 1 LDO5 and 1 LDO18 power supply module, all connected to the 8051 processor via the AHB system bus.
In the invention, the motor control engine mainly comprises a multiplier-divider MDU, a proportional integrator PI, a low pass filter LPF and an FOC module which are all connected with an 8051 processor through an AHB system bus.
The multiplier-divider MDU is a calculation co-processing unit, comprises 1 16-bit by 16-bit multiplier with one single cycle execution time and 1 32-bit/16-bit divider with 16 cycles execution time, and provides operations of a trigonometric function in addition to multiplication-division operations.
The proportional integrator PI executes proportional integral operation according to a formula u (k) ═ u (k-1) + Kp (E) (k) — E (k-1)) + Ki × E (k), and is an important link of PID control.
The low pass filter LPF performs a filtering operation according to the formula y (K) ═ y (K-1) + LPF _ K (x (K) — y (K-1)), thereby eliminating ripples and noise on some control parameters.
In the invention, an FOC module executes a motor vector control algorithm and performs closed-loop control according to current feedback, as shown in FIG. 3, the FOC module mainly comprises an angle module, a PI controller, a coordinate conversion module, an output module and the like, the interior of the FOC module comprises a current closed loop, and a user can output six paths of PWM signals to drive a motor by giving a reference value of Id/Iq; and simultaneously, the current is automatically acquired through the ADC to be used as a current closed loop.
The FOC module internally comprises 4 coordinate transformations, namely Clark transformation, Park transformation, RevClark transformation and Revpark transformation, wherein the Clark transformation transforms the current from a 3-axis 2-dimensional stator coordinate system to a 2-axis alpha-beta stator coordinate system; the Park transformation transforms the current from a 2-axis alpha-beta stator coordinate system to a 2-axis rotational d-q coordinate system that rotates with the rotor flux; revpark transformation transforms a voltage vector from a 2-axis rotating d-q coordinate system to a 2-axis stationary alpha-beta coordinate system; the RevClark transformation transforms the voltage vector from a 2-axis stationary α - β coordinate system to a stationary 3-axis 3-phase stator coordinate system.
SVPWM (space vector pulse width modulation) generates a pulse width modulation signal of a three-phase motor voltage signal, an SVPWM algorithm is an important component of FOC control, and the SVPWM algorithm mainly adopts the switching of an inverter space voltage vector to obtain a quasi-circular rotating magnetic field, can obviously reduce harmonic components of inverter output current and harmonic loss of a motor, reduces torque ripple and has higher utilization rate.
In the calculation process of the FOC module, a user can check the real-time angle value theta and the estimated speed E omega and can also check other real-time parameters of the motor, and the user can judge the real-time state of the motor according to the parameters.
The real-time parameters that the FOC module needs to provide are: the device comprises an angle value theta, an estimated angle E theta, an estimated speed E omega, a d-axis voltage Vd and current Id, a q-axis voltage Vq and current Iq, an alpha-axis voltage V alpha and current I alpha, a beta-axis voltage V beta and current I beta, a bus voltage Vdc, three-phase currents Ia/Ib/Ic, alpha-axis counter electromotive force E alpha, beta-axis counter electromotive force E beta, a square value of the counter electromotive force Esqu and power POW.
The invention has the following beneficial effects:
the motor control MCU chip with a dual-core structure is adopted, a complex motor control algorithm is realized by an internal motor control engine in a hardware mode, and various high-performance motor controls can be realized only by configuring control parameters of a motor without compiling a special motor control algorithm program by a motor application developer; the invention has less peripheral elements of the whole circuit, greatly reduces the development difficulty of motor control application, shortens the development time and ensures the reliability more easily.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes performed by the present specification and drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims (10)

1. A design method of a motor control MCU chip with a dual-core structure is characterized in that a CPU core for parameter configuration and conventional transaction processing and a motor control engine core for processing motor operation control transactions are integrated on the MCU chip.
2. The method according to claim 1, wherein the CPU core is an 8051 processor core.
3. The method according to claim 2, wherein a functional peripheral module connected to the 8051 processor and the motor control engine via a system bus is built in the MCU chip.
4. The method according to claim 3, wherein the functional peripheral module comprises:
a memory for read-write storage;
the watchdog is used for ensuring the MCU chip to operate;
the digital communication interface module is used for communicating with external digital equipment;
and the general input and output module is used for inputting and outputting signals.
5. The method according to claim 4, wherein the functional peripheral module further comprises:
the timer is used for timing and timing the running of the MCU chip;
and the analog-to-digital conversion module is used for receiving an external analog detection signal and outputting the signal to the CPU core or the motor control engine.
6. The method according to claim 5, wherein the functional peripheral module further comprises:
the pre-driving circuit is used for receiving the three comparison values output by the motor control engine and outputting three groups of PWM control signals so as to drive the UVW three phases of the motor;
the reset circuit is used for providing a reset signal for the MCU chip;
the clock circuit is used for providing a counting clock and a working clock for the MCU chip;
and the debugging circuit is used for debugging the MCU chip.
7. A design circuit of a motor control MCU chip with a dual-core structure is characterized by comprising the MCU chip integrating a CPU for parameter configuration and conventional transaction processing and a motor control engine for processing motor operation control transactions.
8. The design circuit of a dual-core structure motor control MCU chip of claim 7, characterized in that the CPU employs an 8051 processor.
9. The design circuit of a dual-core structure motor control MCU chip of claim 8, wherein the MCU chip has built-in functional peripheral modules connected to the 8051 processor and the motor control engine via system bus.
10. The design circuit of a dual-core structure motor control MCU chip of claim 9, wherein the functional peripheral module comprises:
a memory for read-write storage;
the watchdog is used for ensuring the MCU chip to operate;
the digital communication interface module is used for communicating with external digital equipment;
the general input and output module is used for inputting and outputting signals;
the timer is used for timing and timing the running of the MCU chip;
the analog-to-digital conversion module is used for receiving an external analog detection signal and outputting the signal to the CPU core or the motor control engine;
the pre-driving circuit is used for receiving the three comparison values output by the motor control engine and outputting three groups of PWM control signals so as to drive the UVW three phases of the motor;
the reset circuit is used for providing a reset signal for the MCU chip;
the clock circuit is used for providing a counting clock and a working clock for the MCU chip;
and the debugging circuit is used for debugging the MCU chip.
CN202010799394.7A 2020-08-11 2020-08-11 Design method and circuit of motor control MCU chip with dual-core structure Pending CN111983952A (en)

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CN202534008U (en) * 2012-03-28 2012-11-14 中国电子科技集团公司第五十八研究所 Isomorphic dual-core structure-based SoC applied to image processing
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Application publication date: 20201124