CN111983292A - PSU voltage detection system based on server test - Google Patents
PSU voltage detection system based on server test Download PDFInfo
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- G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
- G01R19/2503—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques for measuring voltage only, e.g. digital volt meters (DVM's)
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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Abstract
The invention relates to the technical field of server testing, and provides a PSU voltage detection system based on server testing, which comprises a power supply switching device, wherein one end of the power supply switching device is connected with a PSU, and the other end of the power supply switching device is connected with a mainboard; the power supply switching device is used for detecting and controlling the power-on and power-off processes of the PSU according to the power-on and power-off actions of the tester on the switch, and outputting reminding information for reminding the tester of carrying out a new power-on test when the power is discharged to a preset threshold value, so that the estimation of the power-on and power-off time of the PSU is realized, the waiting of operators is reduced, and the test efficiency is improved.
Description
Technical Field
The invention belongs to the technical field of server testing, and particularly relates to a PSU voltage detection system based on server testing.
Background
Under the promotion of the trend of 'new capital construction', new-generation information technologies such as 5G and cloud computing are developing rapidly, and the technologies can not be separated from the processing and storage of mass data and the cloud of software, so that a data center is expected to be continuously increased as a bottom infrastructure, the requirements of servers are more and more vigorous, the requirements of server research personnel, customization and combined development are more and more common, the whole development and delivery are often required to be completed in a short time, the time of each link is compressed tightly, and a plurality of tests are required as important links for ensuring the function and quality of products in hardware testing.
Different from fatigue and testing of AC automatic cycle power-on and power-off, in the server testing stage, frequent manual power-on and power-off operations are often required for a PSU to verify relevant power timing sequences and other functions, and after a tester verifies a signal or a function, the tester can prepare to power on again to verify the next function or collect the next waveform. Therefore, the current server test has two defects:
1) when the server test needs frequent power-on and power-off operations on the PSU, the current PSU voltage cannot be known, the time for completing the discharge needs to be estimated, and research and development manpower and time are occupied;
2) the PSU discharges slowly, and a tester usually needs to wait for a long time to perform next power-on operation, so that the time is occupied.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides a PSU voltage detection system based on server test, aiming at solving the problems that the PSU discharge time cannot be accurately estimated in the prior art, and the next power-on can be carried out only after a long time, so that the test efficiency is low.
The technical scheme provided by the invention is as follows: a PSU voltage detection system based on server test comprises a power supply switching device, wherein one end of the power supply switching device is connected with a PSU, and the other end of the power supply switching device is connected with a mainboard;
the power supply switching device is used for detecting and controlling the power-on and power-off processes of the PSU according to the power-on and power-off actions of the tester on the switch, and outputting reminding information for reminding the tester of carrying out a new power-on test when the power is discharged to a preset threshold value.
As an improved solution, the power supply switching device includes:
the voltage conditioning circuit is connected with the PSU output voltage signal;
the gain control circuit is connected with the voltage conditioning circuit and is used for performing gain adjustment on the voltage signal after the voltage conditioning circuit conditions the output voltage of the PSU;
the ADC acquisition circuit is connected with the gain control circuit and is used for acquiring the voltage signal adjusted by the gain control circuit;
the microcontroller is connected with the ADC acquisition circuit and is used for analyzing and calculating the voltage signal acquired by the ADC acquisition circuit to generate a gain feedback control signal, the gain feedback control signal is used for feeding back to the gain control circuit and generating a discharge starting control signal at the same time, and when the discharge reaches a preset threshold value, a discharge stopping control signal is generated and reminding information for reminding a tester to carry out a new power-on test is output;
the charge release circuit is connected with the microcontroller and used for receiving the discharge starting control signal and the discharge stopping control signal, controlling the release of the internal charge of the PSU according to the discharge starting control signal and controlling the stop of the release of the internal charge of the PSU according to the discharge stopping control signal;
and the reminding module is connected with the microcontroller and used for receiving the reminding information sent by the microcontroller and outputting a reminder.
As an improved scheme, the microcontroller specifically includes:
the voltage signal acquisition module is connected with the ADC acquisition circuit and is used for acquiring the voltage signal acquired by the ADC acquisition circuit;
the analysis and calculation module is connected with the voltage signal acquisition module and used for carrying out analysis and calculation on the acquired voltage signal and judging the power-on and power-off trends of the PSU;
the gain feedback control signal generation module is used for generating a gain feedback control signal when the PSU is judged to be in the power-on trend and feeding the gain feedback control signal back to the gain control circuit;
the discharging starting control signal generating module is used for generating a discharging starting control signal when the PSU is judged to be in a discharging trend, and sending the discharging starting control signal to the charge discharging circuit;
the preset threshold judging module is used for judging whether the PSU voltage reaches the preset threshold or not in the discharging process;
the discharge stopping control signal generating module is used for generating a discharge stopping control signal and feeding the generated discharge stopping control signal back to the charge bleeding circuit;
and the reminding signal generating module is used for generating reminding information for reminding a tester of carrying out a new power-on test and feeding the reminding information back to the reminding module.
As an improved scheme, the parsing and calculating module specifically includes:
the voltage value selection module is used for selecting continuous voltage values acquired by the acquisition circuits of the ADC circuit within the current acquisition frequency;
the difference operation module is used for respectively performing difference operation between two adjacent voltage values according to the principle that the former voltage value is used as a subtracted number and the latter voltage value is used as a subtracted number to obtain a plurality of voltage difference values;
the analysis module is used for analyzing the acquired voltage difference values and judging the positive and negative value relation of the voltage difference values;
the first judging module is used for judging that the PSU is in a power-on trend when the voltage difference values are judged to be positive values;
the cyclic execution control module is used for sequentially executing the steps of voltage value selection, difference operation and voltage difference value positive and negative judgment in the next acquisition frequency again when the situation that negative values exist in a plurality of voltage difference values is judged;
and the second judging module is used for judging that the PSU is in a discharging trend when the voltage difference values are judged to be negative values.
As an improved scheme, when the gain control circuit receives gain feedback control signals G1 and G2, the gain feedback control signals are analyzed to obtain a current voltage value;
when the current voltage value is larger than 12V, the gain control circuit switches the gain control range to 48V;
when the current voltage value is larger than 54V, the gain control circuit switches the gain control range to the next-stage range larger than 48V.
As an improvement, the microcontroller further comprises:
and the voltage value generation module is used for generating a PSU voltage output value while generating the gain feedback control signal and transmitting the generated PSU voltage output value to the reminding module for reminding.
As an improved scheme, the voltage conditioning circuit comprises a first amplifier U1, an inverting input terminal of the first amplifier U1 is connected in series with a first resistor R1, a second resistor R2 and a third resistor R3 and then connected with a PSU voltage output terminal Vin, and a homodromous input terminal is grounded;
a first circuit node is arranged on a line between the reverse input end of the first amplifier U1 and the third resistor R3, a line led out from the first circuit node is connected in series with a fourth resistor R4 and then is converged to a second circuit node together with the output end of the first amplifier U1, and a first capacitor C1 connected in parallel with the fourth resistor R4 is arranged between the first circuit node and the second circuit node.
As an improved scheme, the gain control circuit includes an analog switch circuit, an operational amplifier circuit and a resistor network connected in sequence, where:
the analog switch circuit is in signal connection with the microcontroller through the gain feedback control signals G1 and G2; the operational amplifier circuit is connected with the analog switch circuit and the resistance network.
As an improved scheme, the operational amplifier circuit comprises a second amplifier U2, a same-direction input end of the second amplifier U2 is connected with the second circuit node, a line led out from an inverted input end is connected with a second capacitor C2 in series and then is converged with an output end to form a third circuit node, and a line led out from the third circuit node is connected with the ADC acquisition circuit after being connected with a thirteenth resistor R13 in series;
a fourth circuit node and a fifth circuit node are sequentially arranged on a line between the third circuit node and the thirteenth resistor R13;
a line led out from the fifth circuit node is connected with the resistor network and then grounded, wherein the resistor network comprises an eighth resistor R8, a ninth resistor R9, a tenth resistor R10 and an eleventh resistor R11 which are sequentially connected in series from the fifth circuit node, a sixth circuit node is arranged on the line between the eighth resistor R8 and the ninth resistor R9, a seventh circuit node is arranged on the line between the ninth resistor R9 and the tenth resistor R10, and an eighth circuit node is arranged on the line between the tenth resistor R10 and the eleventh resistor R11;
the analog switch comprises an analog integrated chip U3, a line led out from a pin COM of the analog integrated chip U3 is connected with an inverted input end of the second amplifier U2, a pin A0 and a pin A1 are respectively connected with the microprocessor through gain feedback control signals G1 and G2, a pin NO1 is connected with the fourth circuit node, and a pin NO2, a pin NO3 and a pin NO4 are respectively correspondingly connected with the sixth circuit node, the seventh circuit node and the eighth circuit node.
As an improved scheme, the discharge start control signals include a first path of pressure relief discharge control signal SW1 and a second path of pressure relief discharge control signal SW 2;
correspondingly, the charge bleeding circuit includes a first bleeding circuit and a second bleeding circuit:
the first bleeder circuit comprises a field effect transistor Q1 and a field effect transistor Q2, a grid electrode of the field effect transistor Q1 is connected with a fifteenth resistor R15 in series and then is connected with the first path of pressure relief discharge control signal SW1, a line led out from a drain electrode of the field effect transistor Q1 is connected with a sixteenth resistor R16 in series and then is connected with a voltage end VCC _3.3, a ninth circuit node is arranged on a line between the drain electrode of the field effect transistor Q1 and the sixteenth resistor R16, a line led out from the ninth circuit node is connected with a seventeenth resistor R17 in series and then is connected with a grid electrode of the field effect transistor Q2, a drain electrode of the field effect transistor Q2 is connected with a PSU voltage Vin output end, a source electrode of the field effect transistor Q2 is connected with a first bleeder resistor network in series and then is grounded, and the first bleeder resistor network;
the second bleeder circuit includes field effect transistor Q3 and field effect transistor Q4, the grid of field effect transistor Q3 concatenate behind the twentieth resistance R20 with second way pressure release discharge control signal SW2 is connected, the circuit that the drain electrode of field effect transistor Q3 was drawn forth concatenates behind the twenty first resistance R21 and is connected with voltage end VCC _3.3, the drain electrode of field effect transistor Q3 with be equipped with the tenth circuit node on the circuit between the twenty first resistance R21, the circuit that the tenth circuit node was drawn forth concatenate behind the twenty second resistance R22 with the grid connection of field effect transistor Q4, the drain electrode and the PSU voltage output end Vin of field effect transistor Q4 are connected, ground connection behind the source electrode of field effect transistor Q4 concatenates second bleeder resistance network, the second bleeder resistance network is the parallelly connected of a plurality of encapsulation resistance.
In the embodiment of the invention, the PSU voltage detection system based on server test comprises a power supply switching device, wherein one end of the power supply switching device is connected with a PSU, and the other end of the power supply switching device is connected with a mainboard; the power supply switching device is used for detecting and controlling the power-on and power-off processes of the PSU according to the power-on and power-off actions of the tester on the switch, and outputting reminding information for reminding the tester of carrying out a new power-on test when the power is discharged to a preset threshold value, so that the estimation of the power-on and power-off time of the PSU is realized, the waiting of operators is reduced, and the test efficiency is improved.
Drawings
In order to more clearly illustrate the detailed description of the invention or the technical solutions in the prior art, the drawings that are needed in the detailed description of the invention or the prior art will be briefly described below. Throughout the drawings, like elements or portions are generally identified by like reference numerals. In the drawings, elements or portions are not necessarily drawn to scale.
FIG. 1 is a schematic structural diagram of a PSU voltage detection system based on server test provided by the present invention;
FIG. 2 is a schematic diagram of a microcontroller according to the present invention;
FIG. 3 is a block diagram of a parsing computation module provided by the present invention;
FIG. 4 is a schematic diagram of a circuit configuration of a voltage conditioning circuit according to the present invention;
FIG. 5 is a circuit schematic of a gain control circuit provided by the present invention;
fig. 6 is a circuit schematic diagram of a charge draining circuit provided by the present invention.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. The following examples are merely for illustrating the technical solutions of the present invention more clearly, and therefore are only examples, and the protection scope of the present invention is not limited thereby.
Fig. 1 is a schematic structural diagram of a PSU voltage detection system based on server test according to the present invention, and for convenience of description, only the relevant portions to the embodiment of the present invention are shown in the diagram.
The PSU voltage detection system based on server test comprises a power supply switching device, wherein one end of the power supply switching device is connected with a PSU, and the other end of the power supply switching device is connected with a mainboard;
the power supply switching device is used for detecting and controlling the power-on and power-off processes of the PSU according to the power-on and power-off actions of the tester on the switch, and outputting reminding information for reminding the tester of carrying out a new power-on test when the power is discharged to a preset threshold value.
In this embodiment, as shown in fig. 1, the power supply switching device includes:
the voltage conditioning circuit is connected with the PSU output voltage signal;
the gain control circuit is connected with the voltage conditioning circuit and is used for performing gain adjustment on the voltage signal after the voltage conditioning circuit conditions the output voltage of the PSU;
and the ADC acquisition circuit is connected with the gain control circuit and is used for acquiring the voltage signal adjusted by the gain control circuit, wherein the ADC acquisition circuit adopts a 24-bit differential high-speed ADC of the company Addeno, and the model is as follows: LTC2440, which is noisy, has excellent rate and is suitable for high-speed and high-precision voltage acquisition;
the microcontroller is connected with the ADC acquisition circuit and is used for analyzing and calculating the voltage signal acquired by the ADC acquisition circuit to generate a gain feedback control signal, the gain feedback control signal is used for feeding back to the gain control circuit and generating a discharge starting control signal at the same time, and when the discharge reaches a preset threshold value, a discharge stopping control signal is generated and reminding information for reminding a tester to carry out a new power-on test is output;
the charge release circuit is connected with the microcontroller and used for receiving the discharge starting control signal and the discharge stopping control signal, controlling the release of the internal charge of the PSU according to the discharge starting control signal and controlling the stop of the release of the internal charge of the PSU according to the discharge stopping control signal;
and the reminding module is connected with the microcontroller and used for receiving the reminding information sent by the microcontroller and outputting a reminder.
In this embodiment, as shown in fig. 2, the microcontroller specifically includes:
the voltage signal acquisition module is connected with the ADC acquisition circuit and is used for acquiring the voltage signal acquired by the ADC acquisition circuit;
the analysis and calculation module is connected with the voltage signal acquisition module and used for carrying out analysis and calculation on the acquired voltage signal and judging the power-on and power-off trends of the PSU;
the gain feedback control signal generation module is used for generating a gain feedback control signal when the PSU is judged to be in the power-on trend and feeding the gain feedback control signal back to the gain control circuit;
the discharging starting control signal generating module is used for generating a discharging starting control signal when the PSU is judged to be in a discharging trend, and sending the discharging starting control signal to the charge discharging circuit;
the preset threshold judging module is used for judging whether the PSU voltage reaches the preset threshold or not in the discharging process;
the discharge stopping control signal generating module is used for generating a discharge stopping control signal and feeding the generated discharge stopping control signal back to the charge bleeding circuit;
and the reminding signal generating module is used for generating reminding information for reminding a tester of carrying out a new power-on test and feeding the reminding information back to the reminding module.
In this embodiment, the microcontroller is selected from the group consisting of the mature products of Italian semiconductor, model number: STM32F103RCT 6.
As shown in fig. 3, the parsing calculation module specifically includes:
the voltage value selection module is used for selecting continuous voltage values acquired by the acquisition circuits of the ADC circuit within the current acquisition frequency;
the difference operation module is used for respectively performing difference operation between two adjacent voltage values according to the principle that the former voltage value is used as a subtracted number and the latter voltage value is used as a subtracted number to obtain a plurality of voltage difference values;
the analysis module is used for analyzing the acquired voltage difference values and judging the positive and negative value relation of the voltage difference values;
the first judging module is used for judging that the PSU is in a power-on trend when the voltage difference values are judged to be positive values;
the cyclic execution control module is used for sequentially executing the steps of voltage value selection, difference operation and voltage difference value positive and negative judgment in the next acquisition frequency again when the situation that negative values exist in a plurality of voltage difference values is judged;
and the second judging module is used for judging that the PSU is in a discharging trend when the voltage difference values are judged to be negative values.
In this embodiment, when the gain control circuit receives gain feedback control signals G1 and G2, the gain feedback control signals are analyzed to obtain a current voltage value;
when the current voltage value is larger than 12V, the gain control circuit switches the gain control range to 48V;
when the current voltage value is larger than 54V, the gain control circuit switches the gain control range to the next-stage range larger than 48V.
As shown in fig. 2, the microcontroller further includes:
and the voltage value generation module is used for generating a PSU voltage output value while generating the gain feedback control signal and transmitting the generated PSU voltage output value to the reminding module for reminding.
In this embodiment, the above-mentioned reminding module may adopt various implementation manners, for example, the reminding module may be an LED display screen, may also be a buzzer for giving a buzzing alarm, and may also adopt other manners, which are not described herein again.
In the embodiment of the invention, the PSU voltage detection system based on server test can acquire and display the voltage of a 12V/48V/54V PSU in real time, analyze and count the voltage information by a slope method to obtain the power-on and power-off state, accelerate discharge at the first time of power failure, notify a tester at the first time after the power failure is finished, the tester does not need to wait indefinitely for a long time, and then power-on test is carried out again, so that the PSU voltage detection system based on server test can be adapted to PSUs and mainboards with various types and voltages, and the PSUs and the mainboards.
In the embodiment of the present invention, as shown in fig. 4, the voltage conditioning circuit includes a first amplifier U1, an inverting input terminal of the first amplifier U1 is connected in series with a first resistor R1, a second resistor R2 and a third resistor R3, and then connected to the PSU voltage output terminal Vin, and a homodromous input terminal is grounded;
a first circuit node 11 is arranged on a line between the reverse input end of the first amplifier U1 and the third resistor R3, a line led out from the first circuit node is connected in series with a fourth resistor R4 and then is converged to a second circuit node 12 together with the output end of the first amplifier U1, and a first capacitor C1 connected in parallel with the fourth resistor R4 is arranged between the first circuit node 11 and the second circuit node 12;
as shown in fig. 5, the gain control circuit includes an analog switch circuit, an operational amplifier circuit, and a resistor network connected in sequence, where:
the analog switch circuit is in signal connection with the microcontroller through the gain feedback control signals G1 and G2; the operational amplifier circuit is connected with the analog switch circuit and is connected with the resistor network;
the operational amplifier circuit comprises a second amplifier U2, wherein the equidirectional input end of the second amplifier U2 is connected with the second circuit node, a line led out from the reverse input end is connected with a second capacitor C2 in series and then is converged with the output end to form a third circuit node 13, and a line led out from the third circuit node 13 is connected with the ADC acquisition circuit after being connected with a thirteenth resistor R13 in series;
a fourth circuit node 14 and a fifth circuit node 15 are sequentially arranged on a line between the third circuit node 13 and the thirteenth resistor R13;
a line led out from the fifth circuit node is connected with the resistor network and then grounded, wherein the resistor network comprises an eighth resistor R8, a ninth resistor R9, a tenth resistor R10 and an eleventh resistor R11 which are sequentially connected in series from the fifth circuit node 15, a sixth circuit node 16 is arranged on the line between the eighth resistor R8 and the ninth resistor R9, a seventh circuit node 17 is arranged on the line between the ninth resistor R9 and the tenth resistor R10, and an eighth circuit node 18 is arranged on the line between the tenth resistor R10 and the eleventh resistor R11;
the analog switch comprises an analog integrated chip U3, a line led out from a pin COM of the analog integrated chip U3 is connected with an inverted input end of the second amplifier U2, a pin A0 and a pin A1 are respectively connected with the microprocessor through gain feedback control signals G1 and G2, a pin NO1 is connected with the fourth circuit node, a pin NO2, a pin NO3 and a pin NO4 are respectively correspondingly connected with the sixth circuit node 16, the seventh circuit node 17 and the eighth circuit node 18, and the model MAX of the analog integrated chip U3 is 308.
In the embodiment of the present invention, the discharge start control signal includes a first path of voltage relief discharge control signal SW1 and a second path of voltage relief discharge control signal SW 2;
correspondingly, as shown in fig. 6, the charge bleeding circuit includes a first bleeding circuit and a second bleeding circuit:
the first bleeder circuit comprises a field effect transistor Q1 and a field effect transistor Q2, a grid electrode of the field effect transistor Q1 is connected with a fifteenth resistor R15 in series and then is connected with the first path of pressure relief discharge control signal SW1, a line led out from a drain electrode of the field effect transistor Q1 is connected with a sixteenth resistor R16 in series and then is connected with a voltage end VCC _3.3, a ninth circuit node 19 is arranged on a line between the drain electrode of the field effect transistor Q1 and the sixteenth resistor R16, a line led out from the ninth circuit node 19 is connected with a seventeenth resistor R17 in series and then is connected with a grid electrode of the field effect transistor Q2, a drain electrode of the field effect transistor Q2 is connected with a PSU voltage output end Vin, a source electrode of the field effect transistor Q2 is connected with a first bleeder resistor network 20 in series and then is grounded, and the first bleeder resistor network 20;
the second bleeder circuit includes field effect transistor Q3 and field effect transistor Q4, the grid of field effect transistor Q3 concatenate behind the twentieth resistance R20 with second way pressure release discharge control signal SW2 is connected, the circuit that the drain electrode of field effect transistor Q3 was drawn forth concatenates behind the twenty first resistance R21 and is connected with voltage end VCC _3.3, the drain electrode of field effect transistor Q3 with be equipped with tenth circuit node 21 on the circuit between the twenty first resistance R21, the circuit that the tenth circuit node 21 was drawn forth concatenates behind the twenty second resistance R22 with the grid connection of field effect transistor Q4, the drain electrode and the PSU voltage output end Vin of field effect transistor Q4 are connected, ground connection behind the source electrode of field effect transistor Q4 concatenates second bleeder resistance network 22, second bleeder resistance network 22 is the parallel resistance of a plurality of encapsulation.
In the embodiment of the present invention, the types of the elements are shown in fig. 4 to 6, and are not described herein again.
For convenience of explanation, in conjunction with the above, the following gives an implementation process of the PSU voltage detection system based on server test:
1) one end of the power supply switching device is connected with the PSU, and the other end of the power supply switching device is connected with the server.
2) And (3) electrifying the PSU, acquiring the PSU output voltage value by the power supply switching device, displaying the PSU output voltage value in real time, judging the voltage value to continuously rise by a slope method, closing the discharge circuit, switching the range to 48V when the voltage value exceeds 12V, continuing switching the range when the voltage exceeds 54V, and continuously acquiring and displaying the voltage.
3) And carrying out related tests at the main board end, and finishing the tests at one time.
4) The input of the PSU is cut off, the power supply switching device monitors that the voltage drops according to the change slope of the voltage, the discharge circuit is opened, and different discharge circuits are selectively opened according to the voltage value of the PSU, so that the discharge of charges in the PSU can be accelerated as soon as possible in each circuit.
5) When the voltage drops to an acceptable preset threshold value, the bleeder circuit is disconnected, the buzzer sounds to remind a user that the PSU is powered off, the test environment is ready, and the power can be powered on again at any time.
In the embodiment of the invention, the PSU voltage detection system based on server test comprises a power supply switching device, wherein one end of the power supply switching device is connected with a PSU, and the other end of the power supply switching device is connected with a mainboard; the power supply switching device is used for detecting and controlling the power-on and power-off processes of the PSU according to the power-on and power-off actions of the tester on the switch, and outputting reminding information for reminding the tester of carrying out a new power-on test when the power is discharged to a preset threshold value, so that the estimation of the power-on and power-off time of the PSU is realized, the waiting of operators is reduced, and the test efficiency is improved.
The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention, and they should be construed as being included in the following claims and description.
Claims (10)
1. The PSU voltage detection system based on server testing is characterized by comprising a power supply switching device, wherein one end of the power supply switching device is connected with a PSU, and the other end of the power supply switching device is connected with a mainboard;
the power supply switching device is used for detecting and controlling the power-on and power-off processes of the PSU according to the power-on and power-off actions of the tester on the switch, and outputting reminding information for reminding the tester of carrying out a new power-on test when the power is discharged to a preset threshold value.
2. The PSU voltage detection system according to claim 1, wherein the power supply switching device comprises:
the voltage conditioning circuit is connected with the PSU output voltage signal;
the gain control circuit is connected with the voltage conditioning circuit and is used for performing gain adjustment on the voltage signal after the voltage conditioning circuit conditions the output voltage of the PSU;
the ADC acquisition circuit is connected with the gain control circuit and is used for acquiring the voltage signal adjusted by the gain control circuit;
the microcontroller is connected with the ADC acquisition circuit and is used for analyzing and calculating the voltage signal acquired by the ADC acquisition circuit to generate a gain feedback control signal, the gain feedback control signal is used for feeding back to the gain control circuit and generating a discharge starting control signal at the same time, and when the discharge reaches a preset threshold value, a discharge stopping control signal is generated and reminding information for reminding a tester to carry out a new power-on test is output;
the charge release circuit is connected with the microcontroller and used for receiving the discharge starting control signal and the discharge stopping control signal, controlling the release of the internal charge of the PSU according to the discharge starting control signal and controlling the stop of the release of the internal charge of the PSU according to the discharge stopping control signal;
and the reminding module is connected with the microcontroller and used for receiving the reminding information sent by the microcontroller and outputting a reminder.
3. The PSU voltage detection system based on server testing of claim 2, wherein the microcontroller specifically comprises:
the voltage signal acquisition module is connected with the ADC acquisition circuit and is used for acquiring the voltage signal acquired by the ADC acquisition circuit;
the analysis and calculation module is connected with the voltage signal acquisition module and used for carrying out analysis and calculation on the acquired voltage signal and judging the power-on and power-off trends of the PSU;
the gain feedback control signal generation module is used for generating a gain feedback control signal when the PSU is judged to be in the power-on trend and feeding the gain feedback control signal back to the gain control circuit;
the discharging starting control signal generating module is used for generating a discharging starting control signal when the PSU is judged to be in a discharging trend, and sending the discharging starting control signal to the charge discharging circuit;
the preset threshold judging module is used for judging whether the PSU voltage reaches the preset threshold or not in the discharging process;
the discharge stopping control signal generating module is used for generating a discharge stopping control signal and feeding the generated discharge stopping control signal back to the charge bleeding circuit;
and the reminding signal generating module is used for generating reminding information for reminding a tester of carrying out a new power-on test and feeding the reminding information back to the reminding module.
4. The PSU voltage detection system based on server testing according to claim 3, wherein the parsing calculation module specifically comprises:
the voltage value selection module is used for selecting continuous voltage values acquired by the acquisition circuits of the ADC circuit within the current acquisition frequency;
the difference operation module is used for respectively performing difference operation between two adjacent voltage values according to the principle that the former voltage value is used as a subtracted number and the latter voltage value is used as a subtracted number to obtain a plurality of voltage difference values;
the analysis module is used for analyzing the acquired voltage difference values and judging the positive and negative value relation of the voltage difference values;
the first judging module is used for judging that the PSU is in a power-on trend when the voltage difference values are judged to be positive values;
the cyclic execution control module is used for sequentially executing the steps of voltage value selection, difference operation and voltage difference value positive and negative judgment in the next acquisition frequency again when the situation that negative values exist in a plurality of voltage difference values is judged;
and the second judging module is used for judging that the PSU is in a discharging trend when the voltage difference values are judged to be negative values.
5. The PSU voltage detection system based on server testing of claim 3, wherein when the gain control circuit receives gain feedback control signals G1 and G2, the gain feedback control signals are parsed to obtain a current voltage value;
when the current voltage value is larger than 12V, the gain control circuit switches the gain control range to 48V;
when the current voltage value is larger than 54V, the gain control circuit switches the gain control range to the next-stage range larger than 48V.
6. The PSU voltage detection system based on server testing of claim 3, wherein the microcontroller further comprises:
and the voltage value generation module is used for generating a PSU voltage output value while generating the gain feedback control signal and transmitting the generated PSU voltage output value to the reminding module for reminding.
7. The PSU voltage detection system based on server test as claimed in claim 2, wherein the voltage conditioning circuit comprises a first amplifier U1, the inverting input terminal of the first amplifier U1 is connected in series with a first resistor R1, a second resistor R2 and a third resistor R3 and then connected with the PSU voltage output terminal Vin, and the inverting input terminal is grounded;
a first circuit node is arranged on a line between the reverse input end of the first amplifier U1 and the third resistor R3, a line led out from the first circuit node is connected in series with a fourth resistor R4 and then is converged to a second circuit node together with the output end of the first amplifier U1, and a first capacitor C1 connected in parallel with the fourth resistor R4 is arranged between the first circuit node and the second circuit node.
8. The PSU voltage detection system according to claim 7, wherein the gain control circuit comprises an analog switch circuit, an operational amplifier circuit and a resistor network connected in sequence, wherein:
the analog switch circuit is in signal connection with the microcontroller through the gain feedback control signals G1 and G2; the operational amplifier circuit is connected with the analog switch circuit and the resistance network.
9. The PSU voltage detection system based on server test as claimed in claim 8, wherein the operational amplifier circuit comprises a second amplifier U2, the second amplifier U2 has a common input connected to the second circuit node, a line from an inverting input connected in series with a second capacitor C2 is collected with an output terminal to form a third circuit node, and a line from the third circuit node connected in series with a thirteenth resistor R13 is connected to the ADC collecting circuit;
a fourth circuit node and a fifth circuit node are sequentially arranged on a line between the third circuit node and the thirteenth resistor R13;
a line led out from the fifth circuit node is connected with the resistor network and then grounded, wherein the resistor network comprises an eighth resistor R8, a ninth resistor R9, a tenth resistor R10 and an eleventh resistor R11 which are sequentially connected in series from the fifth circuit node, a sixth circuit node is arranged on the line between the eighth resistor R8 and the ninth resistor R9, a seventh circuit node is arranged on the line between the ninth resistor R9 and the tenth resistor R10, and an eighth circuit node is arranged on the line between the tenth resistor R10 and the eleventh resistor R11;
the analog switch comprises an analog integrated chip U3, a line led out from a pin COM of the analog integrated chip U3 is connected with an inverted input end of the second amplifier U2, a pin A0 and a pin A1 are respectively connected with the microprocessor through gain feedback control signals G1 and G2, a pin NO1 is connected with the fourth circuit node, and a pin NO2, a pin NO3 and a pin NO4 are respectively correspondingly connected with the sixth circuit node, the seventh circuit node and the eighth circuit node.
10. The PSU voltage detection system based on server test of claim 8, wherein the discharge start control signal comprises a first path of voltage relief discharge control signal SW1 and a second path of voltage relief discharge control signal SW 2;
correspondingly, the charge bleeding circuit includes a first bleeding circuit and a second bleeding circuit:
the first bleeder circuit comprises a field effect transistor Q1 and a field effect transistor Q2, a grid electrode of the field effect transistor Q1 is connected with a fifteenth resistor R15 in series and then is connected with the first path of pressure relief discharge control signal SW1, a line led out from a drain electrode of the field effect transistor Q1 is connected with a sixteenth resistor R16 in series and then is connected with a voltage end VCC _3.3, a ninth circuit node is arranged on a line between the drain electrode of the field effect transistor Q1 and the sixteenth resistor R16, a line led out from the ninth circuit node is connected with a seventeenth resistor R17 in series and then is connected with a grid electrode of the field effect transistor Q2, a drain electrode of the field effect transistor Q2 is connected with a PSU voltage Vin output end, a source electrode of the field effect transistor Q2 is connected with a first bleeder resistor network in series and then is grounded, and the first bleeder resistor network;
the second bleeder circuit includes field effect transistor Q3 and field effect transistor Q4, the grid of field effect transistor Q3 concatenate behind the twentieth resistance R20 with second way pressure release discharge control signal SW2 is connected, the circuit that the drain electrode of field effect transistor Q3 was drawn forth concatenates behind the twenty first resistance R21 and is connected with voltage end VCC _3.3, the drain electrode of field effect transistor Q3 with be equipped with the tenth circuit node on the circuit between the twenty first resistance R21, the circuit that the tenth circuit node was drawn forth concatenate behind the twenty second resistance R22 with the grid connection of field effect transistor Q4, the drain electrode and the PSU voltage output end Vin of field effect transistor Q4 are connected, ground connection behind the source electrode of field effect transistor Q4 concatenates second bleeder resistance network, the second bleeder resistance network is the parallelly connected of a plurality of encapsulation resistance.
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