CN111983292A - A PSU Voltage Detection System Based on Server Test - Google Patents

Abstract

The invention relates to the technical field of server testing, and provides a PSU voltage detection system based on server testing, which comprises a power supply switching device, wherein one end of the power supply switching device is connected with a PSU, and the other end of the power supply switching device is connected with a mainboard; the power supply switching device is used for detecting and controlling the power-on and power-off processes of the PSU according to the power-on and power-off actions of the tester on the switch, and outputting reminding information for reminding the tester of carrying out a new power-on test when the power is discharged to a preset threshold value, so that the estimation of the power-on and power-off time of the PSU is realized, the waiting of operators is reduced, and the test efficiency is improved.

Description

A PSU Voltage Detection System Based on Server Test

technical field

The invention belongs to the technical field of server testing, and in particular relates to a PSU voltage detection system based on server testing.

Background technique

Driven by the tide of "new infrastructure", the development of new-generation information technologies such as 5G and cloud computing is accelerating. These technologies are inseparable from the processing of massive data, storage, and cloudification of software. Therefore, data centers, as the underlying infrastructure, are expected to continue to grow. , the demand for servers is also becoming more and more strong. For server R&D personnel, the demand for customization and joint development is becoming more and more common. It is often necessary to complete the entire development and delivery in a very short period of time, and the time for each link is very compressed. As an important part of ensuring product function and quality, hardware testing requires multiple tests.

Different from the fatigue and testing of AC automatic cycle power-on and power-off, in the server test stage, it is often necessary to perform manual power-on and power-off operations on the PSU frequently to verify the related power sequence and other functions. After the tester has verified a signal or After the function, it will be ready to re-power on to verify the next function or acquire the next waveform. Therefore, the current server test has the following two defects:

1) When the server test requires frequent power-on and power-off operations on the PSU, it is impossible to know the current PSU voltage, and it is necessary to estimate the discharge completion time, which takes up R&D manpower and time;

2) The discharge of the PSU is very slow, and the tester often needs to wait for a long time to perform the next power-on operation, which takes up time.

SUMMARY OF THE INVENTION

In view of the defects in the prior art, the present invention provides a PSU voltage detection system based on server testing, aiming to solve the problem that the prior art cannot accurately estimate the PSU discharge time, and it takes a long time to perform the next load electricity, resulting in low test efficiency.

The technical solution provided by the present invention is: a PSU voltage detection system based on server testing, comprising a power supply switching device, one end of the power supply switching device is connected to the PSU, and the other end is connected to the main board;

The power supply switching device is used to detect and control the power-on and discharge process of the PSU according to the power-on and power-off actions performed by the tester on the switch, and when the discharge reaches a preset threshold, the output reminds the tester to perform a new operation. A reminder message for a power-on test.

As an improved solution, the power supply switching device includes:

a voltage conditioning circuit connected to the PSU output voltage signal;

a gain control circuit, connected to the voltage conditioning circuit, for performing gain adjustment on the voltage signal after the voltage conditioning circuit has conditioned the output voltage of the PSU;

The ADC acquisition circuit is connected to the gain control circuit, and is used for acquiring the voltage signal adjusted by the gain control circuit;

a microcontroller, connected to the ADC acquisition circuit, for performing analytical calculation on the voltage signal acquired by the ADC acquisition circuit, and generating a gain feedback control signal, the gain feedback control signal being used for feedback to the gain control circuit , at the same time generate a start discharge control signal, and when the discharge reaches a preset threshold, generate a stop discharge control signal, and output a reminder message to remind the tester to perform a new power-on test;

A charge discharge circuit, connected to the microcontroller, for receiving the start discharge control signal and the stop discharge control signal, and according to the start discharge control signal, to control the discharge of the internal charge of the PSU, and at the same time according to the start discharge control signal The stop discharge control signal is used to control and stop the release of the internal charge of the PSU;

A reminder module, connected with the microcontroller, is used for receiving the reminder information sent by the microcontroller and outputting the reminder.

As an improved solution, the microcontroller specifically includes:

a voltage signal acquisition module, connected to the ADC acquisition circuit, for acquiring the voltage signal acquired by the ADC acquisition circuit;

an analytical calculation module, connected to the voltage signal acquisition module, for performing analytical calculation on the collected voltage signal, and judging the power-on and power-down trends of the PSU;

a gain feedback control signal generation module, configured to generate a gain feedback control signal when it is determined that the PSU is in a power-on trend, and feed back the gain feedback control signal to the gain control circuit;

a start-discharge control signal generation module, configured to generate a start-discharge control signal when it is determined that the PSU is in a discharge trend, and send the start-discharge control signal to the charge discharge circuit;

A preset threshold value judgment module, used to know whether the PSU voltage reaches the preset threshold value during the discharging process;

a stop-discharge control signal generation module, configured to generate a stop-discharge control signal, and feed back the generated stop-discharge control signal to the charge discharge circuit;

A reminder signal generation module is used to generate reminder information for reminding testers to perform a new power-on test, and feed back the reminder information to the reminder module.

As an improved solution, the analytical calculation module specifically includes:

a voltage value selection module, used for selecting a number of consecutive voltage values collected by the ADC circuit collection circuit within the current collection frequency;

The difference operation module is used to perform difference operation between two adjacent voltage values according to the principle that the previous voltage value is used as the minuend and the next voltage value is used as the subtrahend, and several voltage difference values are obtained;

an analysis module, configured to analyze a plurality of the obtained voltage difference values, and determine the positive and negative value relationship of the voltage difference values;

a first determination module, configured to determine that the PSU is in a power-on trend when it is determined that several of the voltage differences are all positive values;

The cyclic execution control module is used to re-execute the steps of voltage value selection, difference operation and positive and negative value judgment of the voltage difference in the next acquisition frequency when it is determined that there are negative values in several of the voltage difference values;

The second determination module is configured to determine that the PSU is in a discharge trend when it is determined that several of the voltage differences are all negative values.

As an improved solution, when the gain control circuit receives the gain feedback control signals G1 and G2, the gain feedback control signal is analyzed to obtain the current voltage value;

When the current voltage value is greater than 12V, the gain control circuit switches the gain control range to 48V;

When the current voltage value is greater than 54V, the gain control circuit switches the gain control range to the next level range greater than 48V.

As an improved solution, the microcontroller further includes:

The voltage value generation module is configured to generate the PSU voltage output value while generating the gain feedback control signal, and send the generated PSU voltage output value to the reminder module for reminder.

As an improved solution, the voltage conditioning circuit includes a first amplifier U1, and the inverting input end of the first amplifier U1 is connected in series with the first resistor R1, the second resistor R2 and the third resistor R3, and then outputs the voltage from the PSU. The terminal Vin is connected, and the input terminal of the same direction is grounded;

A first circuit node is provided on the line between the inverting input end of the first amplifier U1 and the third resistor R3, and the line drawn from the first circuit node is connected to the fourth resistor R4 in series with the first circuit node. An output terminal of an amplifier U1 is collected to a second circuit node, and a first capacitor C1 connected in parallel with the fourth resistor R4 is arranged between the first circuit node and the second circuit node.

As an improved solution, the gain control circuit includes an analog switch circuit, an operational amplifier circuit and a resistor network connected in sequence, wherein:

The analog switch circuit is connected to the microcontroller through the gain feedback control signals G1 and G2; the operational amplifier circuit is connected to the analog switch circuit, and the operational amplifier circuit is connected to the resistor network.

As an improved solution, the operational amplifier circuit includes a second amplifier U2, the non-inverting input end of the second amplifier U2 is connected to the second circuit node, and the line drawn from the inverting input end is connected in series with a second capacitor After C2 and the output terminal are collected into a third circuit node, the line drawn from the third circuit node is connected in series with the thirteenth resistor R13 and then connected to the ADC acquisition circuit;

A fourth circuit node and a fifth circuit node are sequentially arranged on the line between the third circuit node and the thirteenth resistor R13;

The line drawn from the fifth circuit node is connected to the resistor network and then grounded, wherein the resistor network includes an eighth resistor R8, a ninth resistor R9, and a tenth resistor R10 sequentially connected in series from the fifth circuit node and an eleventh resistor R11, wherein a sixth circuit node is provided on the line between the eighth resistor R8 and the ninth resistor R9, and a line between the ninth resistor R9 and the tenth resistor R10 is provided with a seventh circuit node, an eighth circuit node is provided on the line between the tenth resistor R10 and the eleventh resistor R11;

The analog switch includes an analog integrated chip U3, the line drawn from the pin COM of the analog integrated chip U3 is connected to the reverse input end of the second amplifier U2, and the pin A0 and the pin A1 respectively pass the gain feedback control signal. G1 and G2 are connected to the microprocessor, pin NO1 is connected to the fourth circuit node, and pin NO2, pin NO3, and pin NO4 are respectively connected to the sixth circuit node, seventh circuit node, and eighth circuit node. The circuit nodes are correspondingly connected.

As an improved solution, the discharge start control signal includes a first pressure relief discharge control signal SW1 and a second pressure relief discharge control signal SW2;

Correspondingly, the charge discharge circuit includes a first discharge circuit and a second discharge circuit:

The first discharge circuit includes a field effect transistor Q1 and a field effect transistor Q2. The gate of the field effect transistor Q1 is connected in series with the fifteenth resistor R15 and then connected to the first pressure relief and discharge control signal SW1. The line drawn from the drain of the field effect transistor Q1 is connected in series with the sixteenth resistor R16 and then connected to the voltage terminal VCC_3.3. The line between the drain of the field effect transistor Q1 and the sixteenth resistor R16 is provided with a sixth line. Nine circuit nodes, the line drawn from the ninth circuit node is connected in series with the seventeenth resistor R17 and then connected to the gate of the field effect transistor Q2, and the drain of the field effect transistor Q2 is connected to the PSU voltage output terminal Vin, The source of the field effect transistor Q2 is connected in series with a first bleeder resistor network and then grounded, and the first bleeder resistor network is a series resistor of several packages;

The second discharge circuit includes a field effect transistor Q3 and a field effect transistor Q4. The gate of the field effect transistor Q3 is connected in series with the twentieth resistor R20 and then connected to the second pressure relief and discharge control signal SW2. The line drawn from the drain of the field effect transistor Q3 is connected in series with the twenty-first resistor R21 and then connected to the voltage terminal VCC_3.3. The line between the drain of the field effect transistor Q3 and the twenty-first resistor R21 is set. There is a tenth circuit node, the line drawn from the tenth circuit node is connected in series with the twenty-second resistor R22 and then connected to the gate of the field effect transistor Q4, and the drain of the field effect transistor Q4 is connected to the PSU voltage output terminal Vin is connected, the source of the field effect transistor Q4 is connected in series with a second bleeder resistor network and then grounded, and the second bleeder resistor network is a parallel resistor of several packages.

In the embodiment of the present invention, a PSU voltage detection system based on server testing includes a power supply adapter device, one end of the power supply adapter device is connected to the PSU, and the other end is connected to the main board; wherein, the power supply adapter device is used for According to the power-on and power-on actions performed by the tester on the switch, the power-on and discharge process of the PSU is detected and controlled, and when the discharge reaches the preset threshold, a reminder message to remind the tester to perform a new power-on test is output, so as to realize the The estimation of the power-on and discharge time of the PSU reduces the waiting time of the operator and improves the test efficiency.

Description of drawings

In order to illustrate the specific embodiments of the present invention or the technical solutions in the prior art more clearly, the following briefly introduces the accompanying drawings that are required to be used in the description of the specific embodiments or the prior art. Similar elements or parts are generally identified by similar reference numerals throughout the drawings. In the drawings, each element or section is not necessarily drawn to actual scale.

1 is a schematic structural diagram of a PSU voltage detection system based on server testing provided by the present invention;

2 is a schematic structural diagram of a microcontroller provided by the present invention;

Fig. 3 is the structural block diagram of the analytical calculation module provided by the present invention;

4 is a schematic diagram of a circuit structure of a voltage conditioning circuit provided by the present invention;

5 is a schematic circuit diagram of a gain control circuit provided by the present invention;

FIG. 6 is a schematic circuit diagram of the charge discharge circuit provided by the present invention.

Detailed ways

Embodiments of the technical solutions of the present invention will be described in detail below with reference to the accompanying drawings. The following examples are only used to more clearly illustrate the technical solutions of the present invention, and are therefore only used as examples, and cannot be used to limit the protection scope of the present invention.

FIG. 1 is a schematic structural diagram of a PSU voltage detection system based on server testing provided by the present invention. For convenience of description, only the parts related to the embodiments of the present invention are shown in the figure.

The PSU voltage detection system based on server testing includes a power supply transfer device, one end of the power supply transfer device is connected to the PSU, and the other end is connected to the motherboard;

The power supply switching device is used to detect and control the power-on and discharge process of the PSU according to the power-on and power-off actions performed by the tester on the switch, and when the discharge reaches a preset threshold, the output reminds the tester to perform a new operation. A reminder message for a power-on test.

In this embodiment, as shown in FIG. 1 , the power supply switching device includes:

a voltage conditioning circuit connected to the PSU output voltage signal;

a gain control circuit, connected to the voltage conditioning circuit, for performing gain adjustment on the voltage signal after the voltage conditioning circuit has conditioned the output voltage of the PSU;

The ADC acquisition circuit is connected to the gain control circuit and is used to collect the voltage signal adjusted by the gain control circuit, wherein the ADC acquisition circuit selects the 24-bit differential high-speed ADC of Analog Devices, model: LTC2440, Its noise and speed are excellent, suitable for high-speed high-precision voltage acquisition;

a microcontroller, connected to the ADC acquisition circuit, for performing analytical calculation on the voltage signal acquired by the ADC acquisition circuit, and generating a gain feedback control signal, the gain feedback control signal being used for feedback to the gain control circuit , at the same time generate a start discharge control signal, and when the discharge reaches a preset threshold, generate a stop discharge control signal, and output a reminder message to remind the tester to perform a new power-on test;

A charge discharge circuit, connected to the microcontroller, for receiving the start discharge control signal and the stop discharge control signal, and according to the start discharge control signal, to control the discharge of the internal charge of the PSU, and at the same time according to the start discharge control signal The stop discharge control signal is used to control and stop the release of the internal charge of the PSU;

A reminder module, connected with the microcontroller, is used for receiving the reminder information sent by the microcontroller and outputting the reminder.

In this embodiment, as shown in Figure 2, the microcontroller specifically includes:

a voltage signal acquisition module, connected to the ADC acquisition circuit, for acquiring the voltage signal acquired by the ADC acquisition circuit;

an analytical calculation module, connected to the voltage signal acquisition module, for performing analytical calculation on the collected voltage signal, and judging the power-on and power-down trends of the PSU;

a gain feedback control signal generation module, configured to generate a gain feedback control signal when it is determined that the PSU is in a power-on trend, and feed back the gain feedback control signal to the gain control circuit;

a start-discharge control signal generation module, configured to generate a start-discharge control signal when it is determined that the PSU is in a discharge trend, and send the start-discharge control signal to the charge discharge circuit;

A preset threshold value judgment module, used to know whether the PSU voltage reaches the preset threshold value during the discharging process;

a stop-discharge control signal generation module, configured to generate a stop-discharge control signal, and feed back the generated stop-discharge control signal to the charge discharge circuit;

A reminder signal generation module is used to generate reminder information for reminding testers to perform a new power-on test, and feed back the reminder information to the reminder module.

In this embodiment, the microcontroller is a mature product of STMicroelectronics, model: STM32F103RCT6.

As shown in Figure 3, the analytical calculation module specifically includes:

a voltage value selection module, used for selecting a number of consecutive voltage values collected by the ADC circuit collection circuit within the current collection frequency;

The difference operation module is used to perform difference operation between two adjacent voltage values according to the principle that the previous voltage value is used as the minuend and the next voltage value is used as the subtrahend, and several voltage difference values are obtained;

an analysis module, configured to analyze a plurality of the obtained voltage difference values, and determine the positive and negative value relationship of the voltage difference values;

a first determination module, configured to determine that the PSU is in a power-on trend when it is determined that several of the voltage differences are all positive values;

The cyclic execution control module is used to re-execute the steps of voltage value selection, difference operation and positive and negative value judgment of the voltage difference in the next acquisition frequency when it is determined that there are negative values in several of the voltage difference values;

The second determination module is configured to determine that the PSU is in a discharge trend when it is determined that several of the voltage differences are all negative values.

In this embodiment, when the gain control circuit receives the gain feedback control signals G1 and G2, the gain feedback control signal is analyzed to obtain the current voltage value;

When the current voltage value is greater than 12V, the gain control circuit switches the gain control range to 48V;

When the current voltage value is greater than 54V, the gain control circuit switches the gain control range to the next level range greater than 48V.

As shown in Figure 2, the microcontroller also includes:

The voltage value generation module is configured to generate the PSU voltage output value while generating the gain feedback control signal, and send the generated PSU voltage output value to the reminder module for reminder.

In this embodiment, the above-mentioned reminder module can be implemented in a variety of ways. For example, the reminder module can be an LED display screen or a buzzer to give a buzzer alarm. Of course, other ways can also be used, which will not be repeated here.

In the embodiment of the present invention, the PSU voltage detection system based on the server test can collect and display the voltage of the 12V/48V/54V PSU in real time, and analyze the statistical voltage information through the slope method to obtain the power-on and power-off state. Accelerate the discharge, notify the tester at the first time after the power-off is completed, the tester does not need to wait for a long time, and then re-power on the test, it can be adapted to various types and voltages of PSU and motherboard, no need to perform change.

In the embodiment of the present invention, as shown in FIG. 4 , the voltage conditioning circuit includes a first amplifier U1 , and an inverting input terminal of the first amplifier U1 is connected in series with a first resistor R1 , a second resistor R2 and a third resistor R3 . It is connected to the PSU voltage output terminal Vin, and the same-direction input terminal is grounded;

A first circuit node 11 is provided on the line between the inverting input end of the first amplifier U1 and the third resistor R3, and the line drawn from the first circuit node is connected to the fourth resistor R4 in series with the third resistor R3. The output end of the first amplifier U1 is collected to a second circuit node 12, and a first capacitor C1 connected in parallel with the fourth resistor R4 is arranged between the first circuit node 11 and the second circuit node 12;

As shown in Figure 5, the gain control circuit includes an analog switch circuit, an operational amplifier circuit and a resistor network connected in sequence, wherein:

The analog switch circuit is connected to the microcontroller through the gain feedback control signals G1 and G2; the operational amplifier circuit is connected to the analog switch circuit, and the operational amplifier circuit is connected to the resistor network;

The operational amplifier circuit includes a second amplifier U2, the non-inverting input terminal of the second amplifier U2 is connected to the second circuit node, and the line drawn from the inverse input terminal is connected in series with the second capacitor C2 and then collected with the output terminal to form a third circuit. The circuit node 13, the line drawn from the third circuit node 13 is connected in series with the thirteenth resistor R13 and then connected to the ADC acquisition circuit;

A fourth circuit node 14 and a fifth circuit node 15 are arranged on the line between the third circuit node 13 and the thirteenth resistor R13 in sequence;

The line drawn from the fifth circuit node is connected to the resistor network and then grounded, wherein the resistor network includes an eighth resistor R8, a ninth resistor R9, and a tenth resistor sequentially connected in series from the fifth circuit node 15 R10 and the eleventh resistor R11, wherein the line between the eighth resistor R8 and the ninth resistor R9 is provided with a sixth circuit node 16, and the line between the ninth resistor R9 and the tenth resistor R10 a seventh circuit node 17 is provided, and an eighth circuit node 18 is provided on the line between the tenth resistor R10 and the eleventh resistor R11;

The analog switch includes an analog integrated chip U3, the line drawn from the pin COM of the analog integrated chip U3 is connected to the reverse input end of the second amplifier U2, and the pin A0 and the pin A1 respectively pass the gain feedback control signal. G1 and G2 are connected to the microprocessor, pin NO1 is connected to the fourth circuit node, pin NO2, pin NO3, and pin NO4 are respectively connected to the sixth circuit node 16, seventh circuit node 17, The eighth circuit node 18 is correspondingly connected, and the model of the analog integrated chip U3 is MAX308.

In the embodiment of the present invention, the discharge start control signal includes a first pressure relief discharge control signal SW1 and a second pressure relief discharge control signal SW2;

Correspondingly, as shown in FIG. 6 , the charge discharge circuit includes a first discharge circuit and a second discharge circuit:

The first discharge circuit includes a field effect transistor Q1 and a field effect transistor Q2. The gate of the field effect transistor Q1 is connected in series with the fifteenth resistor R15 and then connected to the first pressure relief and discharge control signal SW1. The line drawn from the drain of the field effect transistor Q1 is connected in series with the sixteenth resistor R16 and then connected to the voltage terminal VCC_3.3. The line between the drain of the field effect transistor Q1 and the sixteenth resistor R16 is provided with a sixth line. The ninth circuit node 19, the line drawn from the ninth circuit node 19 is connected in series with the seventeenth resistor R17 and then connected to the gate of the field effect transistor Q2, and the drain of the field effect transistor Q2 is connected to the PSU voltage output terminal Vin connection, the source of the field effect transistor Q2 is connected in series with the first bleeder resistor network 20 and then grounded, and the first bleeder resistor network 20 is a series resistor of several packages;

The second discharge circuit includes a field effect transistor Q3 and a field effect transistor Q4. The gate of the field effect transistor Q3 is connected in series with the twentieth resistor R20 and then connected to the second pressure relief and discharge control signal SW2. The line drawn from the drain of the field effect transistor Q3 is connected in series with the twenty-first resistor R21 and then connected to the voltage terminal VCC_3.3. The line between the drain of the field effect transistor Q3 and the twenty-first resistor R21 is set. There is a tenth circuit node 21, the line drawn from the tenth circuit node 21 is connected in series with the twenty-second resistor R22 and then connected to the gate of the field effect transistor Q4, and the drain of the field effect transistor Q4 is connected to the PSU voltage The output terminal Vin is connected, and the source of the field effect transistor Q4 is connected in series with a second bleeder resistor network 22 and then grounded. The second bleeder resistor network 22 is a parallel resistor of several packages.

In the embodiment of the present invention, the models of the respective components are shown in FIG. 4 to FIG. 6 , which will not be repeated here.

For the convenience of description, combined with the above content, the implementation process of the PSU voltage detection system based on the server test is given as follows:

1) Connect one end of the power adapter to the PSU and the other end to the server.

2) When the PSU is powered on, the power supply transfer device collects the output voltage value of the PSU and displays it in real time. It is judged by the slope method that the voltage value continues to rise, and the discharge circuit is closed. When the voltage value exceeds 12V, the range is switched to 48V, and when the voltage exceeds 54V , continue to switch the range, and continue to collect and display the voltage.

3) The main board side conducts relevant tests, and one test is completed.

4) Cut off the input of the PSU, the power supply switching device monitors the voltage drop according to the change slope of the voltage, turns on the discharge circuit, and chooses to open different discharge circuits according to the voltage value of the PSU, so as to ensure that each channel can accelerate the PSU as soon as possible. Drainage of internal charge.

5) When the voltage drops to an acceptable preset threshold, disconnect the bleeder circuit and the buzzer will sound to remind the user that the PSU has been powered off and the test environment is ready, and can be powered on again at any time.

In the embodiment of the present invention, a PSU voltage detection system based on server testing includes a power supply adapter device, one end of the power supply adapter device is connected to the PSU, and the other end is connected to the main board; wherein, the power supply adapter device is used for According to the power-on and power-on actions performed by the tester on the switch, the power-on and discharge process of the PSU is detected and controlled, and when the discharge reaches the preset threshold, a reminder message to remind the tester to perform a new power-on test is output, so as to realize the The estimation of the power-on and discharge time of the PSU reduces the waiting time of the operator and improves the test efficiency.

The above embodiments are only used to illustrate the technical solutions of the present invention, but not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that the foregoing embodiments can still be used for The technical solutions described in the examples are modified, or some or all of the technical features thereof are equivalently replaced; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention, and all of them should cover within the scope of the claims and description of the invention.

Claims (10)

1. a PSU voltage detection system based on server test, is characterized in that, comprises a power supply switching device, one end of described power supply switching device is connected with PSU, and the other end is connected with mainboard; The power supply switching device is used to detect and control the power-on and discharge process of the PSU according to the power-on and power-off actions performed by the tester on the switch, and when the discharge reaches a preset threshold, the output reminds the tester to perform a new operation. A reminder message for a power-on test. 2. The PSU voltage detection system based on server testing according to claim 1, wherein the power supply switching device comprises: a voltage conditioning circuit connected to the PSU output voltage signal; a gain control circuit, connected to the voltage conditioning circuit, for performing gain adjustment on the voltage signal after the voltage conditioning circuit has conditioned the output voltage of the PSU; The ADC acquisition circuit is connected to the gain control circuit, and is used for acquiring the voltage signal adjusted by the gain control circuit; a microcontroller, connected to the ADC acquisition circuit, for performing analytical calculation on the voltage signal acquired by the ADC acquisition circuit, and generating a gain feedback control signal, the gain feedback control signal being used for feedback to the gain control circuit , at the same time generate a start discharge control signal, and when the discharge reaches a preset threshold, generate a stop discharge control signal, and output a reminder message to remind the tester to perform a new power-on test; A charge discharge circuit, connected to the microcontroller, for receiving the start discharge control signal and the stop discharge control signal, and according to the start discharge control signal, to control the discharge of the internal charge of the PSU, and at the same time according to the start discharge control signal The stop discharge control signal is used to control and stop the release of the internal charge of the PSU; A reminder module, connected with the microcontroller, is used for receiving the reminder information sent by the microcontroller and outputting the reminder. 3. The PSU voltage detection system based on server testing according to claim 2, wherein the microcontroller specifically comprises: a voltage signal acquisition module, connected to the ADC acquisition circuit, for acquiring the voltage signal acquired by the ADC acquisition circuit; an analytical calculation module, connected to the voltage signal acquisition module, for performing analytical calculation on the collected voltage signal, and judging the power-on and power-down trends of the PSU; a gain feedback control signal generation module, configured to generate a gain feedback control signal when it is determined that the PSU is in a power-on trend, and feed back the gain feedback control signal to the gain control circuit; a start-discharge control signal generation module, configured to generate a start-discharge control signal when it is determined that the PSU is in a discharge trend, and send the start-discharge control signal to the charge discharge circuit; A preset threshold value judgment module, used to know whether the PSU voltage reaches the preset threshold value during the discharging process; a stop-discharge control signal generation module, configured to generate a stop-discharge control signal, and feed back the generated stop-discharge control signal to the charge discharge circuit; A reminder signal generation module is used to generate reminder information for reminding testers to perform a new power-on test, and feed back the reminder information to the reminder module. 4. The PSU voltage detection system based on server testing according to claim 3, wherein the analytical calculation module specifically comprises: a voltage value selection module, used for selecting a number of consecutive voltage values collected by the ADC circuit collection circuit within the current collection frequency; The difference operation module is used to perform difference operation between two adjacent voltage values according to the principle that the previous voltage value is used as the minuend and the next voltage value is used as the subtrahend, and several voltage difference values are obtained; an analysis module, configured to analyze a plurality of the obtained voltage difference values, and determine the positive and negative value relationship of the voltage difference values; a first determination module, configured to determine that the PSU is in a power-on trend when it is determined that several of the voltage differences are all positive values; The cyclic execution control module is used to re-execute the steps of voltage value selection, difference operation and positive and negative value judgment of the voltage difference in the next acquisition frequency when it is determined that there are negative values in several of the voltage difference values; The second determination module is configured to determine that the PSU is in a discharge trend when it is determined that several of the voltage differences are all negative values. 5. The PSU voltage detection system based on server testing according to claim 3, wherein when the gain control circuit receives the gain feedback control signals G1 and G2, the gain feedback control signal is analyzed to obtain current voltage value; When the current voltage value is greater than 12V, the gain control circuit switches the gain control range to 48V; When the current voltage value is greater than 54V, the gain control circuit switches the gain control range to the next level range greater than 48V. 6. The PSU voltage detection system based on server testing according to claim 3, wherein the microcontroller further comprises: The voltage value generation module is configured to generate the PSU voltage output value while generating the gain feedback control signal, and send the generated PSU voltage output value to the reminder module for reminder. 7 . The PSU voltage detection system based on server testing according to claim 2 , wherein the voltage conditioning circuit comprises a first amplifier U1 , and an inverting input end of the first amplifier U1 is connected in series with a first resistor R1 . 8 . , the second resistor R2 and the third resistor R3 are connected to the PSU voltage output terminal Vin, and the input terminal is grounded in the same direction; A first circuit node is provided on the line between the inverting input end of the first amplifier U1 and the third resistor R3, and the line drawn from the first circuit node is connected to the fourth resistor R4 in series with the first circuit node. An output terminal of an amplifier U1 is collected to a second circuit node, and a first capacitor C1 connected in parallel with the fourth resistor R4 is arranged between the first circuit node and the second circuit node. 8. The PSU voltage detection system based on server testing according to claim 7, wherein the gain control circuit comprises an analog switch circuit, an operational amplifier circuit and a resistor network connected in sequence, wherein: The analog switch circuit is connected to the microcontroller through the gain feedback control signals G1 and G2; the operational amplifier circuit is connected to the analog switch circuit, and the operational amplifier circuit is connected to the resistor network. 9 . The PSU voltage detection system based on server testing according to claim 8 , wherein the operational amplifier circuit comprises a second amplifier U2 , and the non-inverting input end of the second amplifier U2 is connected to the second circuit. 10 . The node is connected, the line drawn from the reverse input end is connected in series with the second capacitor C2 and then collected with the output end to form a third circuit node, the line drawn from the third circuit node is connected in series with the thirteenth resistor R13 and then connected with the ADC acquisition circuit connect; A fourth circuit node and a fifth circuit node are sequentially arranged on the line between the third circuit node and the thirteenth resistor R13; The line drawn from the fifth circuit node is connected to the resistor network and then grounded, wherein the resistor network includes an eighth resistor R8, a ninth resistor R9, and a tenth resistor R10 sequentially connected in series from the fifth circuit node and an eleventh resistor R11, wherein a sixth circuit node is provided on the line between the eighth resistor R8 and the ninth resistor R9, and a line between the ninth resistor R9 and the tenth resistor R10 is provided with a seventh circuit node, an eighth circuit node is provided on the line between the tenth resistor R10 and the eleventh resistor R11; The analog switch includes an analog integrated chip U3, the line drawn from the pin COM of the analog integrated chip U3 is connected to the reverse input end of the second amplifier U2, and the pin A0 and the pin A1 respectively pass the gain feedback control signal. G1 and G2 are connected to the microprocessor, pin NO1 is connected to the fourth circuit node, and pin NO2, pin NO3, and pin NO4 are respectively connected to the sixth circuit node, seventh circuit node, and eighth circuit node. The circuit nodes are correspondingly connected. 10. The PSU voltage detection system based on server testing according to claim 8, wherein the discharge start control signal comprises a first pressure relief discharge control signal SW1 and a second pressure relief discharge control signal SW2; Correspondingly, the charge discharge circuit includes a first discharge circuit and a second discharge circuit: The first discharge circuit includes a field effect transistor Q1 and a field effect transistor Q2. The gate of the field effect transistor Q1 is connected in series with the fifteenth resistor R15 and then connected to the first pressure relief and discharge control signal SW1. The line drawn from the drain of the field effect transistor Q1 is connected in series with the sixteenth resistor R16 and then connected to the voltage terminal VCC_3.3. The line between the drain of the field effect transistor Q1 and the sixteenth resistor R16 is provided with a sixth line. Nine circuit nodes, the line drawn from the ninth circuit node is connected in series with the seventeenth resistor R17 and then connected to the gate of the field effect transistor Q2, and the drain of the field effect transistor Q2 is connected to the PSU voltage output terminal Vin, The source of the field effect transistor Q2 is connected in series with a first bleeder resistor network and then grounded, and the first bleeder resistor network is a series resistor of several packages; The second discharge circuit includes a field effect transistor Q3 and a field effect transistor Q4. The gate of the field effect transistor Q3 is connected in series with the twentieth resistor R20 and then connected to the second pressure relief and discharge control signal SW2. The line drawn from the drain of the field effect transistor Q3 is connected in series with the twenty-first resistor R21 and then connected to the voltage terminal VCC_3.3. The line between the drain of the field effect transistor Q3 and the twenty-first resistor R21 is set. There is a tenth circuit node, the line drawn from the tenth circuit node is connected in series with the twenty-second resistor R22 and then connected to the gate of the field effect transistor Q4, and the drain of the field effect transistor Q4 is connected to the PSU voltage output terminal Vin is connected, the source of the field effect transistor Q4 is connected in series with a second bleeder resistor network and then grounded, and the second bleeder resistor network is a parallel resistor of several packages.

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