CN111970811A

CN111970811A - Circuit board

Info

Publication number: CN111970811A
Application number: CN202010715226.5A
Authority: CN
Inventors: 高顺强; 王晶; 蒋小青; 陈志强; 陈洲; 黄汉杰
Original assignee: Wuhan Telecommunication Devices Co Ltd
Current assignee: Wuhan Telecommunication Devices Co Ltd
Priority date: 2020-07-21
Filing date: 2020-07-21
Publication date: 2020-11-20

Abstract

The present disclosure relates to a circuit board. The circuit board includes a hard board region including: m circuit layers are stacked and provided with one or more installation positions for connecting components with circuits on the circuit layers; m is a positive integer not less than 2; the substrate layers isolating different circuit layers are positioned between two adjacent circuit layers; the via hole passes the isolation layer connects two and treats the connection the line layer, and this circuit board passes through the mode of lamination and stacks substrate layer and line layer in turn to form range upon range of setting up M line layer in hardboard region, make when increasing components and parts on the circuit board, can accomplish the line connection between the components and parts through a plurality of line layers, reduce the line interference, thereby be convenient for high density and high integration circuit board form.

Description

Circuit board

Technical Field

The invention relates to the technical field of electronics, in particular to a circuit board.

Background

Circuit boards, known as printed wiring boards or printed circuit boards, are mainly mounted in electronic equipment and are the main internal components of the electronic equipment. With the continuous miniaturization of electronic devices, especially the continuous development of some optical modules toward miniaturization and high integration, the design layout of the part inside the optical module becomes more and more compact. The circuit boards used in the optical module are decreasing, and the space available for the layout of electronic components such as chips on the circuit boards is smaller and smaller.

Disclosure of Invention

In one aspect, the present disclosure provides a circuit board.

The present disclosure provides a circuit board, including:

a hard plate region comprising:

m circuit layers are stacked and provided with one or more installation positions for connecting components with circuits on the circuit layers; m is a positive integer not less than 2;

the substrate layers isolating different circuit layers are positioned between two adjacent circuit layers;

and the via hole penetrates through the isolation layer and is connected with the two circuit layers to be connected.

In some embodiments, further comprising: a soft board area;

the soft board area includes:

n circuit layers are stacked, wherein the N circuit layers are: the N circuit layers in the middle of the M circuit layers extend outwards to form a circuit layer; a substrate layer for isolating different circuit layers is arranged between every two adjacent circuit layers; n is a positive integer less than M;

and the soft board area is positioned at the outer side of the hard board area.

In some embodiments, M of said line layers comprise:

the power supply layer comprises a power supply circuit used for supplying power to the component;

a first type of signal layer comprising: a line for transmitting a first signal at a first frequency;

a second type of signal layer comprising: a line that transmits a second signal at a second frequency, the first frequency being higher than the second frequency;

the grounding layer is used for grounding;

the via hole is connected with the circuit layer and the grounding layer.

In some embodiments, the first type of signal layer is an even number; the even number of first signal layers are symmetrically distributed on two sides of a middle layer in the base material layer;

and/or the presence of a gas in the gas,

the number of the second signal layers is even; the even number of second-type signal layers are symmetrically distributed on two sides of a middle layer in the base material layer; wherein, the substrate layer is odd number.

In some embodiments, said N of said line layers comprises: the power supply layer;

the ground layer.

In some embodiments, the via comprises:

laser holes for connecting the two circuit layers by penetrating through S1 stacked layers;

a mechanical via connecting the two circuit layers by penetrating through the S2 stacked layers;

the S2 is greater than or equal to the S1, the S2 and the S1 are both positive integers.

In some embodiments, the laser hole penetrates through the first type signal layer and the second type signal layer, and the mechanical hole penetrates through the second type signal layer and the power supply layer and is used for connecting the line of the first type signal layer with the line of the power supply layer.

In some embodiments, the soft board region further comprises:

and the covering layer covers the outer surface of the circuit layer at the outermost side of the soft board area.

In some embodiments, an adhesive layer is further arranged between the covering layer and the circuit layer covered with the covering layer, and is used for bonding the covering layer and the circuit layer.

In another aspect, the present disclosure also provides a manufacturing method, including:

alternately laminating and manufacturing the circuit layers and the substrate layers to form M laminated circuit layers and the substrate layers for isolating two adjacent circuit layers;

and forming a through hole for connecting at least two line layers according to the connection relationship between the line layers.

In some embodiments, the alternately laminating and manufacturing the circuit layers and the substrate layer to form M circuit layers arranged in a laminated manner and the substrate layer isolating two adjacent circuit layers includes:

manufacturing a circuit layer and a substrate layer in an overlapping mode in a hard board area and a soft board area to form N circuit layers and the substrate layer for isolating any two adjacent circuit layers in the N circuit layers to form a laminated structure;

and alternately laminating and manufacturing line layers and substrate layers on the hard board area of the laminated structure to form the residual M-N line layers and the substrate layers for isolating any two adjacent line layers in the residual M-N line layers.

In some embodiments, the overlapping of the hard board region and the soft board region to fabricate the line layer and the substrate layer to form N line layers and a substrate layer to isolate any two adjacent line layers in the N line layers includes:

laminating a power supply layer on the first surface of one substrate layer, and laminating a ground layer on the second surface of the substrate layer to form the N circuit layers; wherein the first surface of the substrate layer is opposite to the second surface of the substrate layer.

In some embodiments, on the hard board region of the laminated structure, circuit layers and substrate layers are alternately laminated to form the remaining M-N circuit layers and the substrate layer isolating any two adjacent circuit layers of the remaining M-N circuit layers, including:

and alternately laminating a base material layer, a second signal layer, a ground layer and a first signal layer, wherein the second signal layer is used for transmitting a second signal of a second frequency, the first signal layer is used for transmitting a first signal of a first frequency, and the second signal layer is sequentially isolated by the base material layer, on the hard board area of the laminated structure, and forming the remaining M-N circuit layers.

In some embodiments, the forming a via hole connecting at least two line layers according to a connection relationship between the line layers includes:

if the number of the layers at intervals between the two connected circuit layers is S1, forming a laser hole between the two circuit layers;

if the number of the layers at the interval between the two connected circuit layers is S2, forming a mechanical hole between the two circuit layers; wherein:

In some embodiments, the method of making, further comprises:

and before alternately laminating and manufacturing the residual M-N line layers and the substrate layers on the hard board area of the laminated structure, manufacturing a covering layer covering the surface of the soft board area on the soft board area of the laminated structure.

The technical scheme provided by the embodiment of the disclosure can have the following beneficial effects:

the circuit board of the embodiment of the disclosure alternately laminates the substrate layer and the circuit layer in sequence in a laminating manner to form M laminated circuit layers in the hard board area, so that when components are mounted on the circuit board, the circuit connection between the components can be completed through the plurality of circuit layers; under the requirement of meeting certain wiring rules, the wiring of a plurality of circuit layers is relatively arranged on one layer by arranging all circuits, so that the arrangement space of components on the circuit board can be effectively utilized, more components can be installed, and the circuit board with high density and high integration can be conveniently formed.

Drawings

Fig. 1 is a schematic cross-sectional view of a circuit board according to an exemplary embodiment.

Fig. 2 is a schematic diagram of a circuit board shown in accordance with an example embodiment.

Fig. 3 is a schematic diagram illustrating high-speed signal routing in a circuit board according to an exemplary embodiment.

Fig. 4 is a circuit board signal simulation verification return loss curve shown in accordance with an exemplary embodiment.

Fig. 5 is a circuit board signal simulation verification insertion loss curve according to an example embodiment.

Fig. 6 is a schematic diagram of another circuit board shown in accordance with an example embodiment.

Fig. 7 is a flow chart illustrating a method of fabricating a circuit board according to an exemplary embodiment.

Detailed Description

In order to make the technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some embodiments of the present invention, but not all embodiments.

The present disclosure provides a circuit board. Fig. 1 is a schematic cross-sectional view of a circuit board according to an exemplary embodiment. As shown in fig. 1, the circuit board includes:

a hard plate region 20 comprising:

and the via hole penetrates through the substrate layer and is connected with the two circuit layers to be connected.

In the exemplary embodiment, the substrate layer and the circuit layer are sequentially and alternately laminated on the circuit board in a laminating manner to form M laminated circuit layers in the hard board region, so that when components are mounted on the circuit board, the circuit connection between the components can be completed through the plurality of circuit layers; under the requirement of meeting a certain line distance, the wiring of a plurality of circuit layers is relatively arranged on one layer with all circuits, so that the arrangement space of components on the circuit board can be effectively utilized, more components can be installed, and the circuit board with high density and high integration can be conveniently formed.

In the present exemplary embodiment, M may be a positive even number not less than 2 as needed in a specific application to obtain an even-numbered circuit board.

In this exemplary embodiment, the substrate layer may be a plurality of layers, and there is the substrate layer between two adjacent circuit layers for isolating the circuit layers, keeping each circuit layer in the insulating environment, and adjusting the dielectric constant during signal transmission through the material distribution of the substrate layer. The isolation layer comprises a substrate layer and/or a line layer between two line layers to be connected. When only the substrate layer between two circuit layers of treating the connection promptly, the isolation layer is two substrate layers of treating between the circuit layer of connecting promptly, when two treat between the circuit layer of connecting except that the substrate layer also have other circuit layers, the isolation layer is two all layers of treating between the circuit layer of connecting promptly, including substrate layer and circuit layer.

In the present exemplary embodiment, the M line layers may be an even number not less than 2.

In the present exemplary embodiment, the components are mounted in mounting sites connected to the wires on the wire layer. The installation site may be plural.

For example, components such as resistors, capacitors, driver chips, etc. can be mounted in the mounting locations of the circuit board, which are connected to the lines in the line layer, according to the circuit traces in the line layer.

In some embodiments, as shown in fig. 1, the circuit board further comprises: a flexible board region 30;

the flexible board area 30 includes:

the soft board area 30 is located outside the hard board area 20.

In the present exemplary embodiment, each of the N circuit layers in the soft board region 30 corresponds to each of the N circuit layers in the middle of the M circuit layers in the hard board region 20 one to one, and are all the same circuit layer, that is, in a physical structure, each of the N circuit layers in the soft board region 30 and each of the N circuit layers in the middle of the M circuit layers in the hard board region 20 are an integral body, so that after the circuit board is manufactured, the hard board region 20 and the soft board region 30 become an integral body, and it is not necessary to further set connection structures such as pads for connecting the hard board and the soft board on the hard board region 20 or the soft board region 30, thereby further saving space occupation on the circuit board, and leaving more installation spaces for the layout of electronic components such as chips.

In the present exemplary embodiment, the flexible board region 30 of the circuit board 10 does not include the base material layer and other wiring layers other than the N wiring layers among the M wiring layers.

In the present exemplary embodiment, especially when M is a positive integer not less than 4, the circuit board is more likely to form a rigid-flex board in which the rigid board region and the flexible board region are combined.

In some embodiments, as shown in fig. 1, the M hard board regions include the following circuit layers:

a power layer 204 including a power line for supplying power to the components;

a first type of signal layer 201 comprising: a line for transmitting a first signal at a first frequency;

a second type signal layer 203 comprising: a line that transmits a second signal at a second frequency, the first frequency being higher than the second frequency;

a ground layer 205 for grounding;

the via connects the circuit layer and the ground layer 205.

The circuit layer and the substrate layer may be collectively referred to as a functional layer; in the present exemplary embodiment, the power plane 204 may be disposed at a central position among a plurality of functional layers disposed in a stacked manner in the circuit board. The via connects the wiring layer, which is a first type signal layer for transmitting a first signal or a second type signal layer for transmitting a second signal, with the ground layer 205.

The first type signal layer 201 can be arranged at a position, close to the first surface of the circuit board, of the M circuit layers, the second type signal layer 203 is arranged between the first type signal layer 201 and the power supply layer 204, or the second type signal layer is arranged at a position, close to the first surface of the circuit board, of the M circuit layers, and the first type signal layer is arranged between the second type signal layer and the power supply layer.

In the present exemplary embodiment, the first frequency may be a frequency band higher than 10GHz, and the second frequency may be a frequency band lower than 10 GHz. The lines included in the first-type signal layer 201 may be high-speed signal lines for transmitting high-frequency signals having a frequency of 10G or more;

the wiring included in the second-type signal layer 203 may be a low-speed signal wiring for transmitting a low-frequency signal having a frequency of 10G or less lower than the first signal frequency;

the ground layer 205 is connected to the ground line of each wiring layer, and forms a loop with the wiring in each signal layer, as a reference layer (voltage is 0 when the wiring is grounded, and this is used as a zero voltage reference of the signal voltage) and a signal shielding layer of each signal layer.

In the present exemplary embodiment, the first-type signal layer 201 further includes: and a line for transmitting a second signal at a second frequency. That is, the first signal layer 201 for transmitting high-frequency signals of 10G or more may transmit low-frequency signals of 10G or less at the same time when transmitting high-frequency signals. That is, the first-type signal layer 201 may include both high-speed signal lines and low-speed signal lines.

In the present exemplary embodiment, the base material layer adjacent to the first-type signal layer 201 including the high-speed signal line for transmitting a high-frequency signal may be made of a high-speed plate material capable of reducing dielectric loss. The Df value (dielectric loss) of the high-speed plate is as small as possible, the dielectric loss generated in the transmission process of the high-speed signal can be reduced, and the signal attenuation of the high-speed signal in the unit length transmission distance is reduced.

and/or the presence of a gas in the gas,

In this exemplary embodiment, the number of the first type signal layers may be even, and/or the number of the second type signal layers may also be even, and the first type signal layers and the second type signal layers are symmetrically distributed on two sides of a middle layer in the substrate layer, so that when the circuit board is used on both sides, the circuit connection of components is more conveniently completed.

In the present exemplary embodiment, the first type signal layer may be an odd number, and/or the second type signal layer may also be an odd number. In this case, the first type signal layer and the second type signal layer may be asymmetrically distributed on both sides of the middle one of the substrate layers. For example, one side of the central one of the substrate layers may have a first type signal layer and a second type signal layer; meanwhile, the other side of the middle layer in the substrate layer can be provided with two first-type signal layers and two second-type signal layers.

Or when the number of the first-type signal layers and the second-type signal layers is odd, all the first-type signal layers are arranged on one side of the middle layer in the base material layer, and all the second-type signal layers are arranged on the other side of the middle layer in the base material layer.

In the present exemplary embodiment, when the number of the first-type signal layers is an even number; the even number of first-type signal layers can also be symmetrically distributed on two sides of the power supply layer;

and/or the presence of a gas in the gas,

the number of the second signal layers is even; the even second-type signal layers are symmetrically distributed on two sides of the power supply layer.

In some embodiments, said N of said line layers comprises: the power layer 204;

the ground plane 205.

In the present exemplary embodiment, the N wiring layers in the flexible board area 30 may include a power layer 204 and a ground layer 205, and the power layer 204 is layered with the power layer 204 of the hard board area 20. Meanwhile, in the present exemplary embodiment, the power plane 204 of the flexible board area 30 may include the high-speed signal lines in the above-described embodiments. The high-speed signal lines included in the signal layers in the hard board area 20 (e.g., the high-speed signal lines in the first-type signal layer 201) may be connected to the high-speed signal lines of the power supply layer 204 in the soft board area 30 through vias.

In the present exemplary embodiment, as shown in fig. 1, the flexible board region 30 does not include the first-type signal layer 201 and the second-type signal layer 203 and the wiring layer disposed symmetrically to the first-type signal layer 201 and the second-type signal layer 203.

In some embodiments, as shown in fig. 1, the via comprises:

laser holes 601 connecting the two circuit layers by penetrating through S1 stacked layers;

a mechanical via 605 for connecting the two wiring layers by penetrating the S2 stacked layers;

In the present exemplary embodiment, the "stacked layers" through which the laser holes 601 penetrate include: a substrate layer and a circuit layer of the hard board area; the "stacked layers" through which the mechanical aperture 605 extends include: the substrate layer and the circuit layer of hardboard region, and the substrate layer and the circuit layer of soft board region. In the present exemplary embodiment, the laser hole 601 may be a trapezoidal hole having a trapezoidal section formed by punching a circuit board by laser. Multiple laser holes between different layers at the same surface location of the circuit board may be stacked together to form vias through the multiple layers. In the plate laminating process, the circuit layer and the base material layer of the circuit board close to the surface of the plate can be rapidly punched through the laser beam so as to form a hole with a smaller aperture than a mechanical hole.

In the present exemplary embodiment, the mechanical hole 605 may be a rectangular hole having a rectangular cross section formed by performing a mechanical operation (e.g., drilling) or the like by a tool such as an electric drill or the like. Can carry out mechanical drilling to circuit board apart from circuit layer and the substrate layer of surperficial certain distance through the electric drill, the degree of depth in the mechanical hole that forms through the electric drill is greater than the laser hole that the laser beam formed, can use once only to run through a plurality of range upon range of circuit layers and substrate layers.

In the present exemplary embodiment, S1 may be 2 due to laser energy and drilling shape limitations.

In some embodiments, the laser hole penetrates through the first type signal layer 201 and the second type signal layer 203, and the mechanical hole 605 penetrates through the second type signal layer 203 and the power layer 204, and is used for connecting the line of the first type signal layer 201 with the line of the power layer 204.

In the exemplary embodiment, when only one substrate layer is arranged between the first-type signal layer 201 and the second-type signal layer 203, the circuit board may be perforated by laser to form laser holes penetrating through the first-type signal layer 201, the substrate layer, and the second-type signal layer 203, and copper plating is filled in the laser holes to realize conductive connection between the lines in the first-type signal layer 201 and the lines in the second-type signal layer 203;

when a plurality of layers are arranged between the second-type signal layer 203 and the power supply layer 204, the circuit board can be drilled by an electric drill to form a mechanical hole 605 which penetrates through the second-type signal layer 203, the power supply layer 204 and other layers between the two layers, the circumferential surface of the mechanical hole 605 is electroplated to form a conductive surface, and resin is filled in the mechanical hole to realize conductive connection between the second-type signal layer 203 and the power supply layer 204. Thus, the first signal in the first-type signal layer 201 can be transmitted to the power layer 204 through the laser hole and the mechanical hole 605, which penetrate through the connection lines formed by the second-type signal layer 203, the power layer 204 and other layers, and then transmitted to the component mounted on the circuit board in the flexible board area 30 through the lines included in the power layer 204 in the flexible board area 30.

In some embodiments, the soft board region 30 further includes: and a cover layer 401 covering the outer surface of the flexible board area 30.

In the present exemplary embodiment, the cover layer 401 is a solder resist layer.

In some embodiments, the soft board region 30 further includes:

and the covering layer 401 covers the outer surface of the circuit layer at the outermost side of the soft board area 30.

In the present exemplary embodiment, the outermost line layer in the flexible printed circuit board area may be the ground layer 205, or may be the first-type signal layer 201 or the second-type signal layer 203.

In some embodiments, an adhesive layer 501 is further disposed between the cover layer 401 and the circuit layer covering the cover layer 401, for adhering the cover layer 401 and the circuit layer.

In the present exemplary embodiment, since the number of layers of the substrate layer and the line layer in the hard board region is greater than the number of layers of the substrate layer and the line layer in the soft board region, the covering layer in the soft board region is a thin film, and the adhesive layer is a thin adhesive layer; meanwhile, according to the mounting and fixing requirements of the circuit board in the equipment, the thickness of the base material layer which is not contained in the soft board area in the hard board area can be increased moderately. As such, the hardness of the hard board region of the circuit board in the present exemplary embodiment is greater than the hardness of the soft board region. The softness and hardness of the soft board area and the hard board area of the circuit board are relatively speaking.

For example, the soft board region is relatively small in thickness, and the soft board region can be bent and curled. In contrast, the hard plate region may be bent or curled to a lesser extent than the soft plate region, and may not even be bent or curled. In the present exemplary embodiment, since the number of line layers in the hard board region is greater than that in the soft board region, the thickness of the circuit board in the hard board region after the manufacturing is completed is also greater than that in the soft board region. When the circuit board forms through the mode of lamination, form the regional circuit layer that shares of hardboard and soft board earlier, then form viscose layer and overburden in the soft board region, do not contain the circuit layer of N placed in the middle in hard board region formation M layer at last to and the substrate layer between the circuit layer. Meanwhile, the substrate layer of the hard board area outside the N circuit layers covers the covering layer of the soft board area, and curing glue is arranged at the joint of the hard board area and the soft board area to enhance the bonding strength of the hard board area and the soft board area.

The present disclosure relates to a rigid-flexible high-speed circuit board 10, including: a hard board area 20 and a soft board area 30, wherein the soft board area comprises a first soft board 31 and a second soft board 32; the hard board area 20 is used for laying and placing components; the flexible board area 30 is used for mounting and connecting optical devices.

The hardboard region 20 of the present disclosure comprises eight copper foil layers (201, 202, 203, 204, 205, 206, 207, 208), i.e., a wiring layer, 7 substrate layers (301, 302, 303, 304, 305, 306, 307), two solder mask layers (101, 102).

In the present exemplary embodiment, the first copper foil layer 201 may be a wiring layer including high-speed signal wiring and low-speed signal wiring. The second copper foil layer 202 is a ground layer, which serves as a reference layer and a signal shielding layer for the high-speed signal of the first copper foil layer 201. The third copper foil layer 203 may be a wiring layer including low speed signal wiring. The fourth copper foil layer 204 is a power layer and includes a power line. The fifth copper foil layer 205 is a ground layer as a shield layer. The sixth copper foil layer 206 is a wiring layer, and includes low-speed signal wiring. The seventh copper foil layer 207 is a ground layer as a shield layer. The eighth copper foil layer 208 is a wiring layer including low speed signal wiring.

The circuit board in the hardboard area also contains laser holes (601, 602, 603, 604). The laser via 601 passes from the first copper foil layer 201 to the second copper foil layer 202. The laser via 602 passes from the first copper foil layer 202 to the second copper foil layer 203. Laser via 603 passes from first copper foil layer 206 to second copper foil layer 207. Laser via 604 passes from first copper foil layer 207 to second copper foil layer 208.

The circuit board in the hard board area also contains a mechanical via 605 passing from the first copper foil layer 203 to the second copper foil layer 206.

The flexible board area 30 is composed of 2 copper foil layers (204, 205), a substrate layer (304, 205), two adhesive layers (501, 502), and two cover films (401, 402).

The first copper foil layer 204 in the flexible printed circuit board area may be a wiring layer including high-speed signal wiring and low-speed signal wiring. The second copper foil layer 205 of the flexible printed circuit board is a ground layer, which serves as a high-speed signal reference layer and a signal shielding layer of the first copper foil layer 204.

The circuit board in the flex area also contains mechanical holes 606. The mechanical holes 606 are through holes from the first cover layer 401 all the way through the underlying layers to the second cover layer 402.

The adhesive layer 501, the covering layer 401 and the base material layer 303 of the hard board area 20 are mixed and pressed to be connected into a whole.

The adhesive layer 502, the covering layer 402 and the substrate layer 305 of the hard board area 20 are mixed, pressed and connected into a whole.

In the present exemplary embodiment, fig. 3 is a schematic diagram illustrating high-speed signal routing in a circuit board according to an exemplary embodiment. As shown in fig. 3, at least one pair of differential high speed signal lines 701 is routed to the first copper foil layer 201 of the circuit layer of the hardboard region 20. And is connected to the fourth copper foil layer 204 of the wiring layer through the via hole 702. Two satellite ground holes 703 are provided on either side of the via 702 to improve signal integrity. After the fourth copper foil layer 204 in the hard board area 20 is subjected to a section of differential wiring 704, the fourth copper foil layer 204 connected to the soft board area 30 is subjected to a section of differential wiring 705, and due to the change of the medium between the hard board and the soft board, the line widths and the line distances of the

differential lines

704 and 705 are different, and the impedance is kept consistent. The softboard area 30 is connected to the optical device by a via 706.

The signal traces and the distribution of the signal trace layers in the present disclosure are merely exemplary and are not limited to the disclosure.

Fig. 4 is a circuit board signal simulation verification return loss curve shown in accordance with an exemplary embodiment. Fig. 5 is a circuit board signal simulation verification insertion loss curve according to an example embodiment. Due to the presence of high speed signals, special attention should be paid in the design to the impedance continuity of the high speed lines, ensuring signal integrity. In the present disclosure, the signal integrity of the high-speed line is verified by simulation, and the return loss curve shown in fig. 4 and the insertion loss curve shown in fig. 5 are obtained. The return loss curve can be found to be below-20 dB in the range of 0-14 GHz and below-10 dB in the range of 0-28 GHz; the insertion loss curve can show that the frequency can be smaller than-1 dB within the range of 0-30 GHz, and can be smaller than-3 dB within the range of 0-40 GHz; the overall evaluation considered the performance to be good.

The circuit board provided by the disclosure can be applied to optical module products, and performance indexes of the circuit board are optimized through internal testing.

The rigid-flexible combined high-speed circuit board design method greatly increases the layout space of components such as chips on a hard board, and effectively solves the space layout problem of high-density and high-integration-level optical module design.

The present disclosure is not limited to use in the field of optical module design, and is applicable to other high-density electronic device circuit board designs.

The manufacturing raw materials of the multilayer PCB comprise the following components: CORE (CORE), PP (prepreg), Foil copper Foil.

CORE is a cured sheet material with copper on both sides, i.e. two copper foil layers, a dielectric material layer, for forming the middle N circuit layers and a substrate layer between the circuit layers.

PP is only a dielectric material, containing resin and glass fibers. In the laminating process, the PP needs to melt the resin at high temperature and is bonded with the copper foil in a laminating way to form a base material layer.

Table 1 shows a material distribution table of a circuit board according to an exemplary embodiment. As shown in Table 1, the raw materials of this example were selected as follows. The symmetrical middle layers L4 and L5 are CORE, and based on the CORE, the outer layers are pressed. The outer layer is made of PP and foil through pressing.

TABLE 1

Wherein, two layers of PP are arranged between the L3 and the L4, aiming at increasing the thickness. In the case that the ultimate thickness of a single PP is not sufficient, two PPs may be selected for lamination. The same applies to L5 and L6.

Fig. 6 is a schematic diagram of another circuit board shown in accordance with an example embodiment. As shown in fig. 6, the present disclosure also provides a circuit board including a hard board 1001 and a flexible board 1002, which are connected by soldering through a bonding pad 1003, and then soldered to the pins of the optical component. In this design, the connection pads 1003 of the hard board and the flexible board occupy a large space, and the layout area 1004 of the components such as chips on the hard board is compressed.

The present disclosure also provides a method of making. Fig. 7 is a flow chart illustrating a method of fabricating a circuit board according to an exemplary embodiment. As shown in fig. 7, the manufacturing method includes:

step 01, alternately laminating and manufacturing line layers and substrate layers to form M stacked line layers and substrate layers for isolating two adjacent line layers;

and 02, forming a via hole for connecting at least two line layers according to the connection relation between the line layers.

In the present exemplary embodiment, the holes may be punched during the circuit board lamination process. For example, in this embodiment, as shown in fig. 1, the circuit layers (including 203, 204, 205, 206) and the substrate layers (303, 304, 305) between the middle circuit layer 203 and the circuit layer 206 are laminated, and mechanical punching is performed once; laminating the middle circuit layer 203 to the

circuit layer

202 and 207, the base material layer 302 and the base material layer 306 outside the circuit layer 206, and performing laser drilling for the first time; after the circuit layer 201, the circuit layer 208, the substrate layer 301 and the substrate layer 307 are laminated, laser drilling is performed again.

In this exemplary embodiment, when alternately stacking and manufacturing the circuit layer and the substrate layer, N circuit layers that are the same in the hard board region and the soft board region are manufactured first, and then another circuit layer in the hard board region is manufactured in the region on the basis of the N circuit layers, so that after the M circuit layers are completed, an integrated circuit board structure including the hard board region and the soft board region can be obtained.

Compared with the method for connecting the hard board split body and the soft board split body through the welding disc to form the integrated circuit board structure, the manufacturing method disclosed by the invention omits the step of connecting the hard board split body and the soft board split body, reduces the manufacturing procedures, improves the manufacturing efficiency, simultaneously omits the welding disc for connecting the hard board split body and the soft board split body, and reduces the manufacturing cost.

In this exemplary embodiment, the substrate layer may be a plurality of layers, and there is the substrate layer between two adjacent circuit layers for keep apart the circuit layer, reduce the line interference.

In the present exemplary embodiment, each of the N circuit layers in the soft board region 30 after the fabrication is performed corresponds to each of the N circuit layers in the M circuit layers in the hard board region 20 in a one-to-one manner, and are all the same circuit layer, that is, in terms of physical structure, each of the N circuit layers in the soft board region 30 and each of the N circuit layers in the hard board region 20 in a center are an integral body, so that after the fabrication of the circuit board is performed, the hard board region 20 and the soft board region 30 become an integral body, and it is not necessary to further set a connection structure such as a pad for connecting the hard board and the soft board on the hard board region 20 or the soft board region 30, thereby further saving space occupation on the circuit board, and leaving more installation space for the layout of electronic components such as chips.

In the present exemplary embodiment, the power supply layer, the ground layer, the second-type signal layer, and the first-type signal layer are all wiring layers.

In the present exemplary embodiment, on one side of the hard sheet region of the laminated structure, a base material layer is laminated first; laminating a second signal layer on the base material layer; a base material layer is laminated on the second signal layer, and a grounding layer is laminated on the base material layer; and laminating a base material layer on the grounding layer, laminating a first signal layer on the base material layer, and simultaneously symmetrically laminating the second signal layer, the grounding layer and the first signal layer on another layer on the hard board area of the laminated structure to form the residual M-N circuit layers and form M circuit layers together with the N circuit layers.

In the present exemplary embodiment, the laser hole 601 may be a trapezoidal hole having a trapezoidal section formed by punching a circuit board by laser. Multiple laser holes 601 between different layers at the same surface location of the circuit board may be stacked together to form vias through multiple layers. The laser beam can realize the rapid punching of the circuit layer and the substrate layer of the circuit board close to the surface of the board so as to obtain a hole with smaller aperture.

In some embodiments, the alternating lamination is used for manufacturing the circuit layer and the substrate layer, forming M circuit layers which are arranged in a lamination way and the substrate layer for isolating two adjacent circuit layers, and further comprising:

and before alternately laminating a circuit layer and a base material layer on the hard board area of the laminated structure, manufacturing a covering layer covering the surface of the soft board area on the soft board area of the laminated structure.

In this exemplary embodiment, the cover layer may be adhered to the surface of the field of flexible board by an adhesive layer.

Other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the invention and including such departures from the present disclosure as come within known or customary practice within the art to which the invention pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.

It will be understood that the invention is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the invention is limited only by the appended claims.

Claims

1. A circuit board, comprising:

a hard plate region comprising:

2. The circuit board of claim 1, further comprising: a soft board area;

the soft board area includes:

n circuit layers are stacked, wherein the N circuit layers are: the N circuit layers in the middle of the M circuit layers extend outwards to form a circuit layer; n is a positive integer less than M;

and the soft board area is positioned at the outer side of the hard board area.

3. The circuit board of claim 2, wherein the M number of said circuit layers comprise:

the grounding layer is used for grounding;

the via hole is connected with the circuit layer and the grounding layer.

4. The circuit board of claim 3, wherein the number of the first signal layers is an even number; the even number of first signal layers are symmetrically distributed on two sides of a middle layer in the base material layer;

and/or the presence of a gas in the gas,

5. The circuit board of claim 3, wherein said N of said circuit layers comprise: the power supply layer;

the ground layer.

6. The circuit board of claim 1, wherein the via comprises:

7. The circuit board of claim 6, wherein the laser hole penetrates through the first type signal layer and the second type signal layer, and the mechanical hole penetrates through the second type signal layer and the power supply layer, for connecting the line of the first type signal layer with the line of the power supply layer.

8. The circuit board of claim 1, wherein the flex area further comprises:

9. The circuit board of claim 8, wherein an adhesive layer is further disposed between the cover layer and the circuit layer covered with the cover layer for bonding the cover layer and the circuit layer.

10. A circuit board manufacturing method is characterized by comprising the following steps:

11. The method of claim 10, wherein the alternately stacking of the circuit layers and the substrate layer to form M circuit layers stacked and the substrate layer separating two adjacent circuit layers comprises:

12. The method of claim 11, wherein the overlapping of the hard board region and the soft board region to form the N circuit layers and the substrate layer separating any two adjacent circuit layers of the N circuit layers comprises:

13. The method of claim 11, wherein alternately laminating a wiring layer and a substrate layer on the hard sheet region of the laminated structure to form the remaining M-N wiring layers and a substrate layer isolating any adjacent two of the remaining M-N wiring layers comprises:

14. The manufacturing method of claim 11, wherein the forming of the via hole connecting at least two line layers according to the connection relationship between the line layers comprises:

15. The method of manufacturing according to claim 11, further comprising: