CN111969076A - 一种基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管及其制作方法 - Google Patents
一种基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管及其制作方法 Download PDFInfo
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Abstract
本发明涉及新型纳米半导体材料光电晶体管的研发与应用领域,具体为一种基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管及其制作方法。二硫化钼(MoS2)因具有优异的光吸收效率和高稳定性而被认为是实现光电晶体管的最具前途的二维纳米材料之一,并且可以和氧化钼(α‑MoO3‑x)形成具有理想界面的二维材料异质结。本发明基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管,其源端α‑MoO3‑x/MoS2异质结可以通过积累空穴改变能带结构,从而产生光增益,增强光生电流,同时漏端异质结通过提供更多空穴进一步增强光增益,使得晶体管具有大的响应度、明暗电流比和外量子效率,得到迄今为止MoS2探测器报道的最高探测度。
Description
技术领域
本发明涉及新型纳米半导体材料光电晶体管的研发与应用领域,具体为一种基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管及其制作方法。
背景技术
自石墨烯被发现以来,基于二维层状材料的光电探测器得到了广泛的研究。与传统的体光电材料相比,二维材料具有许多优异的性质,包括具有原子层厚度、强的光物质耦合以及与层数相关的电学和光学性质等[1]。迄今为止,已经报道了石墨烯、过渡金属硫族化合物(TMDCs)等二维材料的光电探测器。石墨烯具有宽频和高速的特性,但由于其不具备带隙、本征光电探测能力低、光暗电流比小,限制了其在可见光光电探测器中的应用[2]。另一方面,基于二硫化钼(MoS2)、二硫化钨(WS2)、二硒化钨(WSe2)等一系列单层或多层TMDCs的光电晶体管具有特定的带隙,其中MoS2因其高稳定性、优异的光吸收效率并可制备高开关比开关器件而被广泛研究[3]。
2013年,Oriol Lopez-Sanchez等人率先报道了一种较高性能的单层MoS2光电晶体管,在关断区有880A/W的响应度,但需要高达8V的偏压[4],且由于光生载流子的分离主要依赖于MoS2自身缺陷和吸附的水或氧,这些光晶体管的响应度和探测度仍然需要提高。目前,主要通过与量子点、钙钛矿和有机染料分子等材料复合的方法来提高MoS2光电晶体管性能。MoS2复合硫化铅(PbS)量子点的光电探测器具备6×105A/W响应度,但暗电流高达0.26μA,而且探测率较低[5];通过加入有机染料分子或钙钛矿,MoS2光电探测器表现出增强的光吸收和光响应,但同时具有大暗电流和低探测率[6][7]。
除了上述复合方法,使用异质结构是增强光电器件性能的另一种可能方式,在使用体材料的光电器件中,金属-绝缘体-半导体隧穿二极管利用绝缘层-半导体异质结构有效实现了光增益[8]。对于MoS2等层状二维材料,由于表面没有悬挂键,可以与其他具备不同晶格常数的二维材料相互堆叠,得到范德华力异质结,并可进一步形成基于范德华力异质结构的器件[9]。正交相三氧化钼(α-MoO3)是一种具有层状晶体结构的二维材料,具有较高的功函数和较大的带隙(3.2eV),本征材料的电学性质表现为绝缘体,而当通过退火等方式在晶体中引入氧空位得到氧化钼(α-MoO3-x)后(Mo6+还原为Mo5+),可以将其电导率提升3-4个数量级,电学性质表现为导体[10]。α-MoO3-x可以与MoS2形成II型异质结,并可用作电极,利用α-MoO3-x/MoS2异质结可构筑新型MoS2光电探测器。
参考文献:
[1]Long,M.,Wang,P.,Fang,H.&Hu,W.Progress,challenges,and opportunitiesfor 2D material based photodetectors.Adv.Funct.Mater.29,1803807(2019).
[2]Bonaccorso,F.,Sun,Z.,Hasan,T.&Ferrari,A.C.Graphene photonics andoptoelectronics.Nat.Photonics 4,611(2010).
[3]Radisavljevic,B.,Radenovic,A.,Brivio,J.,Giacometti,V.&Kis,A.Singlelayer MoS2transistors.Nat.Nanotechnol.6,147(2011).
[4]Lopez-Sanchez,O.,Lembke,D.,Kayci,M.,Radenovic,A.&Kis,A.Ultrasensitive photodetectors based on monolayer MoS2.Nat.Nanotechnol.8,497(2013).
[5]Kufer,D.et al.Hybrid 2D-0D MoS2-PbS quantum dotphotodetectors.Adv.Mater.27,176(2015).
[6]Kang,D.H.et al.An ultrahigh-performance photodetector based on aperovskite-transition-metal-dichalcogenide hybrid structure.Adv.Mater.28,7799(2016).
[7]Yu,S.H.et al.Dye-sensitized MoS2 photodetector with enhancedspectral photoresponse.ACS Nano 8,8285(2014).
[8]Green,M.A.&Shewchun,J.Current multiplication in metal-insulator-semiconductor(MIS)tunnel diodes.Solid-State Electron.17,349(1974).
[9]Liu,Y.et al.Van der Waals heterostructures anddevices.Nat.Rev.Mater.1,16042(2016).
[10]Castro,I.A.et al.Molybdenum oxides–from fundamentals tofunctionality.Adv.Mater.29,1701619(2017).
发明内容:
本发明的目的在于提出一种基于氧化钼(α-MoO3-x)/二硫化钼(MoS2)/α-MoO3-x异质结构的光电晶体管及其制作方法,利用α-MoO3-x/MoS2异质结构产生光电流增益,使得晶体管具备大的响应度、明暗电流比和外量子效率,并得到目前基于MoS2探测器最大的探测度。
本发明的技术方案:
一种基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管,光电晶体管是由氧化钼(α-MoO3-x)电极、二硫化钼(MoS2)沟道和控制沟道的栅极介质层组成。
所述的基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管,α-MoO3-x是通过退火方法在α-MoO3中形成氧空位并增强导电性后的多层单晶,多层是指11~40层,x的值为0~1。
所述的基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管,MoS2为单层或少数层单晶,少数层是指2~10层。
所述的基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管,栅极介质层由硅(Si)半导体衬底作为栅电极,以衬底上二氧化硅(SiO2)绝缘层作为介电层;α-MoO3-x电极包括源电极和漏电极,源电极和漏电极设置于介电层上;MoS2沟道分别设置于源电极上,漏电极上,以及源电极和漏电极之间的介电层上;氧化铪(HfO2)作为封装层。
所述的基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管的制作方法,包括如下步骤:
(1)通过微机械剥离将11~40层的多层α-MoO3剥离到表面有280~320nm厚SiO2绝缘层的p型掺杂Si衬底上,将少数层MoS2剥离到聚二甲基硅氧烷(PDMS)上;
(2)对多层α-MoO3材料进行图案化,控制反应离子刻蚀时间,从而实现对多层α-MoO3进行最优刻蚀;
(3)通过自组装的异质结转印平台,将PDMS上的少数层MoS2释放到图案化的多层α-MoO3上,通过堆叠形成α-MoO3/MoS2异质结;
(4)将堆叠完成的α-MoO3/MoS2异质结放入真空退火炉中退火处理;
(5)在退火处理后的α-MoO3-x电极上构建引线电极;
(6)采用原子层沉积技术沉积HfO2钝化层,对α-MoO3-x/MoS2异质结光电晶体管进行封装。
所述的基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管的制作方法,步骤(2)中,选择α-MoO3材料的厚度范围为15~60nm,使用反应离子刻蚀(RIE)进行刻蚀,控制RIE刻蚀的时间范围30~90s,刻蚀条件为:使用流速为15~25sccm三氟甲烷和流速为3~5sccm氧气为刻蚀气体,压强1.5~2.5Pa,功率80~120W。
所述的基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管的制作方法,步骤(3)中,控制MoS2释放过程中样品温度为10~25℃。
所述的基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管的制作方法,步骤(4)中,通过退火,α-MoO3转变为α-MoO3-x,控制真空退火温度为250~450℃,升温时间为10min~1h,保温时间为30min~2h,随炉冷却至室温。
所述的基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管的制作方法,步骤(5)中,引线电极为钛(Ti)层与金(Au)层复合,先在衬底及α-MoO3-x电极上蒸镀厚度范围为4~6nm的Ti层,然后继续蒸镀厚度范围为50~60nm的Au层。
所述的基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管的制作方法,步骤(6)中,使用原子层沉积(ALD)方法在器件表面沉积5~15nm厚的HfO2钝化层,对器件进行封装;使用原子层沉积HfO2钝化层的条件为:源为HfCl4和H2O的摩尔比为1:1,沉积温度为150~250℃。
本发明的设计思想:
二硫化钼(MoS2)因具有优异的光吸收效率和高稳定性而被认为是实现光电晶体管的最具前途的二维纳米材料之一,并且可以和氧化钼(α-MoO3-x)形成具有理想界面的二维材料异质结。本发明提出的一种α-MoO3-x/MoS2/α-MoO3-x结构光电晶体管,其源端α-MoO3-x/MoS2异质结可以通过空穴积累改变能带结构而产生光增益,放大光生电流,同时漏端异质结可以通过提供更多空穴进一步增加光增益,从而使得晶体管具备大的响应度、明暗电流比和外量子效率,并得到目前MoS2探测器最大的探测度。
本发明的优点及有益效果是:
1、本发明所获得的光电晶体管表现出优异光电性能:在405nm激光照射下,响应度达到2.8×105A/W,明暗电流比超过106,探测度达到8.2×1016cm Hz1/2W-1,外量子效率达到8.6×107%,其中探测度代表目前已报道的MoS2探测器的最大值。
2、本发明提出的新型光电晶体管工作机制和设计结构,使用异质结实现二维材料光电晶体管光增益,为未来最终实现高性能纳米材料光电晶体管奠定基础。
附图说明
图1为一种氧化钼(α-MoO3-x)/二硫化钼(MoS2)/α-MoO3-x结构光电晶体管制造工艺流程图。其中,(a)在二氧化硅(SiO2)-硅(Si)衬底上剥离多层三氧化钼(α-MoO3);(b)对多层α-MoO3进行图形化;(c)在聚二甲基硅氧烷(PDMS)上剥离少数层MoS2;(d)将少数层MoS2转移到图形化的α-MoO3上;(e)在真空中使用350℃退火2小时;(f)利用电子束曝光和电子束蒸发沉积金属引线,并用原子层沉积(ALD)技术封装光电晶体管。
图2为α-MoO3的刻蚀实验图片。其中,(a)α-MoO3刻蚀前光学照片;(b)α-MoO3刻蚀后光学照片;(c)使用反应离子刻蚀(RIE)刻蚀α-MoO3及SiO2的厚度-时间曲线。
图3为真空退火前的α-MoO3和真空退火后的α-MoO3-x的电流-电压曲线,插图为测试样品的光学照片。图中,横坐标Bias Voltage代表施加偏压(V),纵坐标Current代表所测得电流(A)。
图4为对α-MoO3和α-MoO3-x的光学表征。其中,(a)α-MoO3真空退火前后的拉曼光谱表征,横坐标Ramanshift代表拉曼位移(cm-1),纵坐标Intensity代表相对强度(a.u.);(b)α-MoO3真空退火前后的X射线光电子谱(XPS)表征,横坐标Binding energy代表结合能(eV),纵坐标Intensity代表相对强度(a.u.);(c)α-MoO3的透射电子显微镜(TEM)照片;(d)α-MoO3-x的TEM照片。
图5为α-MoO3-x/MoS2/α-MoO3-x结构光电晶体管的结构及形貌表征。其中,(a)光电晶体管结构示意图;(b)光电晶体管原子力图像(AFM)照片;(c)为图(b)中α-MoO3-x/MoS2异质结的厚度表征,横坐标位置是(b)图中虚线从左到右的距离(μm),纵坐标高度是沿着(b)图中的虚线从左到右的高度(nm);(d)光电晶体管截面TEM照片。
图6为α-MoO3-x/MoS2/α-MoO3-x结构光电晶体管光电性能表征,所用光波长为405nm。其中,(a)VDS=1V时,在不同功率密度的入射光下的VGS-IDS曲线,横坐标VGS代表栅电压(V),纵坐标IDS代表源漏电流(A);(b)响应度(R)随入射光功率密度变化曲线,偏置条件为VDS=1V,VGS=-100V;(c)明暗电流比(Ilight/Idark)随入射光功率密度的变化曲线,偏置条件为VDS=1V,VGS=-100V;(d)外量子效率(EQE)和探测度(D*)随入射光功率密度的变化曲线,偏置条件为VDS=1V,VGS=-100V。
图7为使用不同电极时MoS2探测器光电性能对比。其中,(a)MoS2探测器的光学图像和偏置条件,晶体管T1的源漏电极均为钛-金(Ti-Au),T2的源漏电极分别为Ti-Au和α-MoO3-x,T3的源漏电极分别为α-MoO3-x和Ti-Au,T4的源漏电极均为α-MoO3-x。(b)在黑暗和波长为405nm、功率密度为0.1mW/cm2的入射光测试下,4个光电晶体管的VGS-IDS曲线,横坐标VGS代表栅电压(V),纵坐标IDS代表源漏电流(A)。
图8为α-MoO3-x/MoS2/α-MoO3-x结构光电晶体管工作时的能带和工作原理示意图。工作原理主要为:(1)光生空穴积累致能带改变,(2)源端电子注入产生光增益,以及(3)漏端空穴注入进一步增强光增益。
具体实施方式
在具体实施过程中,本发明涉及的一种氧化钼(α-MoO3-x)/二硫化钼(MoS2)/α-MoO3-x结构光电晶体管,使用α-MoO3-x/MoS2异质结产生光电流增益,从而极大的提升了MoS2探测器的性能,为未来最终实现高性能纳米材料光电晶体管奠定了基础。
本发明用电子束曝光(EBL)、干法刻蚀、干法转移、真空退火和原子层沉积(ALD)技术制备α-MoO3-x/MoS2/α-MoO3-x结构光电晶体管的方法如下:
(1)通过微机械剥离将11~40层的多层三氧化钼(α-MoO3)剥离到表面有290nm厚二氧化硅(SiO2)绝缘层的p型掺杂硅(Si)衬底上,将2~10层的少数层MoS2剥离到聚二甲基硅氧烷(PDMS)上;
(2)对于通过反应离子刻蚀(RIE)对α-MoO3图形化,首先尝试不同的刻蚀气氛,如:氧气(O2)、氩气(Ar)、三氟甲烷(CHF3)、四氟化碳(CF4)、六氟化硫(SF6)等。在确定CHF3和O2混合气氛下可以实现对α-MoO3刻蚀后,对RIE刻蚀条件进行优化。选择平整的α-MoO3材料,其厚度范围为15~60nm,通过电子束曝光工艺,将材料的一部分用聚甲基丙烯酸甲酯(PMMA)进行保护,在CHF3和O2流量分别为20sccm和5sccm时,气体压强2.0Pa,刻蚀功率为100W,分别尝试刻蚀时间20s、40s、50s、60s等。刻蚀后将材料上保护部分的PMMA清洗干净,通过原子力显微镜(AFM)测量刻蚀后材料表面的台阶,最终获取在这一条件下RIE对α-MoO3的刻蚀速率。
(3)为了使PDMS上的MoS2顺利转移到图形化的α-MoO3上,需要验证堆叠异质结时温度条件。分别尝试不同转移温度15℃、20℃、40℃、70℃等,最终得到当温度为25℃以下时,更容易将MoS2从PDMS上转移到图形化的α-MoO3上。
(4)对于异质结真空退火条件的优化,使用真空管式炉,尝试使用不同的退火条件。升温时间分别为10min、30min、1h;保温时间分别为30min、1h、2h;温度分别为250℃、300℃、350℃、450℃。最终得到升温时间为30min,保温时间为2h,温度为350℃时,器件具有最优性能。
(5)在退火处理后的α-MoO3-x电极上构建引线电极,引线电极为钛(Ti)层与金(Au)层复合,先在衬底及α-MoO3-x电极上蒸镀厚度范围为4~6nm的Ti层,然后继续蒸镀厚度范围为50~60nm的Au层。
(6)对于器件封装层进行优化,分别尝试沉积三氧化二铝(Al2O3)、二氧化铪(HfO2)和二氧化钛(TiO2);及不同的厚度5nm、10nm、15nm等;不同的沉积温度150℃,200℃,250℃等。最终获得采用原子层沉积技术沉积HfO2钝化层,源为HfCl4和H2O的摩尔比为1:1,在200℃条件下,沉积5nm厚的HfO2是最优封装层选择。
下面,通过实施例进一步证实本发明的可行性。
实施例
本实施例中,一种α-MoO3-x/MoS2/α-MoO3-x结构光电晶体管构筑方法如下:
如图1所示,通过如下五个步骤器件构筑器件:(a)在SiO2-Si衬底上剥离多层α-MoO3(11~40层);(b)对多层α-MoO3进行图形化;(c)在PDMS上剥离少数层MoS2(2~10层);(d)将少数层MoS2转移到图形化的α-MoO3上;(e)在真空中使用350℃退火2小时;(f)利用EBL和电子束蒸发(EVE)沉积金属引线,并用ALD技术封装光电晶体管。
其中,在SiO2-Si衬底上剥离多层α-MoO3采用微机械剥离法:Novoselov,K.S.,Geim,A.K.,Morozov,S.V.,et al.Electric Field Effect in Atomically Thin CarbonFilms.Science,306,666-669(2004).
如图2所示,在对多层α-MoO3进行图形化时,使用RIE对α-MoO3刻蚀的工艺参数为:功率100W,气体及流量为20sccm的CHF3和5sccm O2,处理时长20s。对比处理前后光学照片(a)和(b)发现该工艺可以有效实现对α-MoO3的刻蚀,通过图(c)的厚度-刻蚀时间曲线分析刻蚀速率。
如图3所示,在真空中350℃退火2小时后,对比真空退火前后电导率变化,退火后材料电导率可增加四个数量级。
如图4所示,对α-MoO3和α-MoO3-x进行了材料表征。(a)α-MoO3真空退火前后的拉曼(Raman)光谱表征表明退火后钼氧成键强度明显降低;(b)α-MoO3真空退火前后的X射线光电子谱(XPS)表征显示退火后Mo5+出现,表明退火后晶体中产生了氧空位;(c)和(d)α-MoO3和α-MoO3-x的透射电子显微镜(TEM)照片表明退火后晶格常数降低,说明氧空位的出现。
如图5所示,对器件形貌进行示意和表征:(a)器件结构示意图,使用α-MoO3-x作为源漏电极,MoS2作为沟道材料,表面具有SiO2的P型掺杂Si衬底为栅堆叠。其中,栅极介质层由Si半导体衬底作为栅电极,以衬底上SiO2绝缘层作为介电层;α-MoO3-x作为源电极和漏电极设置于介电层上;MoS2沟道分别设置于源电极上和漏电极上,以及源电极和漏电极之间的介电层上;HfO2作为封装层对器件进行封装;(b)对成功制备的器件进行原子力显微镜(AFM)测试,沿着白色虚线表征了材料的厚度;(c)通过对器件进行AFM测试和分析得到α-MoO3-x厚度约为20nm,MoS2厚度约为5.4nm;(d)对所制备的器件进行了截面TEM镜表征,表明α-MoO3-x和MoS2形成了高质量的范德华异质结,封装层HfO2厚度约为5nm。
如图6所示,对器件进行光电性能表征,入射光波长为405nm。(a)当VDS=1V时,随入射光功率密度从0增加到13.5mW/cm2,器件VGS-IDS曲线显示了明显的光电响应;(b)当VDS=1V,VGS=-100V时,随入射光功率密度的增加,器件的响应度随之增加至峰值2.8×105A/W;(c)光电流与暗电流比值随入射光功率密度的增加而增加,在入射光功率密度为13.5mW/cm2时,达到最大值2×107;(d)按照如下方式计算外量子效率EQE和探测度D*,EQE=hcRλ-1e-1,D*=RA1/2(2eIdark)-1/2,其中h为普朗克常数(6.6×10-34Js)、c为光速(3×108m/s)、R为器件的探测度(2.8×105A/W)、λ是入射光波长(405nm)、e是电子电荷量(1.6×10-19C)、A是器件吸光面积(3μm2),Idark是器件暗电流(1.2×10-12A)。在入射光功率密度为0.55mW/cm2时,EQE和D*分别达到极值8.6×107%和8.2×1016cm Hz1/2W-1(已报道的MoS2探测器探测度的最大值)。
如图7所示,使用不同电极时MoS2探测器光电性能对比。(a)MoS2探测器的光学图像和偏置条件,晶体管T1的源漏电极均为Ti-Au,T2的源漏电极分别为Ti-Au和α-MoO3-x,T3的源漏电极分别为α-MoO3-x和Ti-Au,T4的源漏电极均为α-MoO3-x。(b)在黑暗和波长为405nm、功率密度为0.1mW/cm2的入射光测试下,4个光电晶体管的VGS-IDS曲线,源级使用α-MoO3-x的T3和T4晶体管具有明显的光电响应,源漏级均使用α-MoO3-x的T4晶体管具有最大的光电响应,相比于使用金电极的器件T1和T2,其光电流可提升超过三个数量级以上。
如图8所示,α-MoO3-x/MoS2/α-MoO3-x结构光电晶体管工作时的能带和工作原理示意图。晶体管在栅极电压的作用下处于关断状态,即分布在MoS2两端的势垒层较厚。当漏端相对于源端施加正电压时,源端和漏端α-MoO3-x/MoS2异质结分为反向和正向偏置,源漏电压基本施加于源端α-MoO3-x/MoS2异质结,而漏端异质结只分得可忽略的电压降,尚未开启。(1)当有光照时,在源端异质结的MoS2耗尽区内将产生光生电子-空穴对,空穴在电场作用下到达异质结界面处,由于受限于势垒高度,空穴将在此处积累;另一方面,光生电子将积累在漏端附近能带低谷处。(2)积累的空穴产生了正电荷,将与α-MoO3-x中的负电荷建立电场,增加α-MoO3-x中的电压降;另一方面,因为源漏电压降恒定(主要都加在源端异质结),加在MoS2内的电压降将降低,能带如虚线所示。源端α-MoO3-x导带底和费米能级上升,异质结界面处的电子面对的势垒高度显著降低,这些电子将通过隧穿和热电子发射到达MoS2一侧,产生光增益。(3)随着漏端附近能带低谷处积累电子的增多,由这些电子产生的电场将使得漏端α-MoO3-x/MoS2异质结正偏,MoS2价带电子将进入α-MoO3-x中已经电离的氧空位缺陷能级,从而产生更多空穴,这些空穴将增加光增益,同时在运动到源端异质结界面处后还将进一步增加该处空穴积累,产生正反馈。整个过程将和电子空穴对的复合达到平衡,最终得到大的光增益。
实例结果表明,本发明提出的一种α-MoO3-x/MoS2/α-MoO3-x结构光电晶体管,可通过α-MoO3-x/MoS2异质结产生光增益,从而使得晶体管具备大的响应度、明暗电流比和外量子效率,并得到目前MoS2探测器最大的探测度。本发明提出的新型光电晶体管工作机制和结构,极大的提升了MoS2探测器的性能,为未来最终实现高性能纳米材料光电晶体管奠定了基础。
Claims (10)
1.一种基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管,其特征在于,光电晶体管是由氧化钼(α-MoO3-x)电极、二硫化钼(MoS2)沟道和控制沟道的栅极介质层组成。
2.按照权利要求1所述的基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管,其特征在于,α-MoO3-x是通过退火方法在α-MoO3中形成氧空位并增强导电性后的多层单晶,多层是指11~40层,x的值为0~1。
3.按照权利要求1所述的基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管,其特征在于,MoS2为单层或少数层单晶,少数层是指2~10层。
4.按照权利要求1所述的基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管,其特征在于,栅极介质层由硅(Si)半导体衬底作为栅电极,以衬底上二氧化硅(SiO2)绝缘层作为介电层;α-MoO3-x电极包括源电极和漏电极,源电极和漏电极设置于介电层上;MoS2沟道分别设置于源电极上,漏电极上,以及源电极和漏电极之间的介电层上;氧化铪(HfO2)作为封装层。
5.一种权利要求1至4之一所述的基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管的制作方法,其特征在于,包括如下步骤:
(1)通过微机械剥离将11~40层的多层α-MoO3剥离到表面有280~320nm厚SiO2绝缘层的p型掺杂Si衬底上,将少数层MoS2剥离到聚二甲基硅氧烷(PDMS)上;
(2)对多层α-MoO3材料进行图案化,控制反应离子刻蚀时间,从而实现对多层α-MoO3进行最优刻蚀;
(3)通过自组装的异质结转印平台,将PDMS上的少数层MoS2释放到图案化的多层α-MoO3上,通过堆叠形成α-MoO3/MoS2异质结;
(4)将堆叠完成的α-MoO3/MoS2异质结放入真空退火炉中退火处理;
(5)在退火处理后的α-MoO3-x电极上构建引线电极;
(6)采用原子层沉积技术沉积HfO2钝化层,对α-MoO3-x/MoS2异质结光电晶体管进行封装。
6.按照权利要求5所述的基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管的制作方法,其特征在于,步骤(2)中,选择α-MoO3材料的厚度范围为15~60nm,使用反应离子刻蚀(RIE)进行刻蚀,控制RIE刻蚀的时间范围30~90s,刻蚀条件为:使用流速为15~25sccm三氟甲烷和流速为3~5sccm氧气为刻蚀气体,压强1.5~2.5Pa,功率80~120W。
7.按照权利要求5所述的基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管的制作方法,其特征在于,步骤(3)中,控制MoS2释放过程中样品温度为10~25℃。
8.按照权利要求5所述的基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管的制作方法,其特征在于,步骤(4)中,通过退火,α-MoO3转变为α-MoO3-x,控制真空退火温度为250~450℃,升温时间为10min~1h,保温时间为30min~2h,随炉冷却至室温。
9.按照权利要求5所述的基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管的制作方法,其特征在于,步骤(5)中,引线电极为钛(Ti)层与金(Au)层复合,先在衬底及α-MoO3-x电极上蒸镀厚度范围为4~6nm的Ti层,然后继续蒸镀厚度范围为50~60nm的Au层。
10.按照权利要求5所述的基于氧化钼/二硫化钼/氧化钼异质结构的光电晶体管的制作方法,其特征在于,步骤(6)中,使用原子层沉积(ALD)方法在器件表面沉积5~15nm厚的HfO2钝化层,对器件进行封装;使用原子层沉积HfO2钝化层的条件为:源为HfCl4和H2O的摩尔比为1:1,沉积温度为150~250℃。
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