CN111969029A - TFT device structure for OLED display panel - Google Patents

TFT device structure for OLED display panel Download PDF

Info

Publication number
CN111969029A
CN111969029A CN202010898209.XA CN202010898209A CN111969029A CN 111969029 A CN111969029 A CN 111969029A CN 202010898209 A CN202010898209 A CN 202010898209A CN 111969029 A CN111969029 A CN 111969029A
Authority
CN
China
Prior art keywords
layer
electrode
display panel
insulating layer
oled display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202010898209.XA
Other languages
Chinese (zh)
Other versions
CN111969029B (en
Inventor
孔善右
张仕明
黄德云
葛栋
李丽咱
任军
韦华
朱崇芝
王国庆
王梓
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jiangsu Shibang Flexible Electronics Research Institute Co ltd
Original Assignee
Jiangsu Shibang Flexible Electronics Research Institute Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jiangsu Shibang Flexible Electronics Research Institute Co ltd filed Critical Jiangsu Shibang Flexible Electronics Research Institute Co ltd
Priority to CN202010898209.XA priority Critical patent/CN111969029B/en
Publication of CN111969029A publication Critical patent/CN111969029A/en
Application granted granted Critical
Publication of CN111969029B publication Critical patent/CN111969029B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/121Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/126Shielding, e.g. light-blocking means over the TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/40OLEDs integrated with touch screens

Abstract

The invention belongs to the technical field of OLED display, and particularly relates to a TFT device structure for an OLED display panel, which comprises: the TFT array substrate comprises a substrate, a backing layer is arranged on the upper surface of the substrate, a light shielding layer is arranged on the upper surface of the backing layer, a polycrystalline silicon layer covering the light shielding layer and the backing layer is arranged on the upper surface of the light shielding layer, a dielectric layer covering the polycrystalline silicon layer is arranged on the upper surface of the polycrystalline silicon layer, a semiconductor layer is arranged on one side of the upper surface of the dielectric layer, a grid insulation layer covering the semiconductor layer and the dielectric layer is arranged on the upper surface of the semiconductor layer, a grid is arranged on the upper surface of the grid insulation layer, an interlayer insulation layer covering the grid and the grid insulation layer is arranged on the upper surface of the grid, and a source electrode and; the invention has better performance and lower material process cost.

Description

TFT device structure for OLED display panel
Technical Field
The invention belongs to the technical field of OLED display, and particularly relates to a TFT device structure for an OLED display panel.
Background
Thin film transistors have various structures, and various materials are used to prepare thin film transistors having corresponding structures, Low Temperature Polysilicon (LTPS) is a preferred one of the structures, and because of the regular arrangement of atoms of LTPS, the mobility of carriers is high, and for voltage-driven liquid crystal display devices, LTPS has high mobility. The electron mobility of the conventional amorphous silicon material is about 0.5-1.0cm2/V.S, while the electron mobility of the low-temperature polysilicon can reach 30-300cm 2/V.S. Therefore, the LTPS-TFTLCD has the advantages of high resolution, high reaction speed, high aperture opening ratio and the like, and is widely applied to high-end mobile phones and tablet computers.
In the process of manufacturing a TFT device, a silicon nitride (SiNx) layer, a silicon oxide (SiO2) layer, a silicon oxynitride (SiON) layer, or a stacked structure thereof is generally used as an insulating medium to function as an insulator or a barrier to ions.
Currently, In the manufacturing process of a touch display device, an "In-cell" or "on-cell" mode is generally adopted to perform an integrated operation on a touch panel and a liquid crystal panel. The on-cell touch technology is a method for embedding a touch screen between a color filter substrate and a polarizer of a display screen, namely, a touch sensor is arranged on a liquid crystal panel; in-cell touch technology is to integrate the whole touch control component into the display panel by embedding the touch panel function into the liquid crystal pixel, so that the display device and the touch control device are combined into a whole, the thickness of the screen is effectively reduced, and the difficulty of the terminal product In structural design can be reduced.
However, In-cell technology requires a touch sensor to be embedded In a pixel on a Thin Film Transistor (TFT) array substrate, so that the manufacturing process is complicated, the yield of products is reduced, and the area of a display area is reduced, which may cause deterioration of image quality of a display device. In addition, the current AMOLED adopts a self-light emitting technology, and although a touch sensor (touch sensor) can be prepared on a package glass, the defects of uneven display (Mura) and high alignment difficulty of a display device caused by mutual interference of light still exist.
Disclosure of Invention
The invention provides a TFT device structure for an OLED display panel, and aims to solve the problems of complex manufacturing process, high process cost and poor product performance of the existing TFT device in the background art.
In order to achieve the purpose, the invention provides the following technical scheme: a TFT device structure for an OLED display panel, comprising:
the TFT array substrate comprises a substrate, wherein a liner layer is arranged on the upper surface of the substrate, a light shielding layer is arranged on the upper surface of the foundation layer, a polycrystalline silicon layer covering the light shielding layer and the foundation layer is arranged on the upper surface of the light shielding layer, a dielectric layer covering the polysilicon layer is arranged on the upper surface of the polysilicon layer, a semiconductor layer is arranged on one side of the upper surface of the dielectric layer, a gate insulating layer covering the semiconductor layer and the dielectric layer is disposed on the upper surface of the semiconductor layer, a gate electrode is arranged on the upper surface of the gate insulating layer, an interlayer insulating layer covering the gate electrode and the gate insulating layer is arranged on the upper surface of the gate electrode, a source electrode and a drain electrode are arranged on the upper surface of the interlayer insulating layer, the source electrode and the drain electrode sequentially penetrate through the interlayer insulating layer and the grid electrode insulating layer, and the source electrode and the drain electrode are respectively abutted against two ends of the semiconductor layer;
the insulating layer is arranged on the upper surface of the TFT array substrate, and the lower surface of the insulating layer is provided with a hollow groove for accommodating the source electrode and the drain electrode;
the signal lead is arranged on the upper surface of the insulating layer, penetrates through the insulating layer and reaches the empty groove, and is electrically connected with the source electrode and the drain electrode.
Preferably, the dielectric layer comprises an aluminum oxide layer and an aluminum nitride layer which are sequentially arranged from bottom to top.
Preferably, the insulating layer upper surface is provided with the cover the insulating layer with the flat layer of signal lead wire, flat layer upper surface just is located the signal lead wire top is provided with the OLED module, flat layer upper surface just is located one side of OLED module is provided with the drive electrode, drive electrode upper surface is provided with the cover drive electrode and part the pixel definition layer of flat layer, pixel definition layer top joint has the proud dielectric layer that makes progress, the dielectric layer upper surface is provided with sensing electrode.
Preferably, the OLED module comprises an anode clamped on the upper surface of the flat layer, the upper surface of the flat layer is provided with two through lead-out holes, two ends of the anode can extend into the two lead-out holes respectively, the upper surface of the anode is provided with an OLED device layer, and the upper surface of the OLED device layer is provided with a cathode.
Preferably, a light extraction layer is vertically provided at one end of the cathode, and the light extraction layer is closely attached to the sidewall of the pixel defining layer.
Preferably, a clamping groove is formed in one side, located on the driving electrode, of the upper surface of the flat layer, and a clamping block matched with the clamping groove is fixed on the anode.
Preferably, the upper surface of the top of the pixel definition layer is provided with a containing groove matched with the dielectric layer, two sides of the bottom of the containing groove are respectively provided with an L-shaped groove, and two corners of the bottom of the dielectric layer are respectively provided with an L-shaped block matched with the L-shaped groove.
Preferably, the gate electrode, the source electrode, and the drain electrode have a single-layer structure including a molybdenum layer or a double-layer structure including a molybdenum layer and an aluminum layer stacked on each other.
Preferably, the light shielding layer is trapezoidal.
Preferably, the thickness of the grid electrode is 2000-3000 angstroms, and the grid electrode is made of molybdenum.
Compared with the prior art, the invention has the beneficial effects that: the TFT device has more excellent structure performance and lower material process cost, the dielectric layer with a double-layer structure formed by overlapping the aluminum oxide layer and the aluminum nitride layer can protect a semiconductor layer, the aluminum nitride has good thermal conductivity and chemical stability and can form a good contact interface with silicon, and the aluminum nitride layer can eliminate the thermal stress of the aluminum oxide layer and the silicon interface and avoid forming a silicon-oxygen compound at the interface at high temperature; by arranging the three-dimensional trapezoid light shielding layer on the foundation layer, the width-to-length ratio of the channel is increased on the basis of not increasing the projection area, and the performance of the TFT device is improved.
Drawings
FIG. 1 is a schematic structural view of the present invention;
FIG. 2 is an enlarged view of a portion of FIG. 1 at A;
FIG. 3 is a schematic structural diagram of a TFT array substrate according to the present invention;
in the figure: 1-insulating layer, 11-empty groove, 2-flat layer, 21-clamping groove, 22-leading-out hole, 3-signal lead, 4-OLED module, 41-anode, 411-clamping block, 42-OLED device layer, 43-cathode, 5-pixel definition layer, 51-containing groove, 52-L groove, 6-TFT array substrate, 61-substrate, 62-light shielding layer, 63-dielectric layer, 631-aluminum oxide layer, 632-aluminum nitride layer, 64-polysilicon layer, 65-semiconductor layer, 66-gate insulating layer, 67-gate, 68-interlayer insulating layer, 69-source, 610-drain, 611-liner layer, 7-driving electrode, 8-dielectric layer, 9-sensing electrode, and 10-light extraction layer.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1-3, the present invention provides a technical solution: a TFT device structure for an OLED display panel, comprising:
the TFT array substrate 6 comprises a substrate 61, the substrate 61 is provided with a backing layer 611 on the upper surface, a light shielding layer 62 is arranged on the upper surface of the backing layer 611, a polycrystalline silicon layer 64 covering the light shielding layer 62 and the backing layer 611 is arranged on the upper surface of the light shielding layer 62, a dielectric layer 63 covering the polycrystalline silicon layer 64 is arranged on the upper surface of the polycrystalline silicon layer 64, a semiconductor layer 65 is arranged on one side of the upper surface of the dielectric layer 63, a gate insulating layer 66 covering the semiconductor layer 65 and the dielectric layer 63 is arranged on the upper surface of the semiconductor layer 65, a gate electrode 67 is arranged on the upper surface of the gate insulating layer 66, an interlayer insulating layer 68 covering the gate electrode 67 and the gate insulating layer 66 is arranged on the upper surface of the gate electrode 67, a source electrode 69 and a drain electrode 610 are arranged on the upper surface of the interlayer insulating layer;
the insulating layer 1, the insulating layer 1 is set up on the upper surface of TFT array base plate 6, the lower surface of insulating layer 1 has empty slots 11 to hold source 69 and drain 610;
the signal lead 3, the signal lead 3 is disposed on the upper surface of the insulating layer 1, and the signal lead 3 penetrates the insulating layer 1 into the empty slot 11, and the signal lead 3 is electrically connected to the source 69 and the drain 610.
In this embodiment, when manufacturing the TFT device, a substrate 61 is first required, a patterned three-dimensional light-shielding layer 62 is formed on the foundation layer 2, and then a trench is formed above the patterned three-dimensional light-shielding layer, so that the width of the trench can be effectively increased on the premise of ensuring that the projected area of the substrate is not changed, the width-to-length ratio of the trench is further enlarged, and the on-state current is increased. The material of the liner layer 2 is a silicon nitride layer, the polysilicon layer 64 is etched to form an active region, the dielectric layer 63 is formed on the polysilicon layer 64 in a magnetron sputtering mode, the dielectric layer 63 is used as a buffer layer, then the gate insulating layer 66 is formed by etching, the stack of the gate 67 and the gate insulating layer 66 at least has a stack type gate 67 overlapped above a channel region of the active region, and the process for forming the low-temperature polysilicon semiconductor layer 65 is the same as that in the prior art. The interlayer insulating layer 68 and the insulating layer 1 have double functions, and the signal lead 3 penetrates into the empty slot 11 to be electrically connected with the source 69 and the drain 610, so that the manufacturing process is simple, the cost is low, and the use is convenient.
Further, the dielectric layer 63 includes an aluminum oxide layer 631 and an aluminum nitride layer 632 sequentially disposed from bottom to top.
In this embodiment, the aluminum oxide has excellent characteristics of moisture and metal ions isolation, strong chemical corrosion resistance, high thermal stability, and the like, and can well protect the semiconductor layer 65 and the TFT device, and the aluminum nitride has excellent thermal conductivity and chemical stability, and can eliminate thermal stress at the interface between the aluminum oxide layer 631 and the silicon.
Further, the upper surface of the insulating layer 1 is provided with a flat layer 2 covering the insulating layer 1 and the signal lead 3, the upper surface of the flat layer 2 is provided with an OLED module 4 above the signal lead 3, one side of the upper surface of the flat layer 2, which is located on the OLED module 4, is provided with a driving electrode 7, the upper surface of the driving electrode 7 is provided with a pixel defining layer 5 covering the driving electrode 7 and a part of the flat layer 2, the top of the pixel defining layer 5 is clamped with an upward protruding dielectric layer 8, and the upper surface of the dielectric layer 8 is provided with a sensing electrode 9.
In this embodiment, the dielectric layer 8 is made of an insulating material, and the driving electrode 7, the dielectric layer 8 and the sensing electrode 9 together form an inductor structure, so that the pixel on the TFT array substrate 1 is embedded with a touch sensor function, thereby realizing integration of a display device and a touch device.
Further, the OLED module 4 includes an anode 41 clamped on the upper surface of the flat layer 2, the upper surface of the flat layer 2 is provided with two through lead-out holes 22, two ends of the anode 41 can extend into the two lead-out holes 22 respectively, the upper surface of the anode 41 is provided with an OLED device layer 42, and the upper surface of the OLED device layer 42 is provided with a cathode 43.
In this embodiment, the two ends of the anode 41 can extend into the two extraction holes 22, and can be electrically connected with the source 69 and the drain 610 respectively, so that the operation is convenient, and the OLED device layer 42 can be used as a light emitting layer of the display device.
Further, a light extraction layer 10 is vertically disposed at one end of the cathode 43, and the light extraction layer 10 is closely attached to the sidewall of the pixel defining layer 5.
In the present embodiment, the light extraction layer 10 is made of an organic material.
Furthermore, a clamping groove 21 is formed on one side of the upper surface of the flat layer 2 and the side of the driving electrode 7, and a clamping block 411 matched with the clamping groove 21 is fixed on the anode 41.
In the embodiment, the fixture block 411 is clamped into the clamping groove 21, so that the anode 41 is mounted and is convenient to detach, and the fixture block 411 and the clamping groove 21 are rectangular, so that the space is saved.
Further, the top surface of the pixel defining layer 5 is provided with a receiving groove 51 adapted to the dielectric layer 8, two sides of the bottom of the receiving groove 51 are respectively provided with L-shaped grooves 52, and two corners of the bottom of the dielectric layer 8 are respectively provided with L-shaped blocks 81 adapted to the L-shaped grooves 52.
In this embodiment, the two L blocks 81 are correspondingly engaged into the two L grooves 52, so as to mount and dismount the dielectric layer 8, thereby facilitating replacement of the dielectric layer 8 made of a different material.
Further, the gate electrode 67, the source electrode 69, and the drain electrode 610 have a single-layer structure formed of a molybdenum layer or a double-layer structure formed of a molybdenum layer and an aluminum layer stacked.
In this embodiment mode, the weight of the entire device is reduced, so that the thickness of the TFT device is reduced, and the cost is reduced.
Further, the light-shielding layer 62 has a trapezoidal shape.
In this embodiment, the trapezoidal light-shielding layer 62 can effectively increase the width of the trench and further increase the width-to-length ratio of the trench on the premise of maintaining the projected area of the substrate unchanged
Further, the thickness of the gate 67 is 2000-3000 angstroms, and the gate 67 is made of molybdenum.
In the present embodiment, the gate electrode 67 made of molybdenum is most effectively used, and the thickness of the gate electrode 67 is preferably 2500 a.
The working principle and the using process of the invention are as follows: after the present invention is installed, when manufacturing and producing the TFT device, a substrate 61 is needed first, a patterned three-dimensional light shielding layer 62 is formed on the foundation layer 2, and then a trench is formed above the patterned three-dimensional light shielding layer, so that the width of the trench can be effectively increased on the premise of ensuring that the projected area of the substrate is not changed, the width-to-length ratio of the trench is further enlarged, and the on-state current is increased. The material of the liner layer 2 is a silicon nitride layer, the polysilicon layer 64 is etched to form an active region, the dielectric layer 63 is formed on the polysilicon layer 64 in a magnetron sputtering mode, the dielectric layer 63 is used as a buffer layer, then the gate insulating layer 66 is formed by etching, the stack of the gate 67 and the gate insulating layer 66 at least has a stack type gate 67 overlapped above a channel region of the active region, and the process for forming the low-temperature polysilicon semiconductor layer 65 is the same as that in the prior art. The interlayer insulating layer 68 and the insulating layer 1 have double functions, and the signal lead 3 penetrates into the empty slot 11 to be electrically connected with the source 69 and the drain 610, so that the manufacturing process is simple, the cost is low, and the use is convenient.
The present invention is not limited to the above preferred embodiments, and any modifications, equivalent substitutions and improvements made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (10)

1. A TFT device structure for an OLED display panel, comprising:
a TFT array substrate (6), the TFT array substrate (6) includes a substrate (61), the upper surface of the substrate (61) is provided with a backing layer (611), the upper surface of the backing layer (611) is provided with a light shielding layer (62), the upper surface of the light shielding layer (62) is provided with a polysilicon layer (64) covering the light shielding layer (62) and the backing layer (611), the upper surface of the polysilicon layer (64) is provided with a dielectric layer (63) covering the polysilicon layer (64), one side of the upper surface of the dielectric layer (63) is provided with a semiconductor layer (65), the upper surface of the semiconductor layer (65) is provided with a gate insulating layer (66) covering the semiconductor layer (65) and the dielectric layer (63), the upper surface of the gate insulating layer (66) is provided with a gate electrode (67), the upper surface of the gate electrode (67) is provided with an interlayer insulating layer (68) covering the, a source electrode (69) and a drain electrode (610) are arranged on the upper surface of the interlayer insulating layer (68), the source electrode (69) and the drain electrode (610) sequentially penetrate through the interlayer insulating layer (68) and the gate insulating layer (66), and the source electrode (69) and the drain electrode (610) are respectively abutted to two ends of the semiconductor layer (65);
the insulating layer (1), the insulating layer (1) is arranged on the upper surface of the TFT array substrate (6), and the lower surface of the insulating layer (1) is provided with a hollow groove (11) for accommodating the source electrode (69) and the drain electrode (610);
the signal lead (3) is arranged on the upper surface of the insulating layer (1), the signal lead (3) penetrates through the insulating layer (1) to the inside of the empty groove (11), and the signal lead (3) is electrically connected with the source electrode (69) and the drain electrode (610).
2. A TFT device structure for an OLED display panel as claimed in claim 1 wherein: the dielectric layer (63) comprises an aluminum oxide layer (631) and an aluminum nitride layer (632) which are sequentially arranged from bottom to top.
3. A TFT device structure for an OLED display panel as claimed in claim 2 wherein: insulating layer (1) upper surface is provided with the cover insulating layer (1) with flat layer (2) of signal lead wire (3), flat layer (2) upper surface just is located signal lead wire (3) top is provided with OLED module (4), flat layer (2) upper surface just is located one side of OLED module (4) is provided with drive electrode (7), drive electrode (7) upper surface is provided with the cover drive electrode (7) and part the pixel definition layer (5) of flat layer (2), pixel definition layer (5) top joint has upwards bellied dielectric layer (8), dielectric layer (8) upper surface is provided with sensing electrode (9).
4. A TFT device structure for an OLED display panel as claimed in claim 3 wherein: OLED module (4) are in including the joint level layer (2) upper surface positive pole (41), level layer (2) upper surface is seted up two and is link up draw-out hole (22), positive pole (41) both ends can extend to two respectively draw out in the hole (22), positive pole (41) upper surface is provided with OLED device layer (42), OLED device layer (42) upper surface is provided with negative pole (43).
5. A TFT device structure for an OLED display panel as claimed in claim 4 wherein: and a light extraction layer (10) is vertically arranged at one end of the cathode (43), and the light extraction layer (10) is tightly attached to the side wall of the pixel defining layer (5).
6. A TFT device structure for an OLED display panel as claimed in claim 4 wherein: a clamping groove (21) is formed in one side, located on the driving electrode (7), of the upper surface of the flat layer (2), and a clamping block (411) matched with the clamping groove (21) is fixed on the anode (41).
7. A TFT device structure for an OLED display panel as claimed in claim 3 wherein: the upper surface of the top of the pixel defining layer (5) is provided with a containing groove (51) matched with the dielectric layer (8), two sides of the bottom of the containing groove (51) are respectively provided with an L-shaped groove (52), and two corners of the bottom of the dielectric layer (8) are respectively provided with an L block (81) matched with the L-shaped groove (52).
8. A TFT device structure for an OLED display panel as claimed in claim 1 wherein: the gate electrode (67), the source electrode (69), and the drain electrode (610) have a single-layer structure formed of a molybdenum layer or a double-layer structure formed of a molybdenum layer and an aluminum layer stacked on each other.
9. A TFT device structure for an OLED display panel as claimed in claim 1 wherein: the shading layer (62) is trapezoidal.
10. A TFT device structure for an OLED display panel as claimed in claim 1 wherein: the thickness of the grid electrode (67) is 2000-3000 angstroms, and the grid electrode (67) is made of molybdenum.
CN202010898209.XA 2020-08-31 2020-08-31 TFT device structure for OLED display panel Active CN111969029B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010898209.XA CN111969029B (en) 2020-08-31 2020-08-31 TFT device structure for OLED display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010898209.XA CN111969029B (en) 2020-08-31 2020-08-31 TFT device structure for OLED display panel

Publications (2)

Publication Number Publication Date
CN111969029A true CN111969029A (en) 2020-11-20
CN111969029B CN111969029B (en) 2023-07-25

Family

ID=73400158

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010898209.XA Active CN111969029B (en) 2020-08-31 2020-08-31 TFT device structure for OLED display panel

Country Status (1)

Country Link
CN (1) CN111969029B (en)

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006179874A (en) * 2004-11-26 2006-07-06 Semiconductor Energy Lab Co Ltd Method of manufacturing semiconductor device
KR100858822B1 (en) * 2007-05-11 2008-09-17 삼성에스디아이 주식회사 Thin film transitor, organic light emitting display device comprising the same and manufacturing of the organic light emitting display device
CN104423084A (en) * 2013-09-09 2015-03-18 上海仪电显示材料有限公司 Mask and manufacturing method of filter plate
CN104538454A (en) * 2014-12-26 2015-04-22 深圳市华星光电技术有限公司 Low-temperature polycrystalline silicon thin film transistor and manufacturing method thereof
CN105870201A (en) * 2016-06-08 2016-08-17 深圳市华星光电技术有限公司 TFT device structure and production method thereof
CN107393933A (en) * 2017-07-31 2017-11-24 京东方科技集团股份有限公司 Manufacture method, array base palte and the display panel of array base palte
US9885933B1 (en) * 2016-01-28 2018-02-06 Wuhan China Star Optoelectronics Technology Co., Ltd. TFT array substrate and manufacturing method thereof
US20180301519A1 (en) * 2017-04-13 2018-10-18 Japan Display Inc. Display device
CN109298590A (en) * 2018-09-26 2019-02-01 深圳市华星光电技术有限公司 For making the light shield and liquid crystal display panel of liner type BPS
CN109616494A (en) * 2018-11-12 2019-04-12 惠科股份有限公司 A kind of array substrate, the production method of array substrate and display panel
CN110164923A (en) * 2019-04-23 2019-08-23 深圳市华星光电半导体显示技术有限公司 OLED display panel and preparation method thereof
CN110908199A (en) * 2019-11-15 2020-03-24 武汉华星光电技术有限公司 Array substrate and liquid crystal display panel

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006179874A (en) * 2004-11-26 2006-07-06 Semiconductor Energy Lab Co Ltd Method of manufacturing semiconductor device
KR100858822B1 (en) * 2007-05-11 2008-09-17 삼성에스디아이 주식회사 Thin film transitor, organic light emitting display device comprising the same and manufacturing of the organic light emitting display device
CN104423084A (en) * 2013-09-09 2015-03-18 上海仪电显示材料有限公司 Mask and manufacturing method of filter plate
CN104538454A (en) * 2014-12-26 2015-04-22 深圳市华星光电技术有限公司 Low-temperature polycrystalline silicon thin film transistor and manufacturing method thereof
US9885933B1 (en) * 2016-01-28 2018-02-06 Wuhan China Star Optoelectronics Technology Co., Ltd. TFT array substrate and manufacturing method thereof
CN105870201A (en) * 2016-06-08 2016-08-17 深圳市华星光电技术有限公司 TFT device structure and production method thereof
US20180301519A1 (en) * 2017-04-13 2018-10-18 Japan Display Inc. Display device
CN107393933A (en) * 2017-07-31 2017-11-24 京东方科技集团股份有限公司 Manufacture method, array base palte and the display panel of array base palte
CN109298590A (en) * 2018-09-26 2019-02-01 深圳市华星光电技术有限公司 For making the light shield and liquid crystal display panel of liner type BPS
CN109616494A (en) * 2018-11-12 2019-04-12 惠科股份有限公司 A kind of array substrate, the production method of array substrate and display panel
CN110164923A (en) * 2019-04-23 2019-08-23 深圳市华星光电半导体显示技术有限公司 OLED display panel and preparation method thereof
CN110908199A (en) * 2019-11-15 2020-03-24 武汉华星光电技术有限公司 Array substrate and liquid crystal display panel

Also Published As

Publication number Publication date
CN111969029B (en) 2023-07-25

Similar Documents

Publication Publication Date Title
US10930719B2 (en) Array substrate, method of making array substrate and display device having sub-pixels with transparent etching layer
US11133369B2 (en) Flexible display panel and manufacturing method thereof
US7488982B2 (en) Thin film transistor and manufacturing method thereof, and active matrix display device and manufacturing method thereof
CN101626036B (en) Thin-film transistor and manufacture method thereof and comprise the panel display apparatus of this transistor
CN109300915A (en) A kind of array substrate, display panel and display device
US11335709B2 (en) Array substrate, display panel, display device and method for forming array substrate
CN108878503A (en) Oled display substrate and its manufacturing method, OLED display panel, display device
WO2020143433A1 (en) Array substrate, preparation method thereof, and related device
US11522090B2 (en) Flat panel detection substrate, fabricating method thereof and flat panel detector
US11121226B2 (en) Thin film transistor and method for manufacturing the same, array substrate and display device
KR102089244B1 (en) Double gate type thin film transistor and organic light emitting diode display device including the same
CN113327936B (en) Array substrate and preparation method thereof
CN109309122A (en) Array substrate and its manufacturing method, display device
CN104698661A (en) Display panel and method for manufacturing the same
US8748892B2 (en) Thin film transistor and method for fabricating the same
CN111584577A (en) Display panel and manufacturing method thereof
CN102237372A (en) Array substrate and method of fabricating the same
CN110707106A (en) Thin film transistor, preparation method and display device
US11488982B2 (en) Display panel and organic light emitting display panel
WO2015180349A1 (en) Flexible display substrate and preparation method therefor, and flexible display device
US10714514B2 (en) Back-channel-etched TFT substrate
CN111969029B (en) TFT device structure for OLED display panel
CN107808885B (en) Back channel etching type oxide semiconductor TFT substrate and manufacturing method thereof
CN110223990A (en) Top gate structure and preparation method thereof, array substrate, display equipment
US11844250B2 (en) Display panel including grooved inorganic layer in bending area and display device including display panel

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant