CN111865277A

CN111865277A - Power supply switch circuit and electric equipment

Info

Publication number: CN111865277A
Application number: CN202010832205.1A
Authority: CN
Inventors: 李绍飞; 陈智慧; 罗烜; 郭凡玉
Original assignee: Chengdu T Ray Technology Co Ltd
Current assignee: Chengdu T Ray Technology Co Ltd
Priority date: 2020-08-18
Filing date: 2020-08-18
Publication date: 2020-10-30

Abstract

The application provides a power supply switch circuit and electric equipment. The power supply switch circuit comprises an NMOS transistor, a control module, a charge-discharge module, a switch power supply and a load; the control module is used for outputting an indication voltage to the charging and discharging module; the charge-discharge module is used for conducting the switching power supply and the grid electrode of the transistor when the indication voltage is at a high level so as to switch the drain electrode of the transistor and the source electrode of the transistor into a conducting state; when the indication voltage is at a low level, the fourth terminal is turned on with the gate of the transistor to switch the drain of the transistor and the source of the transistor to an off state. The switching of high and low levels is output through the third end of the charge and discharge module to realize the switching of the on-off state of the transistor, thereby realizing the control of the whole circuit switch. Compared with the prior scheme, the NMOS transistor has higher switching frequency, short semi-conduction time, small generated heat and lower switching loss of the switching element.

Description

Power supply switch circuit and electric equipment

Technical Field

The application relates to the field of switches, in particular to a power supply switch circuit and electric equipment.

Background

With scientific progress and social development, the human society has more and more utilization forms and deeper dependence on electric energy. Various electric devices are widely used in various industries and fields. The electric equipment is often required to be provided with a switch to control the equipment. The sensitivity and quality of the switch determine to some extent the response speed and the frequency of failure of the consumer.

The existing circuit switch is mostly realized by adopting a relay, and the relay switch has the problems of low reaction speed and short service life. Possibly, equipment damage may result because of switch failure.

Disclosure of Invention

An object of the present application is to provide a power supply switch circuit and an electric device, so as to solve the above problems.

In order to achieve the above purpose, the embodiments of the present application employ the following technical solutions:

in a first aspect, an embodiment of the present application provides a power supply switch circuit, where the power supply switch circuit includes an NMOS transistor, a control module, a charge/discharge module, a switching power supply, and a load, an anode of the load is connected to a positive power supply electrode, a cathode of the load is connected to a drain of the NMOS transistor, and a source of the NMOS transistor is connected to a negative power supply electrode;

the charge and discharge module comprises a first end, a second end, a third end and a fourth end, wherein the first end is connected with the switching power supply, the second end is connected with the control module, the third end is connected with the grid electrode of the NMOS transistor, and the fourth end is connected with the power supply negative electrode;

the control module is used for outputting an indication voltage to the charging and discharging module;

the charge-discharge module is used for enabling the switching power supply to be conducted with the grid electrode of the NMOS transistor when the indication voltage is at a high level, and enabling the fourth end to be disconnected with the grid electrode of the NMOS transistor so as to switch the drain electrode of the NMOS transistor and the source electrode of the NMOS transistor into conduction states;

the charge-discharge module is further configured to disconnect the switching power supply from the gate of the NMOS transistor when the indication voltage is at a low level, and connect the fourth terminal to the gate of the NMOS transistor, so as to switch the drain of the NMOS transistor and the source of the NMOS transistor to a disconnected state.

Further, the control module comprises an operational amplifier, a reference voltage unit and a control voltage unit, wherein the control voltage unit is connected with a non-inverting input end of the operational amplifier, the reference voltage unit is connected with an inverting input end of the operational amplifier, and an output end of the operational amplifier is connected with the second end;

the control voltage unit is used for outputting control voltage to the non-inverting input end;

the reference voltage unit is used for outputting a reference voltage to the inverting input end;

the operational amplifier is used for outputting a high-level indicating voltage to the second end by the output end when the control voltage is higher than the reference voltage; and the output end is also used for outputting an indication voltage with a low level to the second end when the control voltage is lower than the reference voltage.

Furthermore, the power supply positive terminal of the operational amplifier is connected with the switching power supply, and the power supply negative terminal of the operational amplifier is respectively connected with the power supply negative electrode and the ground.

Furthermore, the control module further comprises a first capacitor, one end of the first capacitor is connected with the switching power supply, and the other end of the first capacitor is connected with the ground.

Further, the control voltage unit comprises a first resistor and a second resistor, and the reference voltage unit comprises a third resistor and a voltage divider;

one end of the first resistor is connected with one end of the second resistor, the other end of the second resistor is connected with the power supply negative electrode, the non-inverting input end is connected between the first resistor and the second resistor, and the other end of the first resistor is connected with the control signal input end;

one end of the third resistor is connected with one end of the voltage dividing piece, the other end of the third resistor is connected with the switching power supply, the other end of the voltage dividing piece is connected with the power supply negative electrode, and the inverting input end is connected between the third resistor and the voltage dividing piece.

Further, the control module further comprises a diode and a fourth resistor, wherein the anode of the diode is connected to the output end, the cathode of the diode is connected to one end of the fourth resistor, and the other end of the fourth resistor is connected between the second resistor and the non-inverting input end.

Further, the voltage divider is a voltage regulator tube, a fifth resistor or an equal-voltage reference IC.

Furthermore, the control module further comprises a sixth resistor, one end of the sixth resistor is connected with the output end, and the other end of the sixth resistor is connected with the second end.

Further, the charge-discharge module comprises a first triode and a second triode, the first triode is an NPN triode, the second triode is a PNP triode, the first end is a collector of the first triode, the fourth end is a collector of the second triode, a base of the first triode and a base of the second triode are both connected with the second end, and an emitter of the first triode and an emitter of the second triode are both connected with the third end.

In a second aspect, an embodiment of the present application provides an electric device, which includes the power supply switch circuit as claimed above.

Compared with the prior art, the power supply switch circuit and the electric equipment provided by the embodiment of the application have the beneficial effects that: the power supply switch circuit comprises an NMOS transistor, a control module, a charge-discharge module, a switch power supply and a load; the control module is used for outputting an indication voltage to the charging and discharging module; the charge-discharge module is used for conducting the switching power supply and the grid electrode of the NMOS transistor when the indication voltage is at a high level so as to switch the drain electrode of the NMOS transistor and the source electrode of the NMOS transistor into a conducting state; and when the indication voltage is in a low level, the fourth end is conducted with the grid electrode of the NMOS transistor so as to switch the drain electrode of the NMOS transistor and the source electrode of the NMOS transistor into an off state. The switching of the on-off state of the NMOS transistor is realized by controlling the circuit switching of the conduction with the grid electrode of the NMOS transistor, so that the control of the whole circuit switch is realized. Compared with the prior scheme, the NMOS transistor has higher switching frequency, short semi-conduction time, small generated heat and lower switching loss of the switching element.

In order to make the aforementioned objects, features and advantages of the present application more comprehensible, preferred embodiments accompanied with figures are described in detail below.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and it will be apparent to those skilled in the art that other related drawings can be obtained from the drawings without inventive effort.

Fig. 1 is a schematic connection diagram of a PMOS switch circuit according to an embodiment of the present disclosure;

fig. 2 is a schematic connection diagram of a power supply switch circuit according to an embodiment of the present disclosure;

FIG. 3 is a schematic connection diagram of a control module according to an embodiment of the present disclosure;

fig. 4 is a schematic connection diagram of a charge-discharge module according to an embodiment of the present disclosure.

In the figure: 10-a control module; 20-a charge-discharge module; 30-a switching power supply; 40-load; 101-a control voltage unit; 102-reference voltage unit.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.

Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.

It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

In the description of the present application, it should be noted that the terms "upper", "lower", "inner", "outer", and the like indicate orientations or positional relationships based on orientations or positional relationships shown in the drawings or orientations or positional relationships conventionally found in use of products of the application, and are used only for convenience in describing the present application and for simplification of description, but do not indicate or imply that the referred devices or elements must have a specific orientation, be constructed in a specific orientation, and be operated, and thus should not be construed as limiting the present application.

In the description of the present application, it is also to be noted that, unless otherwise explicitly specified or limited, the terms "disposed" and "connected" are to be interpreted broadly, e.g., as being either fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.

Some embodiments of the present application will be described in detail below with reference to the accompanying drawings. The embodiments described below and the features of the embodiments can be combined with each other without conflict.

When a circuit or a device realizing a certain function is powered by direct current, the state switching of the open state and the closed state of a power supply circuit needs to be controlled. A common dc power supply switch circuit uses a PMOS transistor (P-Metal-Oxide-Semiconductor) as a switch.

Referring to fig. 1, Q4 is a PMOS transistor, Q5 is an NPN transistor, positive + is input positive, -is input negative, and DRIVE is a control signal controlling Q4 to be turned on and off. Specifically, there are two cases:

first, when DRIVE is high, current flows through resistor R8, turning on transistor Q5. Then, current flows from VIN + through R7, R9, and Q5 in that order. Assuming that the input voltage is 24V, R7 has the same resistance as R9, the voltage across R7 is 12V, i.e., the gate of Q4 is 12V lower than the source low voltage, Q4 is fully turned on, and the power supply circuit is turned on.

Second, when DRIVE is low, no current flows through resistor R8 and transistor Q5 turns off. No current flows through R7, R9 and Q5, the gate and source potentials of Q4 are the same, Q4 is off, and the power supply circuit is off.

After extensive practice, observation and summary by the inventors, the inventors found the following technical disadvantages.

1, when the input voltage (VIN +) is low, such as 1V, Q4 will not turn on because PMOS turn on requires a voltage threshold between its gate and source, which is typically greater than 1V.

2, Q4 cannot switch the switching state quickly and the switching losses are large.

Suppose model Q4 is si7155dp, the relevant parameters of which are shown in table 1, according to the data manual.

TABLE 1

The parasitic capacitance Ciss between the gate and the source of Q4 is 12900pF, and the input voltage is 24V. When Q4 is turned on, the maximum current for charging Ciss is 24V/20K-1.2 mA. When Q4 is turned off, the maximum current of Ciss discharge is 12V/20K-0.6 mA. Assuming that Ciss charging current is always 1.2mA at turn-on, Q4 is completely turned on when the voltage between the gate and the source of Q4 is 5V, and Q4 is turned on for a time T12900 × 5/1.2 — 53.75 (uS). Assuming that the Ciss discharge current is always 0.6mA at the time of turn-off, Q4 is completely turned off when the voltage between the gate and the source of Q4 is 0V, and Q4 is turned off for T12900 × 5/0.6 — 107.5 (uS). If Q4 is turned off immediately after being turned on and turned on immediately after being turned off, the maximum switching frequency is about 1/161.25uS to 6.2 kHz. If the switching frequency is required to be more than 6.2kHz, the circuit is designed according to the parameters in the table 1, and the circuit shown in the figure 1 can not meet the use requirement.

Meanwhile, because the duration of the process of turning on and off the Q4 is long, the duration of half-on is long, the on-resistance of the Q4 is very large when the Q4 is half-on, and large power is lost when large current flows, the circuit shown in fig. 1 may cause the Q4 to generate large power loss when used in a high-frequency switch, possibly cause the Q4 to generate heat seriously and be damaged, possibly cause the efficiency of a product power supply to be reduced, the temperature rise to be high, the reliability to be reduced, and the service life to be shortened.

In order to solve the above problem, the present embodiment provides a power supply switch circuit, as shown in fig. 2, the power supply switch circuit includes an NMOS (N-Metal-Oxide-Semiconductor) transistor Q3, a control module 10, a charging and discharging module 20, a switching power supply 30, and a load 40. The positive electrode of the load 40 is connected to the positive electrode of the power supply, the negative electrode of the load 40 is connected to the drain (D) of the NMOS transistor Q3, and the source (S) of the NMOS transistor Q3 is connected to the negative electrode of the power supply.

The charge and discharge module 20 includes a first terminal, a second terminal, a third terminal, and a fourth terminal. The first end is connected with the switching power supply 30, the second end is connected with the control module 10, the third end is connected with the grid (G) of the NMOS transistor Q3, and the fourth end is connected with the negative electrode of the power supply.

The control module 10 is configured to output the instruction voltage to the charge/discharge module 20.

The indication voltage can be high level or low level, and different levels represent different requirements.

The charge/discharge module 20 is configured to turn on the switching power supply 30 and the gate of the NMOS transistor Q3 when the voltage is indicated as high, and turn off the fourth terminal and the gate of the NMOS transistor Q3, so as to switch the drain of the NMOS transistor Q3 and the source of the NMOS transistor Q3 to the on state.

Specifically, the switching power supply 30 is turned on with the gate of the NMOS transistor Q3, the charging current in the line charges the capacitance (Ciss) between the gate and the source of the NMOS transistor Q3, the voltage between the gate and the source of the NMOS transistor Q3 rises, and once the voltage between the gate and the source of the NMOS transistor Q3 exceeds the turn-on threshold of Q3, the drain and the source of the NMOS transistor Q3 switch to the on state. The power supply anode and the power supply cathode are conducted to supply power to the load 40.

Assuming that the maximum dc current of the charging current is 1A, the capacitance between the gate and the source of the NMOS transistor Q3 is charged with a current of 1A. Assuming that the model Q3 is BSC010N04LS6, and the relevant parameters are shown in table 2 according to the data sheet, with Ciss of 4600pF, assuming that Q3 is fully turned on when the gate-to-source voltage reaches 5V, the time required for the gate-to-source level of Q3 to reach 5V from 0V is: 4600 × 5/1 ═ 23(nS), i.e., Q3 on time is 23 nS.

TABLE 2

The charge/discharge module 20 is further configured to disconnect the switching power supply 30 from the gate of the NMOS transistor Q3 and connect the fourth terminal to the gate of the NMOS transistor Q3 when the voltage is indicated as low level, so as to switch the drain of the NMOS transistor Q3 and the source of the NMOS transistor Q3 to an off state.

Specifically, the switching power supply 30 is disconnected from the gate of the NMOS transistor Q3, and the fourth terminal is connected to the gate of the NMOS transistor Q3, at this time, the capacitor between the gate and the source of the NMOS transistor Q3 is discharged through the charge and discharge module 20, and the voltage difference between the two ends of the capacitor decreases. When the voltage between the gate and source of NMOS transistor Q3 drops below the turn-on threshold, the drain and source of NMOS transistor Q3 switch to an off state. The power supply positive electrode and the power supply negative electrode are disconnected from each other, and the power supply to the load 40 is stopped.

Continuing with reference to table 2, assuming that the maximum dc current of the discharge current is 1A, the capacitance between the gate and source of Q3 is discharged with a current of 1A, Ciss is 4600pF, and the time required for the gate and source levels of Q3 to fall from 12V to 0V is: 4600 × 12/1 ═ 55.2(nS), i.e., Q3 off time was 55.2 nS.

The NMOS transistor Q3 turns on and off for a total time of 78.2nS, corresponding to a maximum switching frequency of 1/78.2 — 12.79 (MHz). Whereas the highest switching frequency of the PMOS switch shown in fig. 1 is only 6.2 kHz. 12790/6.2 is 2063, namely the switching frequency of the power supply switching circuit that this application embodiment provided can reach thousands of times of the switching frequency of PMOS switching circuit. Meanwhile, since the NMOS transistor Q3 is turned on and off for a very short time, its on-off time is short, the amount of heat generated is small, and the switching loss of the switching element can be greatly reduced.

To sum up, in the power supply switch circuit provided in the embodiment of the present application, the power supply switch circuit includes an NMOS transistor, a control module, a charge and discharge module, a switching power supply, and a load; the control module is used for outputting an indication voltage to the charging and discharging module; the charge-discharge module is used for conducting the switching power supply and the grid electrode of the NMOS transistor when the indication voltage is at a high level so as to switch the drain electrode of the NMOS transistor and the source electrode of the NMOS transistor into a conducting state; and when the indication voltage is in a low level, the fourth end is conducted with the grid electrode of the NMOS transistor so as to switch the drain electrode of the NMOS transistor and the source electrode of the NMOS transistor into an off state. The switching of the on-off state of the NMOS transistor is realized by controlling the circuit switching of the conduction with the grid electrode of the NMOS transistor, so that the control of the whole circuit switch is realized. Compared with the prior scheme, the NMOS transistor has higher switching frequency, short semi-conduction time, small generated heat and lower switching loss of the switching element.

On the basis of fig. 2, regarding the structure of the control module 10, the embodiment of the present application also provides a possibility, please refer to fig. 3, where the control module includes an operational amplifier U1, a reference voltage unit 102, and a control voltage unit 101.

The control voltage unit 101 is connected to the non-inverting input of the operational amplifier U1, the reference voltage unit 102 is connected to the inverting input of the operational amplifier U1, and the output of the operational amplifier U1 is connected to the second terminal.

The control voltage unit 101 is configured to output a control voltage to the non-inverting input terminal.

The reference voltage unit 102 is configured to output a reference voltage to the inverting input terminal.

The operational amplifier U1 is used for outputting an indication voltage with a high level to the second end when the control voltage is higher than the reference voltage; and the output end is also used for outputting the indicating voltage with low level to the second end when the control voltage is lower than the reference voltage.

When the instruction voltage is at a high level, the instruction voltage is greater than the control voltage through amplification by the operational amplifier U1. Therefore, even when the control voltage is small, the charge/discharge module 20 can be driven to charge the NMOS transistor Q3.

Referring to fig. 3, the power supply positive terminal of the operational amplifier U1 is connected to the switching power supply 30, and the power supply negative terminal of the operational amplifier U1 is connected to the power supply negative terminal and the ground, respectively.

Specifically, when the control voltage is higher than the reference voltage, the indication voltage outputted from the output terminal is equal to the level of the switching power supply 30.

Referring to fig. 3, the control module further includes a first capacitor C1, one end of the first capacitor C1 is connected to the switching power supply 30, and the other end of the first capacitor C1 is connected to ground.

The first capacitor C1 is used to store and filter the power supplied by the operational amplifier U1.

With reference to fig. 3, the control voltage unit 101 includes a first resistor R1 and a second resistor R2, and the reference voltage unit 102 includes a third resistor R3 and a voltage divider M1.

One end of the first resistor R1 is connected with one end of the second resistor R2, the other end of the second resistor R2 is connected with the negative electrode of the power supply, the non-inverting input end is connected between the first resistor R1 and the second resistor R2, and the other end of the first resistor R1 is connected with the input end of the control signal.

Specifically, the control voltage is a voltage across the second resistor R2, and the first resistor R1 and the second resistor R2 divide the voltage.

One end of the third resistor R3 is connected with one end of the voltage divider M1, the other end of the third resistor R3 is connected with the switching power supply 30, the other end of the voltage divider M1 is connected with the negative electrode of the power supply, and the inverting input end is connected between the third resistor R3 and the voltage divider M1.

Specifically, the reference voltage is a voltage across the voltage divider M1, and the third resistor R3 and the voltage divider M1 divide the voltage.

Assuming that R1 equals 3kR, R2 equals 12kR, and the reference voltage is 2V, when the level of the control signal input end exceeds 2.5V, the voltage divided across R2 exceeds 2V, i.e. the non-inverting input end of U1 exceeds 2V to ground, i.e. the non-inverting input level of U1 exceeds the inverting input level, U1 outputs a high level indicating voltage.

When the control signal level is lower than 2.5V, the divided voltage across the R5 is lower than 2V, i.e. the U1 non-inverting input terminal) is lower than 2V to ground, the U1 non-inverting input level is lower than the inverting input level, and the U1 outputs a low level indicating voltage.

In order to avoid oscillations in the circuit when the input at the control signal input is oscillating. The embodiment of the present application further provides a possible implementation manner, please refer to fig. 3 again, in which the control module further includes a diode D1 and a fourth resistor R4, an anode of the diode D1 is connected to the output terminal of the U1, a cathode of the diode D1 is connected to one end of the fourth resistor R4, and the other end of the fourth resistor R4 is connected between the second resistor R2 and the non-inverting input terminal.

D1 and R4 are used to achieve hysteresis to prevent the U1 output from oscillating. Assume that U1 outputs a high level of 12V. Assuming that D1 has a small current flowing through it, its forward voltage drop is 0V, and reference is continued to the above example, R2 — 12 kR. If R4 is 274kR, the divided voltage of the 12V level superimposed on R2 by R4 is 0.5V. When the input level of the control signal exceeds 2.5V and U1 outputs high level, the voltage across R2 is 2.5V (2V is superposed with hysteresis voltage 0.5V). Similarly, when the level of the control signal is lowered and is only lower than 1.875V, the level at both ends of R2 is lower than 2V, and U1 outputs low level. That is, once the U1 outputs a high level, the U1 can stably output the high level as long as the control signal level is higher than 1.875V, and thus circuit oscillation can be effectively prevented.

When the control level of D1 is high, D1 prevents current from flowing through R1 and R4 from turning on the charge-discharge module 20 by mistake, and further turns on the NMOS transistor Q3 by mistake, that is, D1, to prevent turning on by mistake.

The U1 in the embodiment of the application can be a common operational amplifier, a rail-to-rail operational amplifier or an operational amplifier with an internal reference. U1 may be a normal comparator, a rail-to-rail comparator, or a comparator with an internal reference.

Further, the voltage divider M1 is a voltage regulator, a fifth resistor, or an equal voltage reference IC.

In order to protect the operational amplifier, the embodiment of the present application also provides a possible implementation manner, please refer to fig. 3, and the control module further includes a sixth resistor R6.

One end of the sixth resistor R6 is connected to the output terminal, and the other end of the sixth resistor R6 is connected to the second terminal.

The sixth resistor R6 is used to prevent the output current of the operational amplifier U1 from being too large, thereby avoiding circuit damage.

Referring to fig. 4, the charge and discharge module 20 includes a first transistor Q1 and a second transistor Q2, the first transistor Q1 is an NPN transistor, the second transistor Q2 is a PNP transistor, the first end is a collector of the first transistor Q1, the fourth end is a collector of the second transistor Q2, a base of the first transistor Q1 and a base of the second transistor Q2 are both connected to the second end, and an emitter of the first transistor Q1 and an emitter of the second transistor Q2 are both connected to the third end.

When the indicating voltage is high, the first transistor Q1 is turned on, the second transistor Q2 is turned off, and the switching power supply 30 is turned on with the gate of the NMOS transistor. When the indication voltage is low, the first transistor Q1 is turned off, the second transistor Q2 is turned on, and the collector of the second transistor Q2 is turned on with the gate of the NMOS transistor.

Possibly, Q1 and Q2 may also be darlington tubes.

The embodiment of the application also provides electric equipment, and the electric equipment comprises the power supply switch circuit.

It should be noted that, the electric device provided in this embodiment can achieve the technical effect of the power supply switching circuit. For the sake of brevity, the corresponding contents in the above embodiments may be referred to where not mentioned in this embodiment.

The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

It will be evident to those skilled in the art that the present application is not limited to the details of the foregoing illustrative embodiments, and that the present application may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

Claims

1. The power supply switch circuit is characterized by comprising an NMOS transistor, a control module, a charge-discharge module, a switch power supply and a load, wherein the positive electrode of the load is connected with the positive electrode of power supply, the negative electrode of the load is connected with the drain electrode of the NMOS transistor, and the source electrode of the NMOS transistor is connected with the negative electrode of the power supply;

2. The power switching circuit according to claim 1, wherein the control module includes an operational amplifier, a reference voltage unit, and a control voltage unit, the control voltage unit is connected to a non-inverting input terminal of the operational amplifier, the reference voltage unit is connected to an inverting input terminal of the operational amplifier, and an output terminal of the operational amplifier is connected to the second terminal;

3. The power supply switch circuit according to claim 2, wherein a positive power supply terminal of the operational amplifier is connected to the switching power supply, and a negative power supply terminal of the operational amplifier is connected to the negative power supply terminal and the ground, respectively.

4. The power switching circuit of claim 3, wherein the control module further comprises a first capacitor, one end of the first capacitor is connected to the switching power supply, and the other end of the first capacitor is connected to ground.

5. The power switching circuit of claim 2 wherein said control voltage unit comprises a first resistor and a second resistor, said reference voltage unit comprises a third resistor and a voltage divider;

6. The power switching circuit of claim 5 wherein said control module further comprises a diode and a fourth resistor, an anode of said diode is connected to said output terminal, a cathode of said diode is connected to one end of said fourth resistor, and another end of said fourth resistor is connected between said second resistor and said non-inverting input terminal.

7. The power switching circuit of claim 5 wherein said voltage divider is a voltage regulator, a fifth resistor, or an equal voltage reference IC.

8. The power switching circuit of claim 2 wherein said control module further comprises a sixth resistor, one end of said sixth resistor being connected to said output terminal and the other end of said sixth resistor being connected to said second terminal.

9. The power supply switch circuit according to claim 1, wherein the charge-discharge module comprises a first triode and a second triode, the first triode is an NPN triode, the second triode is a PNP triode, the first terminal is a collector of the first triode, the fourth terminal is a collector of the second triode, a base of the first triode and a base of the second triode are both connected to the second terminal, and an emitter of the first triode and an emitter of the second triode are both connected to the third terminal.

10. An electrical consumer, characterized in that the electrical consumer comprises a power supply switching circuit according to any one of claims 1 to 9.