CN111865156A - Servo system arbitrary frequency division and frequency multiplication method and system and programmable device - Google Patents
Servo system arbitrary frequency division and frequency multiplication method and system and programmable device Download PDFInfo
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- CN111865156A CN111865156A CN202010760657.3A CN202010760657A CN111865156A CN 111865156 A CN111865156 A CN 111865156A CN 202010760657 A CN202010760657 A CN 202010760657A CN 111865156 A CN111865156 A CN 111865156A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P8/00—Arrangements for controlling dynamo-electric motors of the kind having motors rotating step by step
- H02P8/14—Arrangements for controlling speed or speed and torque
- H02P8/18—Shaping of pulses, e.g. to reduce torque ripple
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B19/00—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source
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Abstract
The invention relates to the technical field of servo systems, in particular to a method, a system and a programmable device for arbitrary frequency division and frequency multiplication of a servo system, wherein the method comprises the following steps: acquiring the numerical difference delta p between the current reading and the last reading of the encoder and the clock number delta t between the current reading and the last reading of the encoder; calculating the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse according to the numerical difference delta p and the frequency multiplication coefficient N, and calculating the number M of the preset clock pulses according to the clock number delta t and the frequency division coefficient D; and judging whether sum is greater than M, and if so, outputting a pulse signal. The method only needs to calculate the preset clock pulse number for the first time, and then, every time a clock arrives, only needs to judge that the accumulated frequency multiplication pulse number in the current clock period is larger than the preset clock pulse number, and then immediately sends out a pulse signal, so that no remainder exists in the processing, the hysteresis phenomenon of the processing of the remainder part is avoided, and the pulse signal after frequency division can reflect the position of the motor in real time.
Description
Technical Field
The invention relates to the technical field of servo systems, in particular to a method and a system for arbitrary frequency division and frequency multiplication of a servo system and a programmable device.
Background
In a servo system, the frequency division output function is used for feeding back the position of a motor and providing the position for an upper device. The frequency division output is that the position read from the motor encoder is converted into the number of pulses according to a certain proportion, and the upper device counts the pulses to obtain the position of the motor rotor.
According to different modes of reading the motor encoder, the encoder can be divided into an incremental encoder and a communication encoder, for the incremental encoder, frequency division output can realize real-time 2-power frequency division by directly dividing the frequency of an AB signal, but the method cannot realize frequency division and frequency multiplication of any coefficient. For a communication type encoder, the number of pulses that should be sent out during the interval between two readings can only be calculated by subtracting two consecutive readings and then calculating the frequency division coefficient. When the traditional method realizes arbitrary frequency division and frequency multiplication, a frequency division and frequency multiplication coefficient (R) is usually expressed as a frequency multiplication coefficient N/a frequency division coefficient D, then a difference delta p between two encoder readings is calculated, and then delta p N/D is calculated to obtain the pulse number and the remainder which should be sent within an interval time delta t between the two encoder readings, but in the prior art, the processing of the remainder generally continues to a next processing period, namely when the difference delta p between the encoder readings is obtained next time, so that certain time delay exists, the processing real-time performance of the remainder part is poor, errors are easy to occur, the output pulse sequence cannot accurately reflect the position of the motor, the position of the motor read by an upper device is seriously lagged behind the real position of the motor, and the control precision of a servo system on the motor is poor.
Disclosure of Invention
The invention mainly solves the technical problem that a pulse sequence obtained by adopting a frequency division and multiplication method in the prior art cannot accurately reflect the position of a motor.
An arbitrary frequency division and multiplication method for a servo system comprises the following steps:
acquiring the numerical difference delta p between the current reading and the last reading of the encoder and the clock number delta t between the current reading and the last reading of the encoder;
calculating the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse according to the numerical difference delta p and the frequency multiplication coefficient N, and calculating the number M of the preset clock pulses according to the clock number delta t and the frequency division coefficient D;
and judging whether the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse is greater than the preset clock pulse number M or not, and if so, outputting a pulse signal.
In one embodiment, the preset number of clock pulses M ═ Δ t × C × D, C represents the number of clock pulses included in each pulse signal period of the servo system;
the calculating the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse according to the value difference Δ p and the frequency multiplication coefficient N includes:
each clock pulse is temporarily accumulated by one Δ p N since the last encoder reading, and sum is the sum of the temporarily accumulated (Δ p N) times the current clock pulse.
In one embodiment, the outputting a pulse signal includes: and carrying out rising edge processing and/or falling edge processing on the output pulse signal according to a preset pulse output requirement, and outputting a corresponding pulse signal.
In one embodiment, further comprising: and determining the reading direction of the encoder according to the positive and negative values of the value difference delta p, if the delta p is a positive value, determining the reading direction of the encoder to be a positive direction, and if the delta p is a negative value, determining the reading direction of the encoder to be a negative direction.
In one embodiment, the performing rising edge processing and/or falling edge processing on the output pulse signal according to a preset pulse output requirement includes:
and if the reading direction of the encoder is a positive direction, inverting the A-phase output pulse of the encoder to be used as a pulse signal output by the servo system, and if the reading direction of the encoder is a negative direction, inverting the B-phase output pulse of the encoder to be used as a pulse signal output by the servo system.
An arbitrary frequency dividing and multiplying system of a servo system, comprising:
the acquisition module is used for acquiring the numerical value difference delta p between the current reading and the last reading of the encoder and the clock number delta t between the current reading and the last reading of the encoder;
the calculation module is used for calculating the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse according to the numerical difference delta p and the frequency multiplication coefficient N, and calculating the number M of the preset clock pulses according to the clock number delta t and the frequency division coefficient D;
the judging module is used for judging whether the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse is greater than the preset clock pulse number M or not;
and the pulse output module is used for outputting a pulse signal when judging that the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse is greater than the preset clock pulse number M.
In one embodiment, the preset number of clock pulses M ═ Δ t × C × D, C represents the number of clock pulses included in each pulse signal period of the servo system;
the calculating the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse according to the value difference Δ p and the frequency multiplication coefficient N includes:
each clock pulse is temporarily accumulated by one Δ p N since the last encoder reading, and sum is the sum of the temporarily accumulated (Δ p N) times the current clock pulse.
In an embodiment, the pulse processing module is further included, and is configured to perform rising edge processing and/or falling edge processing on the output pulse signal according to a preset pulse output requirement, and output a corresponding pulse signal.
In one embodiment, the performing rising edge processing and/or falling edge processing on the output pulse signal according to a preset pulse output requirement includes:
determining the reading direction of the encoder according to the positive and negative values of the numerical difference delta p, if delta p is a positive value, determining the reading direction of the encoder to be a positive direction, and if delta p is a negative value, determining the reading direction of the encoder to be a negative direction;
and if the reading direction of the encoder is a positive direction, inverting the A-phase output pulse of the encoder to be used as a pulse signal output by the servo system, and if the reading direction of the encoder is a negative direction, inverting the B-phase output pulse of the encoder to be used as a pulse signal output by the servo system.
A programmable device, comprising:
the acquisition module is used for acquiring the numerical value difference delta p between the current reading and the last reading of the encoder and the clock number delta t between the current reading and the last reading of the encoder;
the calculation module is used for calculating the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse according to the numerical difference delta p and the frequency multiplication coefficient N, and calculating the number M of the preset clock pulses according to the clock number delta t and the frequency division coefficient D;
the judging module is used for judging whether the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse is greater than the preset clock pulse number M or not;
and the pulse output module is used for outputting a pulse signal when judging that the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse is greater than the preset clock pulse number M.
The method for arbitrary frequency division and multiplication of the servo system provided by the embodiment comprises the following steps: acquiring the numerical difference delta p between the current reading and the last reading of the encoder and the clock number delta t between the current reading and the last reading of the encoder; calculating the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse according to the numerical difference delta p and the frequency multiplication coefficient N, and calculating the number M of the preset clock pulses according to the clock number delta t and the frequency division coefficient D; and judging whether the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse is greater than the preset clock pulse number M or not, and if so, outputting a pulse signal. The method for randomly dividing and multiplying the frequency of the servo system in the embodiment only needs to calculate the preset clock pulse number for the first time, and when the clock pulse comes every time, only needs to judge that the number of the frequency-multiplied pulse temporarily accumulated by the current clock pulse is larger than the preset clock pulse number, and then immediately sends out a pulse signal.
Drawings
Fig. 1 is a flowchart of a frequency division and multiplication method according to an embodiment of the present application;
fig. 2 is a block diagram of a frequency division and multiplication system according to an embodiment of the present application.
Detailed Description
The present invention will be described in further detail with reference to the following detailed description and accompanying drawings. Wherein like elements in different embodiments are numbered with like associated elements. In the following description, numerous details are set forth in order to provide a better understanding of the present application. However, those skilled in the art will readily recognize that some of the features may be omitted or replaced with other elements, materials, methods in different instances. In some instances, certain operations related to the present application have not been shown or described in detail in order to avoid obscuring the core of the present application from excessive description, and it is not necessary for those skilled in the art to describe these operations in detail, so that they may be fully understood from the description in the specification and the general knowledge in the art.
Furthermore, the features, operations, or characteristics described in the specification may be combined in any suitable manner to form various embodiments. Also, the various steps or actions in the method descriptions may be transposed or transposed in order, as will be apparent to one of ordinary skill in the art. Thus, the various sequences in the specification and drawings are for the purpose of describing certain embodiments only and are not intended to imply a required sequence unless otherwise indicated where such sequence must be followed.
Example one
In an embodiment of the present invention, an arbitrary frequency division and multiplication method for a servo system is provided, as shown in fig. 1, the frequency division and multiplication method includes:
step 101: acquiring the numerical difference delta p between the current reading and the last reading of the encoder and the clock number delta t between the current reading and the last reading of the encoder;
step 102: calculating the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse according to the numerical difference delta p and the frequency multiplication coefficient N, and calculating the number M of the preset clock pulses according to the clock number delta t and the frequency division coefficient D;
step 103: and judging whether the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse is greater than the preset clock pulse number M or not, and if so, outputting a pulse signal.
The method for randomly dividing and multiplying the frequency of the servo system in the embodiment only needs to calculate the preset clock pulse number for the first time, and when the clock pulse arrives at each time later, only needs to judge that the accumulated frequency multiplication pulse number is larger than the preset clock pulse number when the current clock pulse arrives (arrives), and then immediately sends out a pulse signal, so that the processing does not have a remainder, and the processing of the remainder part does not cause a hysteresis phenomenon, so that the pulse signal after frequency division can reflect the position of the motor in real time, and the servo system can more accurately control the motor. During data processing, the number of frequency multiplication pulses is accumulated in real time, division operation is not needed, and the utilization rate of system resources is reduced.
Specifically, in step 101, the servo system waits for the encoder reading completion flag, records the current reading of the encoder if the reading completion flag arrives, and calculates the difference Δ p between the current reading and the previous reading and the interval clock Δ t.
In step 102, a clock pulse number M ═ Δ t × C × D is preset, where C represents the number of clock pulses included in each pulse signal period of the servo system, for example, the servo system includes 100 clock pulses in each pulse signal period; sum represents a frequency multiplication pulse value temporarily accumulated by the current clock pulse; and accumulating one Δ p × N for each clock pulse from the last reading of the encoder, where sum is the value of all (Δ p × N) temporarily accumulated for the current clock pulse, that is, accumulating one Δ p × N for the temporary sum from the previous clock pulse to obtain the temporary sum from the current clock pulse. For example, the multiplication factor N is 4, the division factor D is 1, the difference Δ p between the obtained current reading and the last reading of the encoder is 2, the clock count Δ t between the current reading and the last reading of the encoder is 3, the number C of clock pulses included in each pulse signal period of the servo system is 100, the number M of clock pulses is Δ t C D300, Δ p N is 8, one Δ p N is temporarily accumulated for each clock pulse from the last reading of the encoder, for example, when the 38 th clock pulse arrives at the present time, 38 Δ p N is accumulated at the present time, that is, sum is 304, it is determined that sum > M, that is, (sum-M) is greater than 0, and the servo system outputs one pulse signal, that is, a pulse sequence.
The traditional frequency division and multiplication method firstly calculates the number of the pulses to be sent in the delta t time according to the frequency division and multiplication coefficient, for example, on the basis of the parameters, the traditional method is adopted to calculate the number of the pulses to be sent in the delta t time to be 2 pulses, a remainder is remained, and the remainder is processed by continuing calculation until the next time. The method directly calculates the pulse width by an integration method, saves two division operations, greatly reduces the resource occupation, realizes the calculation of indefinite step length (namely the pulse width is calculated firstly), and outputs a pulse signal if judging that the temporarily accumulated frequency multiplication pulse number of the current clock pulse is more than the preset clock pulse number, thereby realizing excellent real-time performance, and the pulse width can accurately follow the motor speed to realize the accurate control of the motor.
In this embodiment, the process of calculating the preset clock pulse number M in the steps 101 and 102 only needs to obtain and calculate once when the system is started for the first time, and then each time the system only needs to calculate the number sum of the frequency doubling pulses temporarily accumulated by the current clock pulse, and then step 103 is executed, and if it is determined that the number sum of the frequency doubling pulses temporarily accumulated by the current clock pulse is greater than the preset clock pulse number M, a pulse signal is output. Therefore, the processor of the servo system does not need to repeatedly process the processes of calculating the preset clock pulse number M in the step 1 and the step 102, so that the occupied space is small, and the calculation efficiency of the system is improved.
Further, in another embodiment, when the pulse signal is output, the pulse signal needs to be correspondingly processed according to a pulse output requirement preset by the system, for example, if an orthogonal pulse needs to be output, the reading direction of the encoder needs to be determined according to a positive value and a negative value of the numerical difference Δ p, if Δ p is a positive value, the reading direction of the encoder is determined to be a positive direction, and if Δ p is a negative value, the reading direction of the encoder is determined to be a negative direction. And then carrying out rising edge processing and/or falling edge processing on the output pulse signal, and outputting a corresponding pulse signal. For example, if the reading direction of the encoder is positive, the a-phase output pulse of the encoder is inverted as the pulse format of the servo system output, and if the reading direction of the encoder is negative, the B-phase output pulse of the encoder is inverted as the pulse format of the servo system output.
The frequency division and multiplication method of the embodiment can realize frequency division and multiplication output without using a divider, is compatible with all kinds of encoders, has output delay time of one encoder reading period (tens of microseconds) for communication encoders, and can be used for occasions with high real-time requirements such as multi-axis synchronization and the like.
Example two:
referring to fig. 2, the present embodiment provides an arbitrary frequency dividing and multiplying system of a servo system, the frequency dividing and multiplying system comprising: the device comprises an acquisition module 301, a calculation module 302, a judgment module 303 and a pulse output module 304.
The obtaining module 301 is configured to obtain a difference Δ p between a current reading and a last reading of the encoder, and a clock number Δ t between the current reading and the last reading of the encoder.
The calculating module 302 is configured to calculate a number sum of frequency multiplication pulses temporarily accumulated by the current clock pulse according to the number difference Δ p and the frequency multiplication coefficient N, and calculate a preset number M of clock pulses according to the clock number Δ t and the frequency division coefficient D.
The judging module 303 is configured to judge whether the number sum of frequency multiplication pulses temporarily accumulated by the current clock pulse is greater than a preset number M of clock pulses.
The pulse output module 304 is configured to output a pulse signal when it is determined that the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse is greater than the preset number M of clock pulses.
Further, the frequency division and frequency multiplication system of this embodiment further includes a pulse processing module 305, where the pulse processing module 305 is configured to perform rising edge processing and/or falling edge processing on the output pulse signal according to a preset pulse output requirement, and output a corresponding pulse signal. For example, the reading direction of the encoder is determined according to the positive and negative values of the value difference Δ p, if Δ p is a positive value, the reading direction of the encoder is determined to be a positive direction, and if Δ p is a negative value, the reading direction of the encoder is determined to be a negative direction; if the reading direction of the encoder is positive, the A-phase output pulse of the encoder is reversed to be the pulse form output by the servo system, and if the reading direction of the encoder is negative, the B-phase output pulse of the encoder is reversed to be the pulse form output by the servo system.
The frequency division and multiplication system of the embodiment can realize frequency division and multiplication output without using a divider, is compatible with all kinds of encoders, has output delay time of one encoder reading period (tens of microseconds) for communication encoders, and can be used for occasions with high real-time requirements such as multi-axis synchronization and the like.
EXAMPLE III
The embodiment provides a programmable device, such as an FPGA or a CPLD, which includes an obtaining module 301, a calculating module 302, a judging module 303, and a pulse output module 304 shown in fig. 2.
The obtaining module 301 is configured to obtain a difference Δ p between a current reading and a last reading of the encoder, and a clock number Δ t between the current reading and the last reading of the encoder.
The calculating module 302 is configured to calculate a number sum of frequency multiplication pulses temporarily accumulated by the current clock pulse according to the number difference Δ p and the frequency multiplication coefficient N, and calculate a preset number M of clock pulses according to the clock number Δ t and the frequency division coefficient D.
The judging module 303 is configured to judge whether the number sum of frequency multiplication pulses temporarily accumulated by the current clock pulse is greater than a preset number M of clock pulses.
The pulse output module 304 is configured to output a pulse signal when it is determined that the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse is greater than the preset number M of clock pulses.
In another embodiment, the programmable device further includes a pulse processing module 305, and the pulse processing module 305 is configured to perform rising edge processing and/or falling edge processing on the output pulse signal according to a preset pulse output requirement, and output a corresponding pulse signal. For example, the reading direction of the encoder is determined according to the positive and negative values of the value difference Δ p, if Δ p is a positive value, the reading direction of the encoder is determined to be a positive direction, and if Δ p is a negative value, the reading direction of the encoder is determined to be a negative direction; if the reading direction of the encoder is positive, the A-phase output pulse of the encoder is reversed to be the pulse form output by the servo system, and if the reading direction of the encoder is negative, the B-phase output pulse of the encoder is reversed to be the pulse form output by the servo system.
The programmable device of the embodiment can realize frequency division and frequency multiplication output without using a divider, is compatible with all kinds of encoders, has output delay time of one encoder reading period (tens of microseconds) for communication encoders, and can be used for occasions with high real-time requirements such as multi-axis synchronization and the like.
The present invention has been described in terms of specific examples, which are provided to aid understanding of the invention and are not intended to be limiting. For a person skilled in the art to which the invention pertains, several simple deductions, modifications or substitutions may be made according to the idea of the invention.
Claims (10)
1. An arbitrary frequency division and multiplication method for a servo system is characterized by comprising the following steps:
acquiring the numerical difference delta p between the current reading and the last reading of the encoder and the clock number delta t between the current reading and the last reading of the encoder;
calculating the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse according to the numerical difference delta p and the frequency multiplication coefficient N, and calculating the number M of the preset clock pulses according to the clock number delta t and the frequency division coefficient D;
and judging whether the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse is greater than the preset clock pulse number M or not, and if so, outputting a pulse signal.
2. The arbitrary frequency division and multiplication method of the servo system according to claim 1, wherein the predetermined number of clock pulses M ═ Δ t × C × D, C indicates the number of clock pulses included in each pulse signal period of the servo system;
the calculating the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse according to the value difference Δ p and the frequency multiplication coefficient N includes:
each clock pulse is temporarily accumulated by an amount Δ p N since the last encoder reading, and sum is the sum of (Δ p N) temporarily accumulated for the current clock pulse.
3. The servo system arbitrary frequency division and multiplication method of claim 1, wherein the outputting a pulse signal comprises: and carrying out rising edge processing and/or falling edge processing on the output pulse signal according to a preset pulse output requirement, and outputting a corresponding pulse signal.
4. The servo system arbitrary frequency division and multiplication method of claim 3, further comprising: and determining the reading direction of the encoder according to the positive and negative values of the value difference delta p, if the delta p is a positive value, determining the reading direction of the encoder to be a positive direction, and if the delta p is a negative value, determining the reading direction of the encoder to be a negative direction.
5. The frequency dividing and multiplying method according to claim 4, wherein the step of performing rising edge processing and/or falling edge processing on the output pulse signal according to a preset pulse output requirement, and the step of outputting the corresponding pulse signal comprises:
and if the reading direction of the encoder is a positive direction, inverting the A-phase output pulse of the encoder to be used as a pulse signal output by the servo system, and if the reading direction of the encoder is a negative direction, inverting the B-phase output pulse of the encoder to be used as a pulse signal output by the servo system.
6. An arbitrary frequency dividing and multiplying system of a servo system is characterized by comprising:
the acquisition module is used for acquiring the numerical value difference delta p between the current reading and the last reading of the encoder and the clock number delta t between the current reading and the last reading of the encoder;
the calculation module is used for calculating the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse according to the numerical difference delta p and the frequency multiplication coefficient N, and calculating the number M of the preset clock pulses according to the clock number delta t and the frequency division coefficient D;
the judging module is used for judging whether the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse is greater than the preset clock pulse number M or not;
and the pulse output module is used for outputting a pulse signal when judging that the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse is greater than the preset clock pulse number M.
7. The arbitrary frequency dividing and frequency multiplying system of the servo system according to claim 6, wherein the predetermined number of clock pulses M ═ Δ t × C ×, D, C indicates the number of clock pulses included in each pulse signal period of the servo system;
the calculating the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse according to the value difference Δ p and the frequency multiplication coefficient N includes:
each clock pulse is temporarily accumulated by an amount Δ p N since the last encoder reading, and sum is the sum of (Δ p N) temporarily accumulated for the current clock pulse.
8. The arbitrary frequency-dividing and frequency-multiplying system of the servo system of claim 6, further comprising a pulse processing module, for performing rising edge processing and/or falling edge processing on the output pulse signal according to a preset pulse output requirement, and outputting a corresponding pulse signal.
9. The arbitrary frequency-dividing and frequency-multiplying system of the servo system of claim 8, wherein the step of performing rising edge processing and/or falling edge processing on the output pulse signal according to a preset pulse output requirement, and the step of outputting the corresponding pulse signal comprises:
determining the reading direction of the encoder according to the positive and negative values of the numerical difference delta p, if delta p is a positive value, determining the reading direction of the encoder to be a positive direction, and if delta p is a negative value, determining the reading direction of the encoder to be a negative direction;
and if the reading direction of the encoder is a positive direction, inverting the A-phase output pulse of the encoder to be used as a pulse signal output by the servo system, and if the reading direction of the encoder is a negative direction, inverting the B-phase output pulse of the encoder to be used as a pulse signal output by the servo system.
10. A programmable device, comprising:
the acquisition module is used for acquiring the numerical value difference delta p between the current reading and the last reading of the encoder and the clock number delta t between the current reading and the last reading of the encoder;
the calculation module is used for calculating the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse according to the numerical difference delta p and the frequency multiplication coefficient N, and calculating the number M of the preset clock pulses according to the clock number delta t and the frequency division coefficient D;
the judging module is used for judging whether the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse is greater than the preset clock pulse number M or not;
and the pulse output module is used for outputting a pulse signal when judging that the number sum of the frequency multiplication pulses temporarily accumulated by the current clock pulse is greater than the preset clock pulse number M.
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