CN111863090A - Method and device for controlling erasing performance - Google Patents
Method and device for controlling erasing performance Download PDFInfo
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- CN111863090A CN111863090A CN201910356969.5A CN201910356969A CN111863090A CN 111863090 A CN111863090 A CN 111863090A CN 201910356969 A CN201910356969 A CN 201910356969A CN 111863090 A CN111863090 A CN 111863090A
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
- G11C16/3495—Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically
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Abstract
The invention provides a method and a device for controlling erasing performance. The method is applied to a NOR flash memory, and the NOR flash memory comprises the following steps: an erase verify switch, an erase operation state machine, and an erase memory cell, the method comprising: and the erasing operation state machine receives the erasing operation instruction, executes erasing verification and erasing pressurization operation according to the erasing operation instruction, continuously executes the erasing pressurization operation for a preset number of times according to the erasing cycle number and the condition of an erasing verification switch, and then executes the erasing verification operation. When the erasing pressurization operation is executed, the erasing operation state machine continuously executes the erasing pressurization operation for the preset times, skips the corresponding erasing verification operation, controls the cycle period of the erasing verification operation and the erasing pressurization operation, and improves the erasing performance of the NOR flash memory.
Description
Technical Field
The present invention relates to the field of storage, and in particular, to a method and apparatus for controlling erase performance.
Background
At present, the threshold voltage of an erasing unit of a NOR flash memory is increased along with the increase of the programming and erasing times, and the time required by erasing is longer and longer, so that the time required by erasing of the NOR flash memory is longer and longer along with the increase of the using times of a user, and the performance of the NOR flash memory is also worse and worse.
Referring to fig. 1, a block diagram of a state flow in an existing NOR flash memory erase operation is shown. After receiving the erasing instruction, the erasing operation state machine firstly carries out erasing verification operation, and if the erasing verification is passed, the whole erasing operation is directly finished; if the erase verification is not passed, the erase operation state machine performs erase pressurization, after the erase pressurization is finished, the number of erase cycles is increased by 1, then whether the number of erase cycles reaches the maximum value is judged, if the number of erase cycles is larger than the maximum value, the whole erase operation is finished, if the number of erase cycles is not larger than the maximum value, the erase operation state machine performs the next erase verification, whether the last erase pressurization operation is successful is checked, and then the previous operation is repeated.
However, as the use time of the NOR flash memory increases, the memory cells inside the NOR flash memory become more difficult to erase. After the NOR flash memory receives the erase command, the erase operation may not be successfully performed on the erase memory cell for a plurality of times in the early stage, and the erase verification operation corresponding to the erase operation is performed one by one, so that the whole erase operation time is long, and the erase performance of the NOR flash memory is reduced.
Disclosure of Invention
The invention provides a method and a device for controlling erasing performance, which solve the problems that with the increase of the service time of a NOR flash memory, the memory cells in the NOR flash memory become difficult to erase, and the erasing verification operation and the erasing pressurization operation need to be circulated for many times, so that the whole erasing operation time is longer.
In order to solve the above technical problem, an embodiment of the present invention provides a method for controlling erase performance, where the method is applied to a NOR flash memory, and the NOR flash memory includes: the method comprises the following steps of erasing a verification switch, an erasing operation state machine and an erasing storage unit, wherein the erasing operation state machine is respectively connected with the erasing verification switch and the erasing storage unit, and the method comprises the following steps:
the erase operation state machine receives an erase operation instruction, the erase operation instruction including: the address of the memory cell to be erased;
the erasing operation state machine executes erasing verification operation according to the erasing operation instruction, wherein the erasing verification operation is the operation of verifying whether the threshold voltage of the memory unit to be erased is smaller than a preset voltage, if so, the verification is passed, and if not, the verification is not passed;
If the verification is not passed, the erasing operation state machine executes erasing pressurization operation, and the erasing pressurization operation is the operation of continuously applying a preset voltage value to the erasing memory unit;
after the erasing operation state machine executes erasing pressurization operation, judging whether the current erasing circulation times reach the maximum value, wherein the erasing circulation times are the times of executing the erasing verification operation and the erasing pressurization operation when the erasing operation corresponding to the erasing operation instruction is completed, and each circulation time corresponds to one erasing verification operation and one erasing pressurization operation;
if the current erasing cycle number does not reach the maximum value, the erasing operation state machine judges whether an erasing verification switch is turned on;
if the erasing verification switch is turned on, the erasing operation state machine judges whether the current erasing cycle number is larger than a preset value;
if the current erasing cycle number is not more than the preset value, the erasing operation state machine continuously executes the erasing pressurization operation for preset times;
and after the erasing operation state machine continuously executes the erasing pressurization operation for preset times, executing the erasing verification operation for the next time.
Optionally, after the erase operation state machine determines whether the erase verification switch is turned on if the current number of erase cycles does not reach the maximum value, the method further includes:
and if the erasing verification switch is not opened, the erasing operation state machine executes the next erasing verification operation.
Optionally, the erase verification switch is connected to an upper computer, and the method further includes:
and the upper computer controls the erasing verification switch to be turned on when the time required for finishing the erasing operation corresponding to the single erasing operation instruction is determined to be greater than the preset time.
Optionally, the number of erasing cycles is greater than the preset value, and the preset value is greater than the preset number.
Optionally, after the erase operation state machine determines whether the current erase cycle number is greater than a preset value if the erase verification switch is turned on, the method further includes:
and if the current erasing cycle number is larger than the preset value, the erasing operation state machine executes the next erasing verification operation.
Optionally, after the erase operation state machine performs the erase stress operation, it is determined whether the current number of erase cycles reaches its maximum value, and the method further includes:
And if the current erasing cycle number reaches the maximum value, the erasing operation state machine finishes the erasing operation corresponding to the erasing operation instruction.
Optionally, after the erase operation state machine performs an erase verification operation according to the erase operation instruction, the method further includes:
and if the verification is passed, the erasing operation state machine finishes the erasing operation corresponding to the erasing operation instruction.
An embodiment of the present invention further provides a device for controlling an erase performance, where the device is applied to a NOR flash memory, and the NOR flash memory includes: the device comprises an erasing verification switch, an erasing operation state machine and an erasing storage unit, wherein the erasing operation state machine is respectively connected with the erasing verification switch and the erasing storage unit, and the device comprises:
a receiving module, configured to receive an erasing operation instruction by the erasing operation state machine, where the erasing operation instruction includes: the address of the memory cell to be erased;
the execution verification module is used for executing the erasing verification operation by the erasing operation state machine according to the erasing operation instruction, wherein the erasing verification operation is an operation of verifying whether the threshold voltage of the memory unit to be erased is smaller than a preset voltage, if so, the verification is passed, and if not, the verification is not passed;
The erasing operation state machine is used for executing erasing pressurization operation if the verification is not passed, and the erasing pressurization operation is the operation of continuously applying a preset voltage value to the erasing storage unit;
a cycle number judging module, configured to judge whether a current erase cycle number reaches a maximum value after the erase operation state machine performs the erase pressurizing operation, where the erase cycle number is a number of times that the erase verification operation and the erase pressurizing operation need to be performed to complete an erase operation corresponding to the erase operation instruction, and each cycle number corresponds to one of the erase verification operation and one of the erase pressurizing operation;
the judging switch module is used for judging whether the erasing verification switch is turned on or not by the erasing operation state machine if the current erasing cycle number does not reach the maximum value;
the current time judging module is used for judging whether the current erasing cycle time is greater than a preset value or not by the erasing operation state machine if the erasing verification switch is turned on;
the continuous execution module is used for continuously executing the erasing pressurization operation for a preset number of times by the erasing operation state machine if the current erasing circulation number is not more than the preset value;
And the subsequent verification module is used for executing the erasing operation and executing the erasing verification operation next time after the erasing pressurization operation is continuously executed for the preset times by the state machine for executing the erasing operation.
Optionally, the apparatus further comprises:
and the continuous verification module is used for executing the next erasing verification operation by the erasing operation state machine if the erasing verification switch is not opened.
Optionally, the apparatus further comprises:
and the opening module is used for controlling the erasing verification switch to be opened when the upper computer determines that the time required by the erasing operation corresponding to the single erasing operation instruction is longer than the preset time.
Compared with the prior art, the method and the device for controlling the erasing performance provided by the invention have the advantages that when the erasing operation is executed, the erasing operation state machine continuously executes the erasing pressurization operation preset times according to the starting condition of the erasing verification switch and the current erasing cycle times, skips the corresponding erasing verification operation, controls the cycle period of the erasing verification operation and the erasing pressurization operation, saves the whole time of the erasing operation and improves the erasing performance of the NOR flash memory.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without inventive labor.
FIG. 1 is a block diagram of a flow chart of an existing NOR flash memory erase operation;
FIG. 2 is a flow chart of a method of controlling erase performance according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
FIG. 2 is a flow chart of a method of controlling erase performance in accordance with an embodiment of the present invention. The method is applied to an NORflash memory, and the NOR flash memory comprises the following steps: the method for controlling the erasing performance comprises the following steps:
step 101: the erasing operation state machine receives an erasing operation instruction, and the erasing operation instruction comprises the following steps: the address of the memory cell needs to be erased.
In an embodiment of the present invention, a NOR flash memory includes: the erasing verification switch, the erasing operation state machine and the erasing memory unit, wherein the erasing verification switch is used for: when the erasing verification switch is turned on, the erasing operation state machine can continuously execute erasing pressurization operation according to specific conditions in the erasing process and skip the erasing verification operation; when the erasing verification switch is closed, the erasing operation state machine carries out erasing operation according to the prior art scheme; it should be noted that the erasure verification switch is a functional circuit switch in the NORflash memory, the upper computer sends a command "0" to the erasure verification switch, that is, turns off the function of the erasure verification switch, and sends a command "1" to the erasure verification switch, that is, turns on the function of the erasure verification switch. The erase operation state machine is an element for controlling an erase state in the NOR flash memory, and the erase storage unit is a storage unit for storing write data in the NOR flash memory.
The erasing operation state machine receives an erasing operation instruction sent by the upper computer, the erasing operation instruction comprises an address of an erasing storage unit, namely the address of the storage unit needing to execute the erasing operation, and the erasing operation refers to the whole process from the receiving of the erasing operation instruction to the completion of the erasing operation of the storage unit to be erased. The above description is not limited in detail by the embodiments of the present invention, and the embodiments may be set according to actual situations.
Step 102: and the erasing operation state machine executes erasing verification operation according to the erasing operation instruction, wherein the erasing verification operation is the operation of verifying whether the threshold voltage of the memory unit to be erased is smaller than the preset voltage, if so, the verification is passed, and if not, the verification is not passed.
In the embodiment of the invention, when receiving an erasing operation instruction, the erasing operation state machine firstly executes an erasing verification operation to verify whether the threshold voltage of the erasing memory unit is smaller than the preset voltage, the preset voltage is the verifying voltage of the erasing operation, the NOR flash memory specifies that the threshold voltage of the memory unit is smaller than the verifying voltage, the erasing operation is successful, and the erasing operation is failed if the threshold voltage is larger than or equal to the verifying voltage. The reason why the erase verify operation is performed is that there may be a case where the threshold voltage of the memory cell to be erased is already smaller than the verify voltage, and if the threshold voltage is already smaller than the verify voltage, the erase operation is considered to be successful, and the erase operation state machine ends the erase operation of this time. Before the erasing pressurization operation is executed, the erasing operation state machine needs to execute erasing verification operation on the needed erasing memory unit, if the threshold voltage of the needed erasing memory unit is larger than or equal to the verification voltage, the verification is not passed, and the erasing pressurization operation is executed. The embodiment of the present invention is not limited in detail, and may be set according to actual situations.
Step 102': and if the verification is passed, the erasing operation state machine finishes the erasing operation corresponding to the erasing operation instruction.
In the embodiment of the invention, if the erasing operation state machine executes the erasing verification operation, the result passes the verification, namely the threshold voltage of the memory cell to be erased is smaller than the verification voltage, and the erasing operation state machine finishes the erasing operation corresponding to the erasing operation instruction.
Step 103: if the verification is not passed, the erasing operation state machine executes erasing pressurization operation, and the erasing pressurization operation is the operation of continuously applying the preset voltage value to the erasing memory unit.
In the embodiment of the present invention, if the erase operation state machine performs the erase verification operation and the result verification fails, the erase operation state machine performs the erase stress operation, where the erase stress operation refers to: the erasing operation state machine continuously applies the preset voltage value to the erasing memory unit, the preset voltage value is the voltage value which is required to be applied to the erasing memory unit by the NOR flash memory in the general condition, and the value is obtained by combining a large number of simulation tests, actual tests, empirical formula calculation and the like. The embodiment of the present invention is not limited in detail, and may be set according to actual situations.
Step 104: and after the erasing operation state machine executes the erasing pressurization operation, judging whether the current erasing circulation times reach the maximum value, wherein the erasing circulation times are the times of executing the erasing verification operation and the erasing pressurization operation when the erasing operation corresponding to the erasing operation instruction is completed, and each circulation time corresponds to one erasing verification operation and one erasing pressurization operation.
In the embodiment of the present invention, after receiving an erase operation command, an erase verification operation is first performed by an erase operation state machine, if the verification fails, a first erase pressurization operation is performed, and when the first erase pressurization operation ends, a first erase cycle is performed, where the erase cycle refers to: the erasing operation state machine executes a first erasing and verifying operation, if the verifying operation is failed, a first erasing and pressurizing operation is executed, the erasing and pressurizing operation is finished and is a first erasing and pressurizing cycle, the two steps are completed, the first erasing and verifying operation is executed, the number of times of the erasing and verifying operation is 1, the number of times of the erasing and pressurizing operation is 1, after the first erasing and pressurizing operation is finished, the erasing operation state machine executes a second erasing and verifying operation, if the verifying operation is failed, the second erasing and pressurizing operation is executed, when the second erasing and pressurizing operation is finished, the second erasing and pressurizing operation is a second erasing and pressurizing cycle, the second erasing and verifying operation is executed, the number of times of the erasing and pressurizing operation is 2, the second erasing and pressurizing operation is executed, the number of times of the erasing and pressurizing operation is 2, after the second erasing and pressurizing operation is finished, the erasing operation state machine executes a third erasing and verifying operation, if the verification is not passed, a third erasing and pressurizing operation is executed, when the third erasing and pressurizing operation is finished, namely a third erasing circulation is executed, the number of the erasing and verifying operation circulation is 3, the number of the erasing and pressurizing operation circulation is 3 when the third erasing and pressurizing operation is executed, and the like, before each erasing and verifying operation is executed, the erasing operation state machine needs to judge whether the number of the erasing circulation reaches the maximum value, the maximum value is an upper limit value which is set artificially, the value is set to enable the NOR flash memory to work more efficiently, if one erasing operation is supposed, data to be erased cannot be written into and erased successfully due to various reasons, if the upper limit value of the circulation is not existed, the erasing operation state machine needs to execute the erasing and pressurizing operation without stop, the NOR flash memory is always in an erase operation state, which is equivalent to a dead halt, and cannot process any other work. The embodiment of the present invention is not limited in detail, and may be set according to actual situations.
Step 104': and if the current erasing cycle number reaches the maximum value, finishing the erasing operation corresponding to the erasing operation instruction by the erasing operation state machine.
In the embodiment of the invention, if the current erasing cycle number reaches the maximum value, for example, the maximum value is 80, the cycle number of executing the erasing verification operation and the erasing pressurization operation is 80, the current erasing cycle number reaches the value of 80, the erasing operation state machine finishes the erasing operation corresponding to the erasing operation instruction, and after the 80 th erasing pressurization operation, if the threshold voltage of the erasing storage unit is smaller than the verification voltage, the erasing operation is successful; if the threshold voltage of the erasing memory unit is larger than the verification voltage, the erasing operation fails at the time.
Step 105: if the current erase cycle number does not reach its maximum value, the erase operation state machine determines whether the erase verify switch is on.
In the embodiment of the present invention, if the current erase cycle number does not reach the maximum value thereof, for example, the maximum value is 60 times, the maximum number of cycles of performing the erase verify operation and the erase stress operation is 60 times, and the current erase cycle number does not reach the value, the erase operation state machine determines whether the erase verify switch is turned on. The embodiment of the present invention is not limited in detail, and may be set according to actual situations.
Step 105': if the erase verify switch is not turned on, the erase operation state machine performs the next erase verify operation.
In the embodiment of the invention, if the state of the erasing verification switch is not opened, the erasing verification is performed according to the steps of the erasing operation in the prior art, the erasing operation state machine firstly judges whether the number of erasing circulation times reaches the maximum value, and if not, the erasing verification operation corresponding to the next number of erasing circulation times is performed.
The criteria for whether the erase verify switch is on are: and when the upper computer determines that the time required for finishing the erasing operation corresponding to the single erasing operation instruction is longer than the preset time, controlling the erasing verification switch to be switched on, wherein the preset time is determined by an empirical value and a result after a large number of tests. Assuming that 15 minutes is required for a brand new NOR flash memory to complete the erase operation of 1GB size data, more than 50 minutes is required for the NOR flash memory to complete the erase operation of 1GB size data after a long time is used, or the user himself feels that the time required for the NOR flash memory to complete the erase operation is slower than before and wants to shorten the time required for the erase operation, the erase verify switch can be controlled to be turned on to skip a part of the erase verify operation.
Step 106: if the erasure verification switch is turned on, the erasure operation state machine judges whether the current erasure cycle number is larger than a preset value.
In the embodiment of the invention, if the state of the erasure verification switch is in an open state, the erasure operation state machine judges whether the current erasure cycle number is larger than a preset value, the size of the preset value is generally determined by an empirical value and a result of a NOR flash memory test, and the reason for setting the preset value is to judge whether to perform subsequent continuous erasure pressurization operation.
Step 106': and if the current erasing circulation times are larger than the preset value, executing the next erasing verification operation by the erasing operation state machine.
In the embodiment of the invention, if the current erasing cycle number is larger than the preset value, the erasing operation state machine firstly judges whether the erasing cycle number reaches the maximum value, and if not, the erasing operation state machine executes the erasing verification operation corresponding to the next erasing cycle number.
Step 107: and if the current erasing cycle number is not more than the preset value, continuously executing the erasing pressurization operation for the preset number by the erasing operation state machine.
In the embodiment of the invention, if the current erasing cycle number is not more than the preset value, the erasing operation state machine continuously executes the erasing pressurization operation for the preset number, because for the NOR flash memory which has been used for a long time to execute the erasing operation, the erasing pressurization operation of the previous cycle may not successfully complete the erasing operation, the corresponding erase verify operation is of little significance, and after performing several erase stress operations in a loop, the probability of successfully completing the erase operation is high, therefore, a preset value is set, the erasing and pressurizing operation cannot be successfully completed within the preset value, the corresponding erasing and verifying operation can not be executed, the erasing and pressurizing operation is directly and continuously executed for a preset number of times, then the erasing and verifying operation is executed, the probability of passing the verification is high, and the probability of successfully completing the erasing operation is high. Assuming that the maximum value of the number of erasing cycles is 100 times, the preset value is 10 times, the preset number is 5 times, the erasing operation state machine receives an erasing operation command, the erasing verification operation is executed, if the verification is not passed, the erasing operation state machine executes the erasing pressurization operation, after the erasing pressurization operation is finished, the number of the erasing cycles is added with 1, namely the number of the erasing cycles is 1 at the moment, the erasing operation state machine judges that the number of the erasing cycles is less than the maximum value of the erasing cycles by 100 times, the erasing operation state machine judges that an erasing verification switch is turned on again, and the number of the erasing cycles is less than the preset value by 10 times, the erasing operation state machine continuously executes the erasing pressurization operation for 5 times without executing the erasing verification operation corresponding to the 5 erasing pressurization operations. The maximum value of the erasing cycle times in the embodiment of the invention is larger than a preset value, the preset value is larger than the preset times, and the specific setting of the preset times is also determined by an empirical value and results after a large number of tests.
Step 108: after the erasing operation state machine continuously executes the erasing pressurization operation for the preset times, the next erasing verification operation is executed.
In the embodiment of the present invention, after the erase operation state machine continuously performs the erase stress operation for the preset number of times, the erase operation state machine performs the next erase verification operation, for example, in the first erase cycle, after 5 erase stress operations are finished, the erase operation state machine performs the next erase verification operation, that is, the erase operation state machine performs the erase verification operation in the second erase cycle.
For example, a NOR flash memory includes: the NOR flash first executes the erasing verification operation, verifies whether the threshold voltage of the erasing storage unit of the corresponding address is smaller than the verification voltage, if so, the erasing operation is finished, and the erasing operation is successful; if not, the erase operation state machine will perform an erase stress operation.
The erasing operation state machine executes erasing verification operation, if the erasing verification is not passed, the erasing pressurization operation is executed, after the erasing pressurization operation is finished, the erasing circulation frequency is added with 1, the erasing operation state machine needs to judge whether the erasing circulation frequency reaches a set erasing circulation maximum value M, if the erasing circulation frequency reaches the maximum value M, the erasing operation state machine directly ends the erasing operation corresponding to the erasing operation instruction, if the erasing circulation frequency does not reach the maximum value, the erasing operation state machine judges whether an erasing verification switch is turned on, if the erasing verification switch is not turned on, the erasing operation state machine executes the erasing verification operation according to the scheme in the prior art, and the previous operation is repeated.
If the erasing verification switch is turned on, the erasing operation state machine judges whether the current erasing cycle number is larger than a preset value r, the preset value r is smaller than the maximum value M, and if the current erasing cycle number is larger than the preset value r, the erasing operation state machine executes the next erasing verification operation; if the current erasing cycle number is not more than the preset value r, the erasing operation state machine continuously executes erasing pressurization operation for a preset number of times z, the preset number of times z is less than the preset value r, namely the pressurization time of the erasing pressurization operation is prolonged, so that the success probability of the erasing operation is improved, after the erasing pressurization operation is continuously executed for z times, the erasing verification operation is executed again, the erasing operation state machine judges whether the erasing operation is successful, and if the erasing operation is successful, the erasing operation is successful; if the verification fails, the erase operation fails, and then the above operations are repeated.
Assuming that the maximum value M is 100, the preset value r is 10, the preset number z is 5, and the NOR flash memory needs 6 erase-and-pressure operations to successfully erase due to various reasons, adopting the scheme of the present invention, after receiving an erase operation command, the erase operation state machine first performs a first erase-and-verify operation, if the verify fails, the erase operation state machine performs the first erase-and-pressure operation, at this time, the current erase cycle number is 1, which is smaller than the maximum value M of the erase cycle 100, the erase operation state machine determines that the erase-and-verify switch is turned on, the erase operation state machine determines that the current erase cycle number is 1 smaller than the preset value r 10 again, the erase operation state machine continuously performs the erase-and-pressure operation for 5 times, and after performing the erase-and-pressure operation for 5 times, the erase operation state machine performs a second erase-and-pressure operation again, if the result of the second erase verification operation passes verification, the current erase operation is finished, and the erase operation is successful, that is, although the erase pressing operation is executed for 6 times, the corresponding erase verification operation is not executed in the last 5 erase pressing operations, so that the time of the whole erase operation is shortened, and the erase performance of the NORflash memory is improved.
Optionally, an embodiment of the present invention further provides a device for controlling erase performance, where the device is applied to a NOR flash memory, and the NOR flash memory includes: the erasing verification switch, the erasing operation state machine and the erasing memory unit, the erasing operation state machine is respectively connected with the erasing verification switch and the erasing memory unit, and the device for controlling the erasing performance comprises:
the receiving module is used for receiving an erasing operation instruction by the erasing operation state machine, and the erasing operation instruction comprises the following steps: the address of the memory cell to be erased;
the execution verification module is used for executing the erasing verification operation according to the erasing operation instruction by the erasing operation state machine, wherein the erasing verification operation is an operation of verifying whether the threshold voltage of the memory unit to be erased is smaller than the preset voltage, if so, the verification is passed, and if not, the verification is not passed;
the execution pressurizing module is used for executing erasing pressurizing operation by the erasing operation state machine if the verification is not passed, and the erasing pressurizing operation is the operation of continuously applying a preset voltage value to the erasing memory unit;
the device comprises a judging cycle number module, a judging module and a judging module, wherein the judging cycle number module is used for judging whether the current erasing cycle number reaches the maximum value after the erasing operation state machine executes the erasing pressurization operation, the erasing cycle number is the number of times that the erasing verification operation and the erasing pressurization operation need to be executed when the erasing operation corresponding to the erasing operation instruction is completed, and each cycle number corresponds to one erasing verification operation and one erasing pressurization operation;
The judging switch module is used for judging whether the erasing verification switch is turned on or not by the erasing operation state machine if the current erasing cycle number does not reach the maximum value;
the current time judging module is used for judging whether the current erasing cycle time is greater than a preset value or not by the erasing operation state machine if the erasing verification switch is turned on;
the continuous execution module is used for continuously executing the erasing pressurization operation preset times by the erasing operation state machine if the current erasing circulation times are not more than the preset value;
and the subsequent verification module is used for executing the next erasing verification operation after the erasing pressurization operation is continuously executed for the preset times by the erasing operation state machine.
Optionally, the apparatus for controlling erasing performance further comprises:
and the continuous verification module is used for executing the next erasing verification operation by the erasing operation state machine if the erasing verification switch is not opened.
Optionally, the apparatus for controlling erasing performance further comprises:
and the opening module is used for controlling the erasing verification switch to be opened when the upper computer determines that the time required by the erasing operation corresponding to the single erasing operation instruction is longer than the preset time.
Through the embodiment, when in erasing operation, the erasing verification operation is firstly executed, whether the threshold voltage of the memory unit to be erased is smaller than the verification voltage or not is judged, and if the threshold voltage of the memory unit to be erased is smaller than the verification voltage, the erasing operation is directly finished; when the current erasing cycle number is not less than the preset erasing cycle number, the erasing operation state machine continuously executes the preset erasing pressure number according to the starting condition of the erasing verification switch and the current erasing cycle number, skips the corresponding erasing verification operation, controls the cycle period of the erasing verification operation and the erasing pressure operation, saves the whole time of the erasing operation and improves the erasing performance of the NOR flash memory.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, herein, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
While the present invention has been described with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, which are illustrative and not restrictive, and it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (10)
1. A method for controlling erase performance, wherein the method is applied to a NOR flash memory, and the NORflash memory comprises: the method comprises the following steps of erasing a verification switch, an erasing operation state machine and an erasing storage unit, wherein the erasing operation state machine is respectively connected with the erasing verification switch and the erasing storage unit, and the method comprises the following steps:
the erase operation state machine receives an erase operation instruction, the erase operation instruction including: the address of the memory cell to be erased;
the erasing operation state machine executes erasing verification operation according to the erasing operation instruction, wherein the erasing verification operation is the operation of verifying whether the threshold voltage of the memory unit to be erased is smaller than a preset voltage, if so, the verification is passed, and if not, the verification is not passed;
if the verification is not passed, the erasing operation state machine executes erasing pressurization operation, and the erasing pressurization operation is the operation of continuously applying a preset voltage value to the erasing memory unit;
after the erasing operation state machine executes erasing pressurization operation, judging whether the current erasing circulation times reach the maximum value, wherein the erasing circulation times are the times of executing the erasing verification operation and the erasing pressurization operation when the erasing operation corresponding to the erasing operation instruction is completed, and each circulation time corresponds to one erasing verification operation and one erasing pressurization operation;
If the current erasing cycle number does not reach the maximum value, the erasing operation state machine judges whether an erasing verification switch is turned on;
if the erasing verification switch is turned on, the erasing operation state machine judges whether the current erasing cycle number is larger than a preset value;
if the current erasing cycle number is not more than the preset value, the erasing operation state machine continuously executes the erasing pressurization operation for preset times;
and after the erasing operation state machine continuously executes the erasing pressurization operation for preset times, executing the erasing verification operation for the next time.
2. The method of claim 1, wherein after the erase operation state machine determines whether the erase verify switch is open if the current number of erase cycles has not reached its maximum value, the method further comprises:
and if the erasing verification switch is not opened, the erasing operation state machine executes the next erasing verification operation.
3. The method of claim 1, wherein the erase verification switch is connected to a host computer, the method further comprising:
and the upper computer controls the erasing verification switch to be turned on when the time required for finishing the erasing operation corresponding to the single erasing operation instruction is determined to be greater than the preset time.
4. The method of claim 1, wherein the number of erase cycles is greater than the predetermined value, and wherein the predetermined value is greater than the predetermined number.
5. The method of claim 1, wherein if the erase verify switch is turned on, after the erase operation state machine determines whether the current number of erase cycles is greater than a predetermined value, the method further comprises:
and if the current erasing cycle number is larger than the preset value, the erasing operation state machine executes the next erasing verification operation.
6. The method of claim 1, wherein after the erase operation state machine performs the erase stress operation, determining whether a current number of erase cycles has reached its maximum value, the method further comprising:
and if the current erasing cycle number reaches the maximum value, the erasing operation state machine finishes the erasing operation corresponding to the erasing operation instruction.
7. The method of claim 1, wherein after the erase operation state machine performs an erase verify operation in accordance with the erase operation instructions, the method further comprises:
and if the verification is passed, the erasing operation state machine finishes the erasing operation corresponding to the erasing operation instruction.
8. An apparatus for controlling erase performance, wherein the apparatus is applied to a NOR flash memory, and the NORflash memory comprises: the device comprises an erasing verification switch, an erasing operation state machine and an erasing storage unit, wherein the erasing operation state machine is respectively connected with the erasing verification switch and the erasing storage unit, and the device comprises:
a receiving module, configured to receive an erasing operation instruction by the erasing operation state machine, where the erasing operation instruction includes: the address of the memory cell to be erased;
the execution verification module is used for executing the erasing verification operation by the erasing operation state machine according to the erasing operation instruction, wherein the erasing verification operation is an operation of verifying whether the threshold voltage of the memory unit to be erased is smaller than a preset voltage, if so, the verification is passed, and if not, the verification is not passed;
the erasing operation state machine is used for executing erasing pressurization operation if the verification is not passed, and the erasing pressurization operation is the operation of continuously applying a preset voltage value to the erasing storage unit;
a cycle number judging module, configured to judge whether a current erase cycle number reaches a maximum value after the erase operation state machine performs the erase pressurizing operation, where the erase cycle number is a number of times that the erase verification operation and the erase pressurizing operation need to be performed to complete an erase operation corresponding to the erase operation instruction, and each cycle number corresponds to one of the erase verification operation and one of the erase pressurizing operation;
The judging switch module is used for judging whether the erasing verification switch is turned on or not by the erasing operation state machine if the current erasing cycle number does not reach the maximum value;
the current time judging module is used for judging whether the current erasing cycle time is greater than a preset value or not by the erasing operation state machine if the erasing verification switch is turned on;
the continuous execution module is used for continuously executing the erasing pressurization operation for a preset number of times by the erasing operation state machine if the current erasing circulation number is not more than the preset value;
and the subsequent verification module is used for executing the erasing operation and executing the erasing verification operation next time after the erasing pressurization operation is continuously executed for the preset times by the state machine for executing the erasing operation.
9. The apparatus of claim 8, further comprising:
and the continuous verification module is used for executing the next erasing verification operation by the erasing operation state machine if the erasing verification switch is not opened.
10. The apparatus of claim 8, further comprising:
and the opening module is used for controlling the erasing verification switch to be opened when the upper computer determines that the time required by the erasing operation corresponding to the single erasing operation instruction is longer than the preset time.
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