CN117079700A - Multi-state performance testing method and device based on UFS storage device - Google Patents
Multi-state performance testing method and device based on UFS storage device Download PDFInfo
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Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/10—Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2268—Logging of test results
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2289—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by configuration test
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
- G06F11/3409—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
- G06F11/3452—Performance evaluation by statistical analysis
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
- G11C29/56008—Error analysis, representation of errors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
- G11C29/56016—Apparatus features
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
- G11C2029/5604—Display of error information
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The application relates to a multi-state performance test lifting method and device based on a UFS storage device, a computer device and a storage medium, wherein the method comprises the following steps: respectively writing performance test cases of all modules of the UFS3.1 storage equipment in three states of empty card, full card and dirty card; configuring a performance test environment on an MTK6893 development board; after the environment configuration to be tested is completed, running the written test cases on the MTK6893 development board to test random read-write performance and sequential read-write performance; and outputting a test result after all the test items are completed, and generating a graphical statistical analysis report. The application can fully collect the performance results of UFS3.1 equipment in different states, make up for the performance test method except the empty card state, and simultaneously ensure the pure performance test result on the MTK6893 platform.
Description
Technical Field
The present application relates to the field of storage testing technologies, and in particular, to a method and apparatus for improving multi-state performance testing based on UFS storage devices, a computer device, and a storage medium.
Background
UFS, which is known as universal flash memory storage Universal Flash Storage, is used for UFS3.1 by HS-G4 specification, and the single channel bandwidth can reach 11.6Gbps, which is twice the performance of UFS 2.1. The UFS3.1 standard has the advantages of faster transmission speed, lower power consumption, faster software response, smoother program operation and better power saving effect.
Currently, the popular testing method of the UFS3.1 is to perform performance testing of a system level based on some existing performance tests APP, such as Androidedbench, and the like. In addition, the general performance test program only tests the performance of the UFS3.1 device in the current state, cannot autonomously manufacture empty cards, full cards and dirty cards, and lacks performance data under the conditions of full cards and dirty cards of the device.
Disclosure of Invention
Based on the foregoing, it is necessary to provide a multi-state performance test promotion method, apparatus, computer device and storage medium based on UFS storage device.
A multi-state performance test promotion method based on UFS storage devices, the method comprising:
respectively writing performance test cases of all modules of the UFS3.1 storage equipment in three states of empty card, full card and dirty card;
configuring a performance test environment on an MTK6893 development board;
after the environment configuration to be tested is completed, running the written test cases on the MTK6893 development board to test random read-write performance and sequential read-write performance;
and outputting a test result after all the test items are completed, and generating a graphical statistical analysis report.
In one embodiment, the configuring the performance test environment on the MTK6893 development board includes:
the lu0 is configured as full card capacity, the storage mode is configured as SLC mode or TLC mode, and the read-write state mode is configured as buffer on or buffer off.
In one embodiment, the configuring the performance test environment on the MTK6893 development board further includes:
and configuring the initial state of the UFS3.1 storage device, wherein the initial state is that the card is empty, no operation is performed, the initial state is that the card is full, the operation of sequentially writing the full card is performed twice, and the initial state is that the card is dirty, the operation of sequentially writing the full card once and randomly writing the full card once is performed.
In one embodiment, the step of running the written test cases on the MTK6893 development board to perform random read-write performance and sequential read-write performance test includes:
performing a sequential write test with a test range of 1GB, a start address of 0, a chunksize of 1-48, 64, 96, 128, 256 blocks;
performing a sequential read test with a test range of 1GB, a starting address of 0, a chunksize of 1-48, 64, 96, 128, 256 blocks;
executing a random write test with a test range of 1GB, a starting address of 0, and a chunksize of 1-48, 64, 96, 128 and 256 blocks;
a random read test with a test range of 1GB is performed with a start address of 0 and a chunksize of 1-48, 64, 96, 128, 256 blocks.
A multi-state performance test lifting device based on UFS storage devices, the device comprising:
the writing module is used for writing performance test cases of the modules of the UFS3.1 storage device in three states of empty card, full card and dirty card respectively;
the configuration module is used for configuring the performance test environment on the MTK6893 development board;
the test module is used for running the written test cases on the MTK6893 development board to test the random read-write performance and the sequential read-write performance after the configuration of the environment to be tested is completed;
and the result output module is used for outputting test results after all the test projects are completed and generating a graphical statistical analysis report.
In one embodiment, the configuration module is further configured to:
the lu0 is configured as full card capacity, the storage mode is configured as SLC mode or TLC mode, and the read-write state mode is configured as buffer on or buffer off.
In one embodiment, the configuration module is further configured to:
and configuring the initial state of the UFS3.1 storage device, wherein the initial state is that the card is empty, no operation is performed, the initial state is that the card is full, the operation of sequentially writing the full card is performed twice, and the initial state is that the card is dirty, the operation of sequentially writing the full card once and randomly writing the full card once is performed.
In one embodiment, the test module is further configured to:
performing a sequential write test with a test range of 1GB, a start address of 0, a chunksize of 1-48, 64, 96, 128, 256 blocks;
performing a sequential read test with a test range of 1GB, a starting address of 0, a chunksize of 1-48, 64, 96, 128, 256 blocks;
executing a random write test with a test range of 1GB, a starting address of 0, and a chunksize of 1-48, 64, 96, 128 and 256 blocks;
a random read test with a test range of 1GB is performed with a start address of 0 and a chunksize of 1-48, 64, 96, 128, 256 blocks.
A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of any one of the methods described above when the computer program is executed.
A computer readable storage medium having stored thereon a computer program which when executed by a processor performs the steps of any of the methods described above.
According to the multi-state performance test lifting method, the device, the computer equipment and the storage medium based on the UFS storage equipment, performance test cases of all modules of the UFS3.1 storage equipment in three states of empty card, full card and dirty card are respectively written; configuring a performance test environment on an MTK6893 development board; after the environment configuration to be tested is completed, running the written test cases on the MTK6893 development board to test random read-write performance and sequential read-write performance; and outputting a test result after all the test items are completed, and generating a graphical statistical analysis report. The application can fully collect the performance results of UFS3.1 equipment in different states, make up for the performance test method except the empty card state, and simultaneously ensure the pure performance test result on the MTK6893 platform.
Drawings
Fig. 1 is a flow chart of a multi-state performance test promotion method based on UFS storage devices in one embodiment;
fig. 2 is a flow chart of a multi-state performance test promotion method based on UFS storage devices in another embodiment;
fig. 3 is a flowchart of a multi-state performance test promotion method based on a UFS storage device according to still another embodiment;
figure 4 is a block diagram of a multi-state performance test lifting device based on UFS storage devices in one embodiment;
fig. 5 is an internal structural diagram of a computer device in one embodiment.
Detailed Description
The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
Currently, the popular testing method of the UFS3.1 is to perform performance testing of a system level based on some existing performance tests APP, such as Androidedbench, and the like. In addition, the general performance test program only tests the performance of the UFS3.1 device in the current state, cannot autonomously manufacture empty cards, full cards and dirty cards, and lacks performance data under the conditions of full cards and dirty cards of the device.
Based on the method, the application provides a multi-state performance test lifting method based on the UFS storage device, and aims to solve the problem that the performance of the UFS device can be evaluated under a bad card state.
In one embodiment, as shown in fig. 1, there is provided a multi-state performance test promotion method based on UFS storage devices, the method comprising:
step 102, respectively writing performance test cases of all modules of the UFS3.1 storage device in three states of empty card, full card and dirty card;
104, configuring a performance test environment on an MTK6893 development board;
step 106, after the environment configuration to be tested is completed, running the written test cases on the MTK6893 development board to test the random read-write performance and the sequential read-write performance;
and step 108, outputting a test result after all the test items are completed, and generating a graphical statistical analysis report.
In this embodiment, a multi-state performance test promotion method based on UFS storage device is provided, where first, performance test cases of each module of UFS3.1 device in clean, sustain, dirty states are written, distributed test environment configuration of the performance test script is implemented on an MTK6893 development board, test script deployment, test case execution, and test report graphical statistical report analysis.
Firstly, respectively writing performance test cases of all modules of the UFS3.1 storage equipment in three states of empty card, full card and dirty card; the performance test environment is configured on an MTK6893 development board.
And then, after the configuration of the environment to be tested is finished, running the written test cases on the MTK6893 development board to test the random read-write performance and the sequential read-write performance, outputting test results after all test projects are finished, and generating a graphical statistical analysis report.
The storage state of the UFS3.1 device is divided into three parts: clear (empty card), dirty (dirty card) state, dividing subtest items under each state 1) random read/sequential read/write performance of buffer opening in TLC mode, 2) buffer closing random read/write/sequential read/write performance in TLC mode, 3) buffer opening random read/write/sequential read/write performance in SLC mode, 4) buffer closing random read/write/sequential read/write performance in SLC mode. The MTK6893 platform is an OS Less test platform developed based on Liunex kernel, and can completely avoid the computational power consumption of SOC when executing system command call at present in the performance test stage.
In one embodiment, the step of configuring the performance test environment on the MTK6893 development board includes: the lu0 is configured as full card capacity, the storage mode is configured as SLC mode or TLC mode, and the read-write state mode is configured as buffer on or buffer off.
Specifically, lu0=full card capacity can be configured; configuring an SLC mode or a TLC mode; the read-write state mode is configured as buffer on or buffer off.
In one embodiment, the step of configuring the performance test environment on the MTK6893 development board further comprises: and configuring the initial state of the UFS3.1 storage device, wherein the initial state is that the card is empty, no operation is performed, the initial state is that the card is full, the operation of sequentially writing the full card is performed twice, and the initial state is that the card is dirty, the operation of sequentially writing the full card once and randomly writing the full card once is performed.
Specifically, the initial state of the UFS3.1 device is configured: clean (empty card) does nothing. Sustand (full card), perform two sequential write full card operations. dirty card, performing one-time sequence write-once random write-once full card operation.
In the above embodiment, performance test cases of each module of the UFS3.1 storage device in three states of empty card, full card and dirty card are written respectively; configuring a performance test environment on an MTK6893 development board; after the environment configuration to be tested is completed, running the written test cases on the MTK6893 development board to test random read-write performance and sequential read-write performance; and outputting a test result after all the test items are completed, and generating a graphical statistical analysis report. The application can fully collect the performance results of UFS3.1 equipment in different states, make up for the performance test method except the empty card state, and simultaneously ensure the pure performance test result on the MTK6893 platform.
In one embodiment, as shown in fig. 2, a method for improving multi-state performance test based on UFS storage device is provided, where the steps of running a written test case on an MTK6893 development board to perform random read-write performance and sequential read-write performance test include:
step 202, performing a sequential write test with a test range of 1GB, a start address of 0, a chunksize of 1-48, 64, 96, 128, 256 blocks;
step 204, executing a sequential read test with a test range of 1GB, a start address of 0, a chunksize of 1-48, 64, 96, 128, 256 blocks;
step 206, executing a random write test with a test range of 1GB, a starting address of 0, a chunksize of 1-48, 64, 96, 128, 256 blocks;
step 208, a random read test is performed with a test range of 1GB, a start address of 0, and a chunksize of 1-48, 64, 96, 128, 256 blocks.
In this embodiment, a multi-state performance test promotion method based on UFS storage devices is provided, and a specific flowchart thereof may be shown with reference to fig. 3, including the following implementation steps:
1. configuration lu0=full card capacity.
2. SLC mode or TLC mode was configured.
3. The read-write status mode (buffer on or buffer off) is configured.
4. Initial state of configuration UFS3.1 device: clean (empty card) does nothing. Sustand (full card), perform two sequential write full card operations. dirty card, performing one-time sequence write-once random write-once full card operation.
5. Sequential write tests were performed with a test range of 1GB with a start address of 0 and a chunksize of 1-48, 64, 96, 128, 256 blocks.
6. Sequential read tests were performed with a test range of 1GB with a start address of 0 and a chunksize of 1-48, 64, 96, 128, 256 blocks.
7. Random write tests were performed with a test range of 1GB with a start address of 0 and a chunksize of 1-48, 64, 96, 128, 256 blocks.
8. A random read test with a test range of 1GB was performed with a start address of 0 and a chunksize of 1 to 48, 64, 96, 128, 256 blocks.
9. Placing a performance test script to an MTK6893 platform, collecting data, and finishing performance test results.
It should be understood that, although the steps in the flowcharts of fig. 1-3 are shown in order as indicated by the arrows, these steps are not necessarily performed in order as indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in fig. 1-3 may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, nor does the order in which the sub-steps or stages are performed necessarily occur in sequence, but may be performed alternately or alternately with at least a portion of the other steps or sub-steps or stages of other steps.
In one embodiment, as shown in fig. 4, there is provided a multi-state performance test lifting apparatus 400 based on UFS storage devices, the apparatus comprising:
the writing module 401 is used for writing performance test cases of each module of the UFS3.1 storage device in three states of empty card, full card and dirty card respectively;
a configuration module 402, configured to configure a performance test environment on an MTK6893 development board;
the test module 403 is configured to run the written test cases on the MTK6893 development board to perform random read-write performance and sequential read-write performance tests after the configuration of the environment to be tested is completed;
and the result output module 404 is used for outputting test results after all the test projects are completed and generating a graphical statistical analysis report.
In one embodiment, the configuration module 402 is further configured to:
the lu0 is configured as full card capacity, the storage mode is configured as SLC mode or TLC mode, and the read-write state mode is configured as buffer on or buffer off.
In one embodiment, the configuration module 402 is further configured to:
and configuring the initial state of the UFS3.1 storage device, wherein the initial state is that the card is empty, no operation is performed, the initial state is that the card is full, the operation of sequentially writing the full card is performed twice, and the initial state is that the card is dirty, the operation of sequentially writing the full card once and randomly writing the full card once is performed.
In one embodiment, test module 403 is further to:
performing a sequential write test with a test range of 1GB, a start address of 0, a chunksize of 1-48, 64, 96, 128, 256 blocks;
performing a sequential read test with a test range of 1GB, a starting address of 0, a chunksize of 1-48, 64, 96, 128, 256 blocks;
executing a random write test with a test range of 1GB, a starting address of 0, and a chunksize of 1-48, 64, 96, 128 and 256 blocks;
a random read test with a test range of 1GB is performed with a start address of 0 and a chunksize of 1-48, 64, 96, 128, 256 blocks.
For specific limitations on the UFS storage device-based multi-state performance test lifting apparatus, reference may be made to the above limitation on the UFS storage device-based multi-state performance test lifting method, and no further description is given here.
In one embodiment, a computer device is provided, the internal structure of which may be as shown in FIG. 5. The computer device includes a processor, a memory, and a network interface connected by a device bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The nonvolatile storage medium stores an operating device, a computer program, and a database. The internal memory provides an environment for the operation of the operating device and the computer program in the non-volatile storage medium. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program, when executed by a processor, implements a method for improving multi-state performance testing based on UFS storage devices.
It will be appreciated by those skilled in the art that the structure shown in FIG. 5 is merely a block diagram of some of the structures associated with the present inventive arrangements and is not limiting of the computer device to which the present inventive arrangements may be applied, and that a particular computer device may include more or fewer components than shown, or may combine some of the components, or have a different arrangement of components.
In one embodiment, a computer device is provided that includes a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the steps in the method embodiments above when executing the computer program.
In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored which, when executed by a processor, carries out the steps of the above method embodiments.
Those skilled in the art will appreciate that implementing all or part of the above described embodiment methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed may comprise the steps of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in embodiments provided herein may include non-volatile and/or volatile memory. The nonvolatile memory can include Read Only Memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous Link DRAM (SLDRAM), memory bus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), among others.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.
Claims (10)
1. A multi-state performance test promotion method based on UFS storage devices, the method comprising:
respectively writing performance test cases of all modules of the UFS3.1 storage equipment in three states of empty card, full card and dirty card;
configuring a performance test environment on an MTK6893 development board;
after the environment configuration to be tested is completed, running the written test cases on the MTK6893 development board to test random read-write performance and sequential read-write performance;
and outputting a test result after all the test items are completed, and generating a graphical statistical analysis report.
2. The UFS storage device-based multi-state performance test enhancement method of claim 1, wherein said configuring the performance test environment on the MTK6893 development board comprises:
the lu0 is configured as full card capacity, the storage mode is configured as SLC mode or TLC mode, and the read-write state mode is configured as buffer on or buffer off.
3. The UFS storage device-based multi-state performance test enhancement method of claim 2, wherein said configuring the performance test environment on the MTK6893 development board further comprises:
and configuring the initial state of the UFS3.1 storage device, wherein the initial state is that the card is empty, no operation is performed, the initial state is that the card is full, the operation of sequentially writing the full card is performed twice, and the initial state is that the card is dirty, the operation of sequentially writing the full card once and randomly writing the full card once is performed.
4. The method for improving performance test of multiple states based on UFS storage device according to claim 3, wherein the step of running the written test cases on the MTK6893 development board to perform random read-write performance and sequential read-write performance test includes:
performing a sequential write test with a test range of 1GB, a start address of 0, a chunksize of 1-48, 64, 96, 128, 256 blocks;
performing a sequential read test with a test range of 1GB, a starting address of 0, a chunksize of 1-48, 64, 96, 128, 256 blocks;
executing a random write test with a test range of 1GB, a starting address of 0, and a chunksize of 1-48, 64, 96, 128 and 256 blocks;
a random read test with a test range of 1GB is performed with a start address of 0 and a chunksize of 1-48, 64, 96, 128, 256 blocks.
5. A multi-state performance test lifting device based on UFS storage devices, the device comprising:
the writing module is used for writing performance test cases of the modules of the UFS3.1 storage device in three states of empty card, full card and dirty card respectively;
the configuration module is used for configuring the performance test environment on the MTK6893 development board;
the test module is used for running the written test cases on the MTK6893 development board to test the random read-write performance and the sequential read-write performance after the configuration of the environment to be tested is completed;
and the result output module is used for outputting test results after all the test projects are completed and generating a graphical statistical analysis report.
6. The UFS storage device-based multi-state performance test lifting apparatus of claim 5, wherein the configuration module is further configured to:
the lu0 is configured as full card capacity, the storage mode is configured as SLC mode or TLC mode, and the read-write state mode is configured as buffer on or buffer off.
7. The UFS storage device-based multi-state performance test lifting apparatus of claim 6, wherein the configuration module is further configured to:
and configuring the initial state of the UFS3.1 storage device, wherein the initial state is that the card is empty, no operation is performed, the initial state is that the card is full, the operation of sequentially writing the full card is performed twice, and the initial state is that the card is dirty, the operation of sequentially writing the full card once and randomly writing the full card once is performed.
8. The UFS storage device-based multi-state performance test lifting apparatus of claim 7, wherein the test module is further configured to:
performing a sequential write test with a test range of 1GB, a start address of 0, a chunksize of 1-48, 64, 96, 128, 256 blocks;
performing a sequential read test with a test range of 1GB, a starting address of 0, a chunksize of 1-48, 64, 96, 128, 256 blocks;
executing a random write test with a test range of 1GB, a starting address of 0, and a chunksize of 1-48, 64, 96, 128 and 256 blocks;
a random read test with a test range of 1GB is performed with a start address of 0 and a chunksize of 1-48, 64, 96, 128, 256 blocks.
9. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the steps of the method according to any one of claims 1 to 4 when the computer program is executed.
10. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 1 to 4.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117476086A (en) * | 2023-12-26 | 2024-01-30 | 成都佰维存储科技有限公司 | Memory performance test method and device, readable storage medium and electronic equipment |
| CN117472294A (en) * | 2023-12-28 | 2024-01-30 | 合肥康芯威存储技术有限公司 | Memory and data processing method thereof |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117476086A (en) * | 2023-12-26 | 2024-01-30 | 成都佰维存储科技有限公司 | Memory performance test method and device, readable storage medium and electronic equipment |
| CN117472294A (en) * | 2023-12-28 | 2024-01-30 | 合肥康芯威存储技术有限公司 | Memory and data processing method thereof |
| CN117472294B (en) * | 2023-12-28 | 2024-04-09 | 合肥康芯威存储技术有限公司 | Memory and data processing method thereof |
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