CN114138176A - Nor Flash erasing and upgrading method and device, computer equipment and storage medium - Google Patents
Nor Flash erasing and upgrading method and device, computer equipment and storage medium Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0608—Saving storage space on storage systems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/064—Management of blocks
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/0644—Management of space entities, e.g. partitions, extents, pools
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
- G06F3/0652—Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
Abstract
The application relates to the field of storage, in particular to a Nor Flash erasing and upgrading method, device, computer equipment and storage medium, wherein the erasing method comprises the following steps: determining a corresponding erasing instruction according to a preset rule based on the obtained alignment mode and the space size of the initial address of the partition to be erased; performing data erasure on the corresponding space of the partition to be erased based on the erasure instruction; and repeating the steps of determining an erasing instruction and erasing the data until the data erasing of the partition to be erased is completed. According to the method and the device, the corresponding erasing instruction is determined according to the preset rule based on the obtained alignment mode and the space size of the initial address of the partition to be erased, and the data of the corresponding space of the partition to be erased is erased, so that the Nor Flash space utilization rate can be effectively improved, and the erasing efficiency of the partition to be erased is effectively improved.
Description
Technical Field
The present application relates to the field of storage, and in particular, to a Nor Flash erasing and upgrading method and apparatus, a computer device, and a storage medium.
Background
Nor Flash is one of two main nonvolatile memories in the market at present, and is mainly characterized in that the Nor Flash is executed in a chip, so that an application program can be directly operated in the Flash memory without reading codes into a system RAM, but the Nor Flash has a complex process and a high price. Nor Flash has high transmission efficiency and high cost benefit at a small capacity of 1-4 MB, but the performance of Nor Flash is greatly influenced by the low writing and erasing speeds.
In general, for Nor Flash, the erase modes can be divided into 4k sector erase, 32k erase block, and 64k erase block. In the prior art for erasing Nor Flash, one of several erasing modes is usually selected, and such an erasing method is low in efficiency.
Disclosure of Invention
In view of the foregoing, it is necessary to provide a Nor Flash erasing and upgrading method and apparatus, a computer device, and a storage medium.
In a first aspect, an embodiment of the present invention provides an erasing method for Nor Flash, including:
determining a corresponding erasing instruction according to a preset rule based on the obtained alignment mode and the space size of the initial address of the partition to be erased;
performing data erasure on the corresponding space of the partition to be erased based on the erasure instruction;
and repeating the steps of determining an erasing instruction and erasing the data until the data erasing of the partition to be erased is completed.
In this embodiment, based on the obtained alignment mode and the space size of the start address of the partition to be erased, the corresponding erase instruction is determined according to the preset rule, and data erase is performed on the space corresponding to the partition to be erased, so that the Nor Flash space utilization rate can be effectively improved, and the erase efficiency of the partition to be erased can be effectively improved.
In an embodiment, the determining, according to a preset rule, a corresponding erase instruction based on the obtained alignment manner and the space size of the start address of the partition to be erased includes:
if the space size of the partition to be erased is larger than or equal to the size of an erase block corresponding to the alignment mode of the initial address of the partition to be erased, determining a corresponding erase instruction based on the size of the erase block;
and if the space size of the partition to be erased is smaller than the size of the erase block corresponding to the alignment mode of the initial address of the partition to be erased, selecting the erase block smaller than or equal to the space size of the partition to be erased from large to small, and determining a corresponding erase instruction based on the size of the erase block.
In an embodiment, when the space size of the partition to be erased is 0, it is determined that the data erasure of the partition to be erased is completed.
In a second aspect, an embodiment of the present invention provides an upgrading method for Nor Flash, including:
determining a corresponding erasing instruction according to a preset rule based on the obtained alignment mode and the space size of the initial address of the partition to be upgraded;
performing data erasure on the corresponding space of the partition to be upgraded based on the erasure instruction and writing the corresponding upgrade data into the corresponding space;
and repeating the steps of determining an erasing instruction, erasing data and writing upgrading data until the partition to be upgraded is upgraded.
In this embodiment, based on the obtained alignment mode and the space size of the start address of the partition to be upgraded, the corresponding erasing instruction is determined according to the preset rule, and based on the erasing instruction, data erasing is performed on the corresponding space of the partition to be upgraded and the corresponding upgrading data is written in, so that the space utilization rate of Nor Flash can be effectively improved, the erasing efficiency of the partition to be upgraded is effectively improved, and the upgrading efficiency of Nor Flash can be improved.
In an embodiment, the determining, according to a preset rule, a corresponding erase instruction based on the obtained alignment manner and the space size of the start address of the partition to be upgraded includes:
if the space size of the partition to be upgraded is larger than or equal to the size of an erasing block corresponding to the alignment mode of the initial address of the partition to be upgraded, determining a corresponding erasing instruction based on the size of the erasing block;
and if the space size of the partition to be upgraded is smaller than the size of the erasing block corresponding to the alignment mode of the initial address of the partition to be upgraded, selecting the erasing block smaller than or equal to the space size of the partition to be upgraded from large to small, and determining a corresponding erasing instruction based on the size of the erasing block.
In an embodiment, when the size of the space of the partition to be upgraded is 0, it is determined that the partition to be upgraded completes upgrading.
In a third aspect, an embodiment of the present invention provides an erasing apparatus for Nor Flash, including:
the determining module is used for determining a corresponding erasing instruction according to a preset rule based on the obtained alignment mode and the space size of the initial address of the partition to be erased;
the erasing module is used for erasing data of the corresponding space of the partition to be erased based on the erasing instruction;
and repeating the steps of determining an erasing instruction and erasing the data until the data erasing of the partition to be erased is completed.
In a fourth aspect, an embodiment of the present invention provides an Nor Flash upgrading apparatus, including:
the determining module is used for determining a corresponding erasing instruction according to a preset rule based on the obtained alignment mode and the space size of the starting address of the partition to be upgraded;
the upgrading module is used for erasing data in the corresponding space of the partition to be upgraded based on the erasing instruction and writing the corresponding upgrading data in;
and repeating the steps of determining an erasing instruction, erasing data and writing upgrading data until the partition to be upgraded is upgraded.
In a fifth aspect, an embodiment of the present invention provides a computer device, including a memory and a processor, where the memory stores a computer program, and the processor implements the following steps when executing the computer program:
determining a corresponding erasing instruction according to a preset rule based on the obtained alignment mode and the space size of the initial address of the partition to be erased;
performing data erasure on the corresponding space of the partition to be erased based on the erasure instruction;
and repeating the steps of determining an erasing instruction and erasing the data until the data erasing of the partition to be erased is completed.
Determining a corresponding erasing instruction according to a preset rule based on the obtained alignment mode and the space size of the initial address of the partition to be upgraded;
performing data erasure on the corresponding space of the partition to be upgraded based on the erasure instruction and writing the corresponding upgrade data into the corresponding space;
and repeating the steps of determining an erasing instruction, erasing data and writing upgrading data until the partition to be upgraded is upgraded.
In a sixth aspect, an embodiment of the present invention provides a computer-readable storage medium, on which a computer program is stored, where the computer program is executed by a processor to implement the following steps:
determining a corresponding erasing instruction according to a preset rule based on the obtained alignment mode and the space size of the initial address of the partition to be erased;
performing data erasure on the corresponding space of the partition to be erased based on the erasure instruction;
and repeating the steps of determining an erasing instruction and erasing the data until the data erasing of the partition to be erased is completed.
Determining a corresponding erasing instruction according to a preset rule based on the obtained alignment mode and the space size of the initial address of the partition to be upgraded;
performing data erasure on the corresponding space of the partition to be upgraded based on the erasure instruction and writing the corresponding upgrade data into the corresponding space;
and repeating the steps of determining an erasing instruction, erasing data and writing upgrading data until the partition to be upgraded is upgraded.
Drawings
FIG. 1 is a diagram of an application environment of the Nor Flash upgrade method in one embodiment;
FIG. 2 is a diagram illustrating a prior art erase method;
FIG. 3 is a flowchart illustrating an erasing method of Nor Flash in one embodiment;
FIG. 4 is a flow diagram illustrating a method for determining an erase command in one embodiment;
FIG. 5 is a flowchart illustrating an erase method of Nor Flash in an exemplary embodiment;
FIG. 6 is a flowchart illustrating an upgrading method for Nor Flash in another embodiment;
FIG. 7 is a flowchart illustrating a method for determining an erase command in accordance with another embodiment;
FIG. 8 is a flowchart illustrating an upgrading method for Nor Flash in another exemplary embodiment;
FIG. 9 is a schematic diagram illustrating an erasing apparatus of Nor Flash in one embodiment;
FIG. 10 is a schematic structural diagram of an upgrade apparatus for Nor Flash in an embodiment;
FIG. 11 is a diagram illustrating an internal structure of a computer device in one embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
The Nor Flash erasing method can be applied to the application environment shown in FIG. 1. Wherein the terminal 102 communicates with the server 104 via a network. The terminal 102 firstly determines a corresponding erasing instruction according to a preset rule based on the obtained alignment mode and the space size of the initial address of the partition to be erased, and erases data in the corresponding space of the partition to be erased; and repeating the steps of determining an erasing instruction and erasing the data until the data erasing of the partition to be erased is completed. The terminal 102 then sends the result of the data erasure to the server 104. The terminal 102 may be, but not limited to, various personal computers, notebook computers, smart phones, tablet computers, and portable wearable devices, and the server 104 may be implemented by an independent server or a server cluster formed by a plurality of servers.
In the prior art, one of several erasing modes is usually selected for the Nor Flash erasing method, and the erasing method has low efficiency. FIG. 2 is a diagram illustrating a prior art method for erasing a partition to be erased. In fig. 2, the size of the Nor Flash to be erased partition is 320K, the size of the software program in the to-be-erased partition is 257K, if the basic unit of the erase block is 64K, and the size of the last erase block is 1K, there is a waste of 63K space in the to-be-erased partition, and it takes longer to erase 1K space with 64K erase blocks compared with other smaller blocks, resulting in a low Nor Flash erase efficiency.
It should be noted that the programming principle of Nor Flash is that only 1 can be written as 0, but 0 cannot be written as 1. Before Flash upgrading, the corresponding area must be erased, and the erasing process is a process of writing all bits to 1.
In an embodiment, as shown in fig. 3, an erasing method for Nor Flash is provided, which is described by taking the method as an example applied to the terminal in fig. 1, and includes the following steps:
s202: determining a corresponding erasing instruction according to a preset rule based on the obtained alignment mode and the space size of the initial address of the partition to be erased;
s204: performing data erasure on the corresponding space of the partition to be erased based on the erasure instruction;
s206: and repeating the steps of determining the erasing instruction and erasing the data until the to-be-erased partition finishes erasing the data.
In this embodiment, based on the obtained alignment mode and the space size of the start address of the partition to be erased, the corresponding erase instruction is determined according to the preset rule, and data erase is performed on the space corresponding to the partition to be erased, so that the Nor Flash space utilization rate can be effectively improved, and the erase efficiency of the partition to be erased can be effectively improved.
When erasing the partition to be erased, the alignment mode and the space size of the starting address of the partition to be erased need to be extracted first.
In an embodiment, the method for determining the corresponding erase instruction according to the preset rule based on the obtained alignment manner and the space size of the start address of the partition to be erased, as shown in fig. 4, includes the following steps:
s302: if the space size of the partition to be erased is larger than or equal to the size of an erase block corresponding to the alignment mode of the initial address of the partition to be erased, determining a corresponding erase instruction based on the size of the erase block;
s304: and if the space size of the partition to be erased is smaller than the size of the erase block corresponding to the alignment mode of the initial address of the partition to be erased, selecting the erase block smaller than or equal to the space size of the partition to be erased from large to small, and determining a corresponding erase instruction based on the size of the erase block.
To avoid data erasure anomalies, the size of the erase block needs to correspond to the alignment of the starting address of the partition to be erased. For example, when the alignment of the start address of the partition to be erased is 64K, 64K erase blocks are preferably used. It is understood that when the alignment of the start address of the partition to be erased is 64K, 32K erase blocks or 4K erase blocks may be used, but such erase is inefficient.
When the space of the partition to be erased meets the requirement, that is, the size of the space of the partition to be erased is greater than or equal to the size of the erase block corresponding to the alignment mode of the start address of the partition to be erased, the erase instruction corresponding to the alignment mode of the start address of the partition to be erased is preferentially selected for erasing, because the larger the erase block is, the higher the erase efficiency is.
Under the condition that the space of the partition to be erased does not meet the requirement, namely the space size of the partition to be erased is smaller than the size of the erase block corresponding to the alignment mode of the starting address of the partition to be erased, usually, at the last stage of erasing the partition to be erased, the erase block with the space size smaller than or equal to the size of the space of the partition to be erased is selected from large to small, and the larger the erase block is, the higher the erasing efficiency is. However, in the prior art, the same size of erase block is still used for erasing, which results in excessive space being erased, resulting in waste of Nor Flash space and longer erase time being required, so that the method can effectively improve the space utilization rate of Nor Flash and the erase efficiency of Nor Flash.
In an example embodiment, the three erase commands include 4K erase blocks, 32K erase blocks, and 64K erase blocks, respectively. Fig. 5 is an erasing flow chart of Nor Flash, and as shown in fig. 5, the alignment mode and the space size of the start address of the partition to be erased are first obtained, and whether the space size is 0 is determined, if not, it is determined whether the start address is 64K aligned, if 64K aligned, it is determined whether the space size of the partition to be upgraded is greater than or equal to 32K and smaller than 64K, if so, 32K erasing is performed on the corresponding space of the partition to be upgraded and 32K upgrade data is written in, and at the same time, the start address is increased by 32K, and 32K is subtracted from the space size; if not, judging whether the space size of the partition to be upgraded is smaller than 32K, if so, executing 4K erasing on the corresponding space of the partition to be erased, meanwhile, adding 4K to the initial address, subtracting 4K from the space size, and if the space size of the partition to be upgraded is larger than or equal to 64K, executing 64K erasing on the corresponding space of the partition to be erased, meanwhile, adding 64K to the initial address, and subtracting 64K from the space size; if the initial address is not 64K aligned, judging whether the initial address is 32K aligned, if the initial address is 32K aligned, judging whether the space size of the partition to be upgraded is smaller than 32K, if so, executing 4K erasing on the space corresponding to the partition to be erased, simultaneously adding 4K to the initial address, subtracting 4K from the space size, if the space of the partition to be upgraded is larger than or equal to 32K, executing 32K erasing on the space corresponding to the partition to be erased, simultaneously adding 32K to the initial address, and subtracting 32K from the space size; if the starting address is not 32K aligned, 4K erasing is performed on the corresponding space of the partition to be erased, meanwhile, the starting address is increased by 4K, and the size of the space is reduced by 4K. And repeating the steps until the space size of the partition to be erased is 0, and finishing the erasing of the partition to be erased.
According to the example embodiment, the method selects the size of the erasing block according to the alignment mode and the space size of the initial address of the partition to be erased, and effectively improves the space utilization rate of Nor Flash and the erasing efficiency of Nor Flash.
In another embodiment, as shown in fig. 6, a Nor Flash upgrading method is provided, which includes the following steps:
s502: determining a corresponding erasing instruction according to a preset rule based on the obtained alignment mode and the space size of the initial address of the partition to be upgraded;
s504: performing data erasure on the corresponding space of the partition to be upgraded based on the erasure instruction and writing the corresponding upgrading data into the corresponding space;
s506: and repeating the steps of determining an erasing instruction, erasing data and writing upgrading data until the upgrading of the partition to be upgraded is completed.
When the partition to be upgraded is upgraded, firstly, data of the partition to be upgraded is erased, and upgrade data is written in a data erasing space, so that the upgrade of Nor Flash is realized.
In this embodiment, the upgrade data remains 4K aligned, with the last remaining upgrade data at upgrade necessarily being 4K or 32K or 64K in size.
It can be understood that the erasing method adopted in the embodiment is the same as the erasing method of the Nor Flash adopted in the embodiment, and based on the technical effects of the embodiment, the upgrading method provided in the embodiment can improve the upgrading efficiency of the Nor Flash.
Based on the obtained alignment mode and the space size of the starting address of the partition to be upgraded, a method for determining a corresponding erasing instruction according to a preset rule is provided, as shown in fig. 7, and includes the following steps:
s602: if the space size of the partition to be upgraded is larger than or equal to the size of an erasing block corresponding to the alignment mode of the initial address of the partition to be upgraded, determining a corresponding erasing instruction based on the size of the erasing block;
s604: and if the space size of the partition to be upgraded is smaller than the size of the erasing block corresponding to the alignment mode of the initial address of the partition to be upgraded, selecting the erasing block smaller than or equal to the space size of the partition to be upgraded from large to small, and determining a corresponding erasing instruction based on the size of the erasing block.
It can be understood that the erasing method adopted in this embodiment is the same as the erasing method of Nor Flash adopted in the above embodiments, and therefore the specific implementation scheme and technical effect thereof are not described in detail.
In an example embodiment, the three erase commands include 4K erase blocks, 32K erase blocks, and 64K erase blocks, respectively. Fig. 8 is an upgrade flow chart of Nor Flash, and as shown in fig. 5, the alignment mode and the space size of the start address of the partition to be upgraded are first obtained, and it is determined whether the space size is 0, if not, it is determined whether the start address is 64K aligned, if 64K aligned, it is determined whether the space size of the partition to be upgraded is greater than or equal to 32K and smaller than 64K, if so, 32K erasing is performed on the corresponding space of the partition to be upgraded and 32K upgrade data is written in, and at the same time, the start address is increased by 32K, and 32K is subtracted from the space size; if not, judging whether the space size of the partition to be upgraded is smaller than 32K, if so, executing 4K erasing on the corresponding space of the partition to be upgraded and writing 4K upgrading data into the corresponding space of the partition to be upgraded, meanwhile, increasing the initial address by 4K and subtracting 4K from the space size, and if the space of the partition to be upgraded is larger than or equal to 64K, executing 64K erasing on the corresponding space of the partition to be upgraded and writing 64K upgrading data into the corresponding space of the partition to be upgraded, simultaneously, increasing the initial address by 64K and subtracting 64K from the space size; if the starting address is not 64K aligned, judging whether the starting address is 32K aligned, if the starting address is 32K aligned, judging whether the space size of the partition to be upgraded is smaller than 32K, if so, executing 4K erasing on the space corresponding to the partition to be upgraded and writing 4K upgrading data into the space, simultaneously adding 4K to the starting address, subtracting 4K from the space size, if the space of the partition to be upgraded is larger than or equal to 32K, executing 32K erasing on the space corresponding to the partition to be upgraded and writing 32K upgrading data into the space, simultaneously adding 32K to the starting address, and subtracting 32K from the space size; if the starting address is not 32K aligned, 4K erasing is performed on the corresponding space of the partition to be upgraded, 4K upgrading data is written in, meanwhile, the starting address is increased by 4K, and 4K is subtracted from the size of the space. And repeating the steps until the space size of the partition to be upgraded is 0, and finishing the erasing of the partition to be upgraded.
According to the example embodiment, the method selects the size of the erase block according to the alignment mode and the space size of the initial address of the partition to be upgraded, and effectively improves the space utilization rate of Nor Flash and the upgrading efficiency of Nor Flash.
It should be understood that, although the various steps in the above-described flowcharts are shown in sequence, the steps are not necessarily performed in the order indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least some of the steps in fig. 1-8 may include multiple steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, which are not necessarily performed in sequence, but may be performed in turn or alternately with other steps or at least some of the other steps.
In one embodiment, as shown in fig. 9, the present invention provides an erasing apparatus for Nor Flash, the erasing apparatus comprising: a determining module 902, configured to determine, based on the obtained alignment manner and the space size of the start address of the partition to be erased, a corresponding erase instruction according to a preset rule; an erasing module 904, configured to erase data in a space corresponding to a partition to be erased based on the erasing instruction; and repeating the steps of determining an erasing instruction and erasing data until the data erasing of the partition to be erased is completed.
In an embodiment, the determining module is specifically configured to: if the space size of the partition to be erased is larger than or equal to the size of an erase block corresponding to the alignment mode of the initial address of the partition to be erased, determining a corresponding erase instruction based on the size of the erase block; if the space size of the partition to be erased is smaller than the size of the erase block corresponding to the alignment mode of the starting address of the partition to be erased, selecting the erase block smaller than or equal to the space size of the partition to be erased from large to small, and determining a corresponding erase instruction based on the size of the erase block; and performing data erasure on the corresponding space of the partition to be erased based on the erasure instruction.
In an embodiment, when the space size of the partition to be erased is 0, it is determined that the data erasure of the partition to be erased is completed
For the specific definition of the Nor Flash erasing apparatus, reference may be made to the above definition of the Nor Flash erasing method, which is not described herein again. All or part of each module in the Nor Flash erasing device can be realized by software, hardware and a combination thereof. The modules can be embedded in a hardware form or independently arranged in a processor in the computer equipment, or can be stored in a memory in the computer equipment in a software form, so that the processor can call and execute the corresponding operations of the modules.
In another embodiment, as shown in fig. 10, the present invention provides a Nor Flash upgrading apparatus, including: a determining module 1002, configured to determine, based on the obtained alignment manner and the space size of the start address of the partition to be upgraded, a corresponding erasing instruction according to a preset rule; the upgrading module 1004 is configured to erase data in a corresponding space of a partition to be upgraded based on the erase instruction and write corresponding upgrading data in the corresponding space; and repeating the steps of determining an erasing instruction, erasing data and writing upgrading data until the partition to be upgraded is upgraded.
In an embodiment, the determining module is specifically configured to: if the space size of the partition to be upgraded is larger than or equal to the size of an erasing block corresponding to the alignment mode of the initial address of the partition to be upgraded, determining a corresponding erasing instruction based on the size of the erasing block; if the space size of the partition to be upgraded is smaller than the size of the erasing block corresponding to the alignment mode of the starting address of the partition to be upgraded, selecting the erasing block smaller than or equal to the space size of the partition to be upgraded from large to small, and determining a corresponding erasing instruction based on the size of the erasing block; and performing data erasure on the corresponding space of the partition to be upgraded based on the erasure instruction.
In an embodiment, when the size of the space of the partition to be upgraded is 0, it is determined that the partition to be upgraded completes upgrading.
For specific definition of the Nor Flash upgrading device, reference may be made to the above definition of the Nor Flash upgrading method, which is not described herein again. All or part of each module in the Nor Flash upgrading device can be realized by software, hardware and a combination thereof. The modules can be embedded in a hardware form or independently arranged in a processor in the computer equipment, or can be stored in a memory in the computer equipment in a software form, so that the processor can call and execute the corresponding operations of the modules.
In one embodiment, a computer device is provided, and the computer device may be a server, and the internal structure thereof may be as shown in fig. 11. The computer device includes a processor, a memory, and a network interface connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The database of the computer device is used for storing motion detection data. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to realize the steps in any embodiment of the Nor Flash erasing method or upgrading method.
Those skilled in the art will appreciate that the architecture shown in fig. 11 is merely a block diagram of some of the structures associated with the disclosed aspects and is not intended to limit the computing devices to which the disclosed aspects apply, as particular computing devices may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.
In an embodiment, a computer device is provided, which includes a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in any one of the above-mentioned Nor Flash erasing method or upgrading method embodiments.
In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored, which, when being executed by a processor, carries out the steps of any one of the above-described Nor Flash erase method or upgrade method embodiments.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database or other medium used in the embodiments provided herein can include at least one of non-volatile and volatile memory. Non-volatile Memory may include Read-Only Memory (ROM), magnetic tape, floppy disk, flash Memory, optical storage, or the like. Volatile Memory can include Random Access Memory (RAM) or external cache Memory. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM), for example.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent application shall be subject to the appended claims.
Claims (10)
1. An erasing method of Nor Flash is characterized by comprising the following steps:
determining a corresponding erasing instruction according to a preset rule based on the obtained alignment mode and the space size of the initial address of the partition to be erased;
performing data erasure on the corresponding space of the partition to be erased based on the erasure instruction;
and repeating the steps of determining an erasing instruction and erasing the data until the data erasing of the partition to be erased is completed.
2. The method according to claim 1, wherein the determining, according to a preset rule, a corresponding erase instruction based on the obtained alignment manner and the space size of the start address of the partition to be erased comprises:
if the space size of the partition to be erased is larger than or equal to the size of an erase block corresponding to the alignment mode of the initial address of the partition to be erased, determining a corresponding erase instruction based on the size of the erase block;
and if the space size of the partition to be erased is smaller than the size of the erase block corresponding to the alignment mode of the initial address of the partition to be erased, selecting the erase block smaller than or equal to the space size of the partition to be erased from large to small, and determining a corresponding erase instruction based on the size of the erase block.
3. The method of claim 1, wherein when the space size of the partition to be erased is 0, it is determined that the partition to be erased completes the data erasure.
4. An upgrading method of Nor Flash is characterized by comprising the following steps:
determining a corresponding erasing instruction according to a preset rule based on the obtained alignment mode and the space size of the initial address of the partition to be upgraded;
performing data erasure on the corresponding space of the partition to be upgraded based on the erasure instruction and writing the corresponding upgrade data;
and repeating the steps of determining an erasing instruction, erasing data and writing upgrading data until the partition to be upgraded is upgraded.
5. The method according to claim 4, wherein the determining, according to a preset rule, a corresponding erase instruction based on the obtained alignment manner and the space size of the start address of the partition to be upgraded comprises:
if the space size of the partition to be upgraded is larger than or equal to the size of an erasing block corresponding to the alignment mode of the initial address of the partition to be upgraded, determining a corresponding erasing instruction based on the size of the erasing block;
and if the space size of the partition to be upgraded is smaller than the size of the erasing block corresponding to the alignment mode of the initial address of the partition to be upgraded, selecting the erasing block smaller than or equal to the space size of the partition to be upgraded from large to small, and determining a corresponding erasing instruction based on the size of the erasing block.
6. The method of claim 4, wherein when the space size of the partition to be upgraded is 0, it is determined that the partition to be upgraded is upgraded.
7. An erasing apparatus of Nor Flash, comprising:
the determining module is used for determining a corresponding erasing instruction according to a preset rule based on the obtained alignment mode and the space size of the initial address of the partition to be erased;
the erasing module is used for erasing data of the corresponding space of the partition to be erased based on the erasing instruction;
and repeating the steps of determining an erasing instruction and erasing the data until the data erasing of the partition to be erased is completed.
8. An Nor Flash upgrading device, comprising:
the determining module is used for determining a corresponding erasing instruction according to a preset rule based on the obtained alignment mode and the space size of the starting address of the partition to be upgraded;
the upgrading module is used for erasing data in the corresponding space of the partition to be upgraded based on the erasing instruction and writing the corresponding upgrading data in;
and repeating the steps of determining an erasing instruction, erasing data and writing upgrading data until the partition to be upgraded is upgraded.
9. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor, when executing the computer program, implements the steps of the method of any one of claims 1 to 6.
10. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 6.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115309344A (en) * | 2022-09-30 | 2022-11-08 | 芯天下技术股份有限公司 | Method, device, equipment and medium for erasing whole chip of nor flash |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115309344A (en) * | 2022-09-30 | 2022-11-08 | 芯天下技术股份有限公司 | Method, device, equipment and medium for erasing whole chip of nor flash |
| CN115309344B (en) * | 2022-09-30 | 2022-12-13 | 芯天下技术股份有限公司 | Method, device, equipment and medium for erasing whole chip of nor flash |
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