CN111856460B - Collaborative design method of W FMCW SAR and small UAV integrated system - Google Patents
Collaborative design method of W FMCW SAR and small UAV integrated system Download PDFInfo
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- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
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- G01S13/90—Radar or analogous systems specially adapted for specific applications for mapping or imaging using synthetic aperture techniques, e.g. synthetic aperture radar [SAR] techniques
- G01S13/9021—SAR image post-processing techniques
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- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
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- G01S13/88—Radar or analogous systems specially adapted for specific applications
- G01S13/89—Radar or analogous systems specially adapted for specific applications for mapping or imaging
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Abstract
The invention discloses a collaborative design method of a W FMCW SAR and small UAV integrated system, which comprises the following steps: the integrated structural layout design of the small UAV and the SAR load is carried out, the high integration lightweight design is carried out on a frequency synthesizer in the SAR load, the miniaturization lightweight design is carried out on the W-band radio frequency front end in the SAR load, and the lightweight design is carried out on a digital imaging processing single machine in the SAR load. The SAR load is subjected to integrated structural layout design, so that the application requirements of a small UAV platform are met; by carrying out high-integration lightweight design on the SAR load medium-frequency synthesizer, the W-band radio frequency front end and the digital imaging processing single machine, the load size can be obviously reduced, and the overall weight can be reduced. The method is suitable for application requirements of adopting a small UAV platform.
Description
Technical Field
The invention relates to a collaborative design method of a W FMCW SAR and small UAV integrated system, and belongs to the technical field of SAR radars.
Background
The small UAV-SAR is a Synthetic Aperture Radar (SAR) system installed on a small UAV (UAV), has high image resolution, can work all day long, and can effectively identify camouflage and penetration masks; the unmanned aerial vehicle has the advantages of being flexible in deployment, strong in mobility and simple in operation, and can be applied to rescue and relief work, scientific research on landform and anti-terrorism reconnaissance.
In combination with the research conditions at home and abroad, many SAR systems designed based on UAV platforms currently exist, and the systems reach the expected research target and achieve many technical achievements. However, these systems are either bulky, high in power consumption, heavy in weight, or have yet to be further improved in terms of imaging quality. In addition, in the aspect of small UAV-SAR applications, the carrying capacity of the small UAV is effective, the payload is only about several kilograms, and strict requirements are put on the weight, the volume and the power consumption of the SAR load. Secondly, with the rapid development of millimeter wave imaging technology, the requirement on the resolution of scene images in application is higher and higher, and by integrating the research and application development conditions of UAV-SAR at home and abroad, the application in the aspect still stays in the Ka frequency band and other low-frequency bands at present, and the performance index is difficult to further optimize and improve.
In order to meet the application requirements of the small UAV, a novel small UAV-SAR system with small volume, light weight, low power consumption and high imaging resolution needs to be developed.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the method overcomes the defects of the prior art, provides a collaborative design method of the integrated system of the W FMCW SAR and the small UAV, improves and optimizes the indexes of the traditional UAV-SAR system such as volume, weight, power consumption and imaging quality, and further improves the imaging resolution of the system.
The technical solution of the invention is as follows:
a collaborative design method of a W FMCW SAR and small UAV integrated system comprises the following steps:
(1) carrying out integrated structural layout design on the UAV and SAR loads;
(2) highly integrated lightweight design is carried out on a frequency synthesizer in the SAR load;
(3) carrying out miniaturization and lightweight design on the W-band radio frequency front end in the SAR load;
(4) and carrying out lightweight design on a digital imaging processing single machine in the SAR load.
The layout design of the integrated structure in the step (1) comprises the following contents:
selecting a W FMCW SAR load as the SAR load;
the SAR load is mounted under the UAV platform through a stable platform, the stable platform and the SAR load adopt an integrated layout design, the normal direction of an SAR load antenna and the horizontal plane form a certain included angle for installation, and the landing gear is ensured not to have interference influence on the SAR load antenna;
carrying out adaptive iterative design on the size of the SAR load according to the requirement of the UAV on the SAR load outer envelope, so that the UAV can contain the SAR load and the structure of the UAV does not interfere with SAR load observation;
planning and arranging the positions of the single units of the SAR load in the stable platform, arranging in design software according to the weight of each single unit module of the SAR load, calculating the gravity center in a simulation mode, and adjusting the size of the SAR load shafting according to the position of the gravity center to enable the gravity center of the SAR load to be overlapped with the intersection point of the azimuth axis and the pitch axis of the SAR load.
In the step (2), the frequency synthesizer is designed to be highly integrated and lightweight in the following manner:
the frequency synthesizer comprises a DDS circuit module, a comb spectrum generator module, a phase-locked source module, an internal local oscillator circuit, an up-conversion circuit, a power supply and a control circuit;
the DDS circuit module, the dressing table generator module and the phase-locked source module adopt a small module integrated design and are shielded in space; the area of the small module is not more than 60mm 2 ；
The up-conversion circuit adopts a microwave multifunctional chip to realize two-stage frequency conversion, so that the integration level is improved;
the control circuit adopts a plurality of bare chips for integrated packaging;
the weight of shielding shells of the DDS circuit module, the dressing table generator module and the phase-locked source module is reduced;
and the arrangement area of the circuit is reduced by optimizing the arrangement layout of other auxiliary circuits.
The implementation mode of the W-band radio frequency front end miniaturization and lightweight design in the step (3) is as follows:
the W-band radio frequency front end comprises: the device comprises a transmitting channel, a receiving channel and a power supply module; the transmitting channel converts the X-band microwave signal input by the frequency synthesizer to a W-band and radiates the W-band signal out through an antenna; the receiving channel has the opposite function, and the W-band signals received by the antenna are subjected to frequency mixing processing by the receiving channel and then are changed into I/Q two paths of intermediate frequency signals; the transmitting channel comprises an octave multiplier, a filter, a driving amplifier and an active power amplifier transmitting module; the receiving channel comprises a filter, a coupler, a mixer and a receiving module;
replacing active filters in a transmitting channel and a receiving channel with light passive filters manufactured based on an LTCC multilayer process;
the integration of the active power amplifier transmitting module in the transmitting channel is realized by adopting a hybrid integration mode;
the feed interfaces of the transmitting channel, the receiving channel and the antenna are realized by adopting an integrated design method.
The method for manufacturing the lightweight passive filter based on the LTCC multilayer process comprises the following steps:
designing a plurality of metal columns in an LTCC substrate, wherein the metal columns and metals on the upper surface and the lower surface of the LTCC substrate jointly form an SIW coupling resonant cavity;
2 horizontal slotted holes are formed in the center of the upper surface of the LTCC substrate, and no local via hole is formed around each slotted hole, so that cascade coupling and cross coupling of an internal SIW resonant cavity are realized;
realizing a passive filter through electromagnetic coupling inside the cascade SIW resonant cavity;
and a microstrip line is respectively led out from the left side and the right side of the SIW resonant cavity, and 1 horizontal slot is respectively arranged in the SIW resonant cavity close to the left microstrip line and the right microstrip line to realize the input and the output of the passive filter.
The implementation method for realizing the integration of the transmitting module of the active power amplifier in the transmitting channel by adopting a hybrid integration mode is as follows:
bonding an input/output end of a W-band compound MMIC chip adopted by an active power amplifier transmitting module into the MEMS microcavity through a microstrip probe;
manufacturing a SIW coupling resonant cavity based on an LTCC multilayer process;
the microstrip probe is used as the input and output of the active power amplifier transmitting module and is coupled to the SIW coupling resonant cavity through the cavity in the MEMS microcavity.
The implementation mode of carrying out lightweight design on the digital imaging processing single machine in the SAR load in the step (4) is as follows:
the digital imaging processing unit in the SAR load is realized by adopting two FPGA chips, wherein in the two FPGA chips, the first FPGA chip is used as a main control chip to realize the functions of monitoring, timing, digital receiving and processing and data storage, and the second FPGA chip realizes real-time imaging processing.
A monitoring timing function unit, a digital receiving and processing unit and a data storage function unit are designed on the first FPGA chip;
the monitoring timing function unit is used for receiving the remote control command and the configuration data injected by the ground control terminal and completing the unpacking, forwarding and executing operation of the remote control command; controlling the power on/off of the power supply of the electronic equipment on the UAV platform according to the received remote control instruction, and controlling the on/off of other single machines of the SAR load; the system is communicated with a frequency synthesizer, a SAR load controller and a W-band radio frequency front end, receives telemetering information sent by each part and sends the telemetering information as auxiliary data to a data receiving and processing unit, a data storage function unit and a real-time imaging processing unit; setting a working mode of the SAR load according to the operation task requirement; controlling the working time sequence of the system, generating a periodic waveform control signal, outputting the periodic waveform control signal to a frequency synthesizer, and generating an echo data acquisition signal;
a digital reception processing unit: receiving two paths of I/Q analog signals input by a frequency synthesizer analog receiver, and completing acquisition and AD conversion of analog echo signals; receiving auxiliary data of the monitoring timing function unit, framing the auxiliary data with the analog echo signal after AD conversion, and sending the auxiliary data and the analog echo signal to the data storage function unit to finish storage; preprocessing the analog echo signal after AD conversion, caching the data obtained by preprocessing, and sending the data to a real-time imaging processing functional unit;
a data storage function unit: the device is provided with an independent original echo data storage area and can store analog echo signals after AD conversion and auxiliary data of a monitoring timing function unit; the imaging data storage area is provided with an independent real-time imaging processing data storage area and stores the imaging data sent by the real-time imaging processing unit; the mapping management and storage space management functions from the logical address to the physical address are provided; has the functions of reading, writing and erasing.
A real-time imaging processing unit is designed on the second FPGA chip, receives the auxiliary data of the monitoring timing function unit and the preprocessing data of the digital receiving processing unit, and analyzes and caches the auxiliary data and the preprocessing data; and processing the preprocessed data by adopting a real-time imaging algorithm to obtain real-time imaging data, and sending the real-time imaging data to the data storage function unit to finish storage.
The steps of the real-time imaging algorithm are as follows:
1) carrying out azimuth filtering and extraction on input data to obtain preprocessed data;
2) performing inertial navigation first-order error compensation on the preprocessed data;
3) performing azimuth blocking processing on the compensated data to obtain a plurality of pieces of data;
4) sequentially performing Doppler center estimation, direction FFT (fast Fourier transform), FS (frequency shift correction) and direction IFFT (inverse fast Fourier transform) processing, distance block processing, MD (machine direction) estimation frequency modulation, calculation frequency modulation difference and calculation acceleration processing on one piece of data obtained after the direction block processing in the step 3);
5) processing the data of the blocks obtained in the step 3) in the step 4) in sequence;
6) performing azimuth data synthesis processing, and synthesizing the data subjected to the block processing in the step 3) into a block of data;
7) and sequentially carrying out inertial navigation second-order error compensation, phase compensation, azimuth matching filtering and azimuth PGA self-focusing processing on the synthesized data to complete real-time imaging and obtain a final imaging image.
Compared with the prior art, the invention has the following technical effects:
(1) the invention combines the characteristics of a small UAV and adopts the integrated collaborative design of the SAR load interface and the small UAV interface. The SAR load design integration technology is adopted, the module functions are combined, and the integration of units such as an antenna, a frequency synthesizer, a radio frequency front end, signal processing and the like and a stable platform is realized through the structure integration technology. The frequency synthesizer adopts high integration and lightweight design and is integrated into a single machine. And the radio frequency front end is optimized by adopting miniaturization and lightweight design, so that the size and the weight of the equipment are reduced. A plurality of functional units such as acquisition, control, storage, real-time processing and the like are integrated into a single machine, so that high integration and light weight design of the imaging processing single machine are realized. Through the thought and the technical method, the number of single machine modules is greatly reduced, the length of an interconnection path between single machines is shortened, the size and the weight of a radar system are reduced, the power consumption is reduced, and the imaging quality is further improved through a more accurate real-time imaging algorithm.
(2) The wavelength of the W wave band is short, and the backscattering of the target and the corner effect of the target are superior to those of the low frequency band; the method adopts the W frequency band to obtain the SAR image quality optical, is easy to interpret and can obtain a high-quality image; the SAR adopting the W frequency band is easy to realize high frequency modulation bandwidth, thereby obtaining extremely high range resolution.
(3) The W-band antenna has smaller size under the same beam width requirement, and high azimuth resolution can be achieved by adopting smaller antenna size. In addition, W-band radio frequency front-end components, such as a power amplifier, a mixer, a low-noise amplifier, an amplifier and the like, have smaller volume than other low-frequency bands, and the volume of the whole system is reduced.
(4) The system adopts an FMCW system, the FMCW system continuously transmits signals in a frequency modulation repetition interval, the signal duration is long, and the duty ratio is high. The characteristic of the emission signal determines that the system does not need higher emission peak power, the required power amplifier devices are greatly reduced, the size and the weight of equipment are reduced, the cost is reduced, the development period of the system is shortened, and the miniaturization of the system is realized.
On the other hand, when receiving signals by adopting the FMCW system, echo signals are directly beat-mixed with transmitting signals. After beat processing, the bandwidth of the echo signal is greatly reduced from GHz level to below hundred MHz. Therefore, the requirement on the AD sampling circuit is greatly reduced, and the power consumption and the cost of the system are effectively reduced.
Drawings
FIG. 1 is a block diagram of a SAR loading system;
FIG. 2 is a schematic diagram of a SAR load integration structure layout suitable for a small UAV platform;
FIG. 3 is a schematic block diagram of a frequency synthesizer composition and implementation;
FIG. 4 is a schematic block diagram showing the composition and implementation of a W-band RF front-end module;
FIG. 5 is a functional block diagram of a digital imaging processing unit;
FIG. 6 is a block diagram of a digital imaging processing unit function implementation based on FPGA;
FIG. 7 is a block diagram of a digital imaging processing unit monitoring timing unit function implementation;
FIG. 8 is a block diagram of a digital receiving and processing unit in a digital imaging processing unit;
fig. 9 is a flowchart of a real-time imaging processing algorithm implemented based on an FPGA.
Detailed Description
The invention is described in further detail below with reference to the following figures and specific examples:
the invention provides a collaborative design method of a small UAV-SAR integrated system, which adopts a W wave band, a linear Frequency Modulation Continuous Wave (FMCW) system and a small UAV design and SAR load integrated design, and the obtained small UAV-SAR system improves and optimizes indexes of the traditional UAV-SAR system such as volume, weight, power consumption, imaging quality and the like.
Example (b):
step 1: integrated structural layout design for small UAV and SAR loads
Fig. 1 is a composition of SAR loads, and fig. 2 illustrates an integrated design structure layout of W FMCW SAR loads; the adaptive layout of the small UAV platform and the SAR load is mainly developed, and relates to the layout of the positions of each single unit inside the SAR load.
The SAR load system applied to the small UAV platform has some basic parameter requirements, in this embodiment: the flight speed is 10m/s, the flight altitude is 150m, the SAR load weight is 10kg, the design of the small UAV platform and SAR load interface and structure is developed according to basic parameters, and the size and the installation mode of each single-machine module of the SAR load are reasonably distributed. Generally, the vertical distance between the belly of a small UAV platform and the ground is less than half a meter, SAR loads are mounted on the lower portion of the belly through a stable platform, a certain safety distance is reserved between the SAR loads and the ground, and the enveloping size of the SAR loads in the vertical direction is limited. In addition, the small spacing between the small UAV landing gear will also limit the envelope size of the SAR load in the horizontal direction.
Firstly, developing an SAR system interface and structural design according to the basic parameters of a selected UAV platform, and reasonably distributing the size and the installation mode of each single-machine module. And carrying out adaptive iterative design on the size of the SAR load according to the requirement of the small UAV platform on the SAR load outer envelope, so that the small UAV platform can accommodate the SAR load and the structure of the small UAV platform does not interfere with SAR load observation.
The SAR load is installed on the small UAV through the stabilizing platform, the stabilizing platform and the SAR load system adopt an integrated layout meter, and the positions of the single machines of the SAR load are planned and arranged in the stabilizing platform. According to the weight of each single-machine module of the SAR load, the layout is carried out in design software, the gravity center is calculated in a simulation mode, the size of the SAR load shafting is adjusted according to the position of the gravity center, the coincidence of the SAR load gravity center and the intersection point of the SAR load azimuth axis and the elevation axis is sought, and therefore the integrated layout design of the platform frame and the SAR load is achieved.
In the SAR load layout design shown in fig. 2, the rf transceiver module is installed vertically, and other units are installed horizontally, and the overall envelope dimension is 350 × 250 × 140mm (length, width, and height), wherein a stable platform is required to provide an installation space of 350 × 250 mm. The SAR load and the stable platform are integrated under the UAV platform, the normal direction of the antenna and the horizontal plane form a certain included angle for installation, and the landing gear is ensured not to influence the UAV platform in interference.
Step 2: highly integrated lightweight design for frequency synthesizer in SAR load
The frequency synthesizer generates a broadband intermediate frequency signal required by radar transmission, outputs a continuous wave linear frequency modulation signal required by a later stage through up-conversion, filtering, amplification and frequency multiplication, and provides a full-coherent reference clock, a sampling clock and a radio frequency local oscillator signal required by the whole system;
as shown in fig. 3, the frequency synthesizer module is designed according to the principle of realization and the size of 140 × 136 × 22mm (length, width, and height), and the integrated layout and structure design of components are performed according to the circuit planning of the functional unit from the aspects of space distribution, electromagnetic compatibility, heat dissipation, and the like. Microwave circuit parts such as the DDS circuit module, the dressing table generator module and the like adopt small module integrated design and are shielded in space.
The key point of the lightweight design of the frequency synthesis module is to reduce the weight of circuit shielding shells such as the DDS circuit module, the dressing spectrum generator module, the phase-locked power supply module and the like, and reduce the area of the module so as to effectively reduce the weight of the module. The DDS circuit module, the dressing table generator module and the phase-locked source module are designed by microwave multilayer boards, the circuit size area is effectively reduced by 20% compared with the design of a common single layer or two-layer board, the up-conversion module is designed by adopting a microwave multifunctional chip, the circuit integration level is improved, the size of a used thin film microstrip filter is reduced, the control circuit is integrally packaged by adopting a plurality of bare chips, and the circuit arrangement area is reduced by optimizing the layout of other auxiliary circuits. Through structural simulation analysis, under the condition of ensuring the structural strength, the redundant entity part of the shielding shell is removed, the thickness of the shielding shell is reduced to 1.5 millimeters, and the weight of the module is reduced to the maximum extent.
And step 3: w-band radio frequency front end in SAR load is miniaturized lightweight design
Fig. 4 shows the composition and implementation principle of a W-band rf front-end module, where the W-band rf front-end module consists of three parts, i.e., a transmitting channel, a receiving channel, and a power module. The transmitting channel converts the X-band microwave signal input by the frequency synthesizer to a W-band and radiates the W-band signal out through an antenna; the receiving channel has the opposite function, and the W-band signals received by the antenna are subjected to frequency mixing processing by the receiving channel and then are changed into I/Q two paths of intermediate frequency signals;
the technical measures for realizing the W-band radio frequency front end miniaturization lightweight design are as follows: the active filter module in the transceiving channel adopts a passive filter device with small volume and light weight, the power amplifier transmitting module in the transmitting channel is integrated by adopting a hybrid integration mode, and the interface of the transceiving channel and the antenna is realized by adopting an integrated design method.
The invention replaces the active filter involved in the W-band radio frequency front end receiving and transmitting channel with a lightweight passive device manufactured by adopting a low temperature co-fired ceramic (LTCC) multilayer process. The passive filter is composed of a cavity cross-coupled resonant cavity of an SIW (SIW: microstrip substrate integrated waveguide). In order to realize the passive band-pass filter embedded in the LTCC substrate, firstly, metal columns are designed in the LTCC substrate, and the arranged metal columns and metal on the upper surface and the lower surface of the LTCC substrate form a SIW resonant cavity together. Secondly, 2 straight transverse notches are formed in the middle of the upper surface of the LTCC substrate, the cascading coupling and the cross coupling of 4 SIW resonant cavities inside are realized in a mode of canceling local via holes around the notches, and finally the passive filter is realized through the electromagnetic coupling inside the cascading SIW resonant cavities. The input and output of the filter are realized by respectively leading out a microstrip line from the left side and the right side of the SIW resonant cavity and respectively opening 1 horizontal slot near the left microstrip line and the right microstrip line in the SIW resonant cavity.
The integration of an active power amplifier transmitting module in a W-band radio frequency transmitting channel adopts a hybrid integration method, an active circuit needs interstage isolation to work stably and reliably, and therefore an MEMS micro-cavity needs to be combined for packaging, firstly, an input/output end of a W-band compound MMIC chip is bonded to the MEMS micro-cavity through a micro-strip probe, then the MEMS micro-cavity is manufactured into an SIW coupling resonant cavity through an LTCC substrate, the micro-strip probe is used as the input/output of an active power amplifier and is directly coupled to the SIW coupling resonant cavity through the micro-strip probe in the MEMS micro-cavity, and the efficient integration of the active power module in the W-band transmitting channel component is realized. By using the design concept of SIW resonant cavities adopted in the design of a passive filter for reference, the LTCC integration of a passive circuit and an active circuit is realized through the cascade connection and the cross coupling of a plurality of SIW resonant cavities and the coupling interconnection of a plurality of cavities SIW.
In addition, the power amplifier transmitting module of the W-band radio frequency front-end transmitting channel and the receiving module of the receiving channel adopt an integrated collaborative design with an antenna feed interface. The W-band transceiver module is placed on the back of the antenna, the radio-frequency front-end transceiver channel is coupled with the antenna feed port, the design concept of the SIW resonant cavity adopted in the design of the passive filter is used for reference, and the conversion transition of the broadband radio-frequency front-end transceiver channel and the antenna feed port is realized through the cascade connection and the cross coupling of the plurality of SIW resonant cavities. The adoption of the broadband conversion transition method is beneficial to reducing the influence of processing errors on the standing waves of the antenna feed port; and the realization mode of the traditional waveguide port is avoided, and the miniaturization and lightweight design of the assembly is more favorably realized.
And 4, step 4: lightweight design of digital imaging processing single machine in SAR load
Generally, the SAR load system has basic functions of timing control, remote control and telemetry, data acquisition, storage, imaging signal processing and the like. The method adopts a systematic design idea, divides each component of the system, combines similar function circuits, and designs a digital imaging processing single machine integrating multiple functions as a core processing platform of the SAR load according to the basic function requirements of the SAR load as shown in figure 5. The system will fulfill the functional requirements on a single board with dimensions not exceeding 180mm (length) x160mm (width) and a weight not exceeding 0.5 kg.
The core processing platform is divided into the following parts according to the system design: the system comprises a monitoring timing function unit, a digital receiving and processing unit, a data storage function unit and a real-time imaging processing unit.
A monitoring timing function unit:
1) the remote control system is communicated with the ground control terminal, receives the remote control instruction and the configuration data injected by the ground control terminal, and completes the remote control unpacking, forwarding and executing operation of the instruction.
2) And controlling the power on/off of the power supply of the electronic equipment on the UAV platform according to the received remote control instruction, and controlling the power supply of the secondary power supply unit to control the on/off of other single machines of the SAR load.
3) And the system is communicated with a frequency synthesizer, an SAR load platform controller and a W-band radio frequency front end, receives telemetering information sent by each part and sends the telemetering information as auxiliary data to a data receiving and processing unit, a data storage function unit and a real-time imaging processing unit.
4) And setting the working mode of the SAR load according to the operation task requirement.
5) And controlling the working time sequence of the system, generating a periodic waveform control signal to the frequency synthesizer, and generating an echo data acquisition signal.
A digital reception processing unit:
1) and receiving the I/Q two paths of analog signals input by the frequency synthesizer analog receiver to complete acquisition and AD conversion of the analog echo signals.
2) And receiving auxiliary data of the monitoring timing function unit, framing the auxiliary data with the analog echo signal after AD conversion, and sending the auxiliary data and the analog echo signal to the data storage function unit to finish storage.
3) The analog echo signal after AD conversion is preprocessed (decimated, filtered).
4) And caching the preprocessed data and sending the preprocessed data to the real-time imaging processing functional unit.
A data storage function unit:
1) the method has high-speed and large-capacity write bandwidth, and meets the requirement of large-bandwidth storage.
2) The device is provided with an independent original echo data storage area and can store the acquired analog echo signals and auxiliary data after AD conversion; the system is provided with an independent real-time imaging processing data storage area for storing data after real-time imaging processing.
3) The method is provided with mapping management from the logical address to the physical address and storage space management.
4) Has the functions of reading, writing and erasing.
The real-time imaging processing unit:
1) and receiving auxiliary data and preprocessing data, analyzing and caching.
2) And performing inertial navigation first-order error compensation and inertial navigation second-order error compensation on the preprocessed data.
3) And performing Doppler center estimation, FS migration correction, MD estimation frequency modulation, calculation of a frequency modulation difference value and calculation of acceleration.
4) And generating a phase correction function and performing phase compensation.
5) And performing azimuth matched filtering and azimuth PGA self-focusing.
6) And sending the data after the real-time imaging processing to a storage function unit to finish storage.
In the method for implementing the high-integration digital imaging processing single machine, a high-performance FPGA chip is selected as a core processing platform, and by means of the special high-speed, logic programmability and abundant in-chip digital signal processing resources and IO interfaces of the FPGA, the complexity of an external circuit can be reduced to the maximum extent, the number of the external chips is simplified, the integration capability of the whole circuit is improved, and the area and the power consumption of the PCB are further reduced.
In the implementation of the specific embodiment, two high-performance FPGA chips are adopted. As shown in fig. 6, one of the FPGAs serves as a main control chip, and mainly implements functions of a monitoring timing unit, a digital receiving and processing unit, a data storage function unit, and the like.
(1) Monitoring timing unit function design
As shown in fig. 7, the monitoring timing unit is designed based on FPGA, and is composed of 9 sub-functional circuits, which are respectively a power conversion circuit, an FPGA circuit, a mode/calibration control circuit, a communication circuit with a ground terminal, a communication circuit with a frequency synthesizer, a communication circuit with a pan/tilt head, a working clock receiving circuit, a frequency sweeping signal circuit, and other single-machine power-up control circuits.
The monitoring timing function unit is responsible for generating a working time sequence and a control time sequence of the SAR system to meet the working requirement of the system. The general time sequence generating function is realized by hardware or software programming, and relates to the functional operations of condition judgment, comparison, timing and the like. The circuit design mode based on the FPGA can accurately realize the control of the working time sequence of the SAR load system, generate or control the coherent working time sequence signals of each single machine, is superior to other realization modes, and can optimize and simplify the hardware realization.
The FPGA chip internally realizes a needed communication function circuit, receives the remote control instruction and the configuration data injected by the FPGA chip, completes instruction unpacking, forwarding and executing actions, controls the power supply and power off of the electronic equipment on the UAV platform according to the data instruction, and controls the on-off of other single units by controlling the power supply single unit. The FPGA chip is adopted to simplify the communication circuit, the flexible IO programming characteristic of the FPGA is utilized, the complexity of the design of the peripheral hardware circuit is reduced, and the number of peripheral chips is reduced.
1) A power conversion circuit: the 12V power supply input by the secondary power supply module is received and converted into the voltages of each grade required by the digital single machine, wherein the voltages are +3.3V, +1.8V, +1.5V, +1.2V, +1.0V, +0.75V respectively.
2) An FPGA circuit: and the core processing chip is used for finishing a monitoring timing function unit, a digital receiving processing unit and a data storage function unit.
3) Mode/scaling control circuit: and after the FPGA executes the working mode command, the circuit is driven to execute mode/calibration control and output to the radio frequency front-end module for execution.
4) Ground terminal communication circuit: and receiving a control command and configuration data sent by the ground terminal communication, and sending telemetering state data to the ground terminal communication.
5) Frequency synthesis communication circuit: and sending configuration data and a control command to the frequency synthesizer, and receiving the telemetering state data sent by the frequency synthesizer.
6) Cloud platform communication circuit: and sending configuration data and a control command to the holder, designating the initial working angle of the holder, and receiving the telemetering state data sent by the holder.
7) The operation clock receiving circuit: the synchronous clock signal is generated by a frequency synthesizer and is responsible for providing synchronous clock signals required by the work for a processing and control unit, a storage unit and an acquisition unit.
8) The frequency sweep signal circuit: and (3) generating a required radar frequency sweeping signal after the frequency synthesizer receives a periodic control signal sent to the frequency synthesizer.
9) The single machine power-on control circuit: and the power supply control module is responsible for controlling the power on and off of the frequency synthesizer controlled by the power supply and the radio frequency front-end equipment.
(2) Data receiving processing unit design
As shown in fig. 8, the digital receiving and processing unit based on the FPGA is composed of two sub-functional circuits, which are an FPGA processing circuit and an echo signal ADC acquisition circuit.
1) An FPGA circuit: receiving echo signals output by an echo signal ADC acquisition circuit, realizing preprocessing functions such as extraction, filtering and the like of the echo signals through logic functions in the FPGA circuit, and packaging the preprocessing data for storage; configuring ADC chip function through SPI interface; correctly acquiring ADC data through an LVDS interface; and framing and packaging the acquired data and preparing for storage.
2) Echo signal ADC acquisition circuit: the acquisition unit mainly comprises a single-chip ADC converter and is provided with two analog input channels, and each echo analog signal is transmitted into the ADC after passing through a single-end to differential circuit; and outputting the signals to the FPGA through the serial LVDS interface.
(3) Data storage functional unit design
The hardware circuit of the data storage functional unit mainly comprises an original data storage circuit, an imaging processing data storage circuit and a bad block information storage circuit.
1) Raw data storage circuit: and storing the original echo data which is not subjected to signal processing and sampled by the echo signal ADC acquisition circuit.
The original data storage circuit adopts a high-speed NandFlash chip, the storage capacity of a single Flash is 256Gbits, and the data width is 8 bits. The original data storage area is composed of 16 NandFlash chips, because of the limitation of available pins of the FPGA, the two NandFlash chips are connected in parallel according to one group, and the IO pins of the two NandFlash chips in each group are connected to the FPGA immediately except the CE and RB pins, and the NandFlash chips are controlled and operated by the FPGA.
2) An imaging processing data storage circuit: and storing the imaging result data processed by the real-time imaging processing unit.
The imaging processing data storage circuit is composed of 4 NandFlash chips, because of the limitation of available pins of the FPGA, the two NandFlash chips are connected in parallel according to a group of two chips, 2 groups are formed in total, except CE and RB pins, IO pins of the two NandFlash chips in each group are connected in parallel and are connected to the FPGA immediately, and the NandFlash chips are controlled and operated by the FPGA.
3) Bad block information storage circuit: when a storage array formed by the Nandflash chip has a bad block, the identification information marked as the bad block is stored in the storage array, so that the bad block information is accessed to shield the bad block when the storage array is accessed. In the design, a bad block mark is stored in a nonvolatile memory FRAM, and the maintenance work such as management of the bad block, address decoding mapping and the like is realized through an FPGA.
(4) Real-time imaging processing unit design
As shown in fig. 9, a real-time imaging processing algorithm flow is shown, a piece of FPGA is used to implement a real-time imaging processing algorithm task, a functional circuit required by an imaging algorithm is designed by selecting a high-performance FPGA chip, and a single FPGA chip is used to reduce the design complexity, so that the volume and power consumption of the device are reduced. According to the idea of modular design, the algorithm of fig. 9 can be divided into: compensation processing, azimuth block processing operation, distance block processing operation and imaging processing operation.
In each processing module flow, the intermediate processing data needs to be cached for a plurality of times, so that an external cache is needed. In the scheme, 2 DDR3 chips are connected in parallel to form a 2GB cache, and 5 groups of caches, namely 2GBx5 caches, are selected to provide data cache for the real-time imaging processing unit.
1) Compensation process
Corresponding point envelope shifting and phase point complex multiplication are carried out on each position sampling point corresponding to 8192 points and a reference function, and envelope compensation and phase compensation of the inertial navigation information on the preprocessed data are completed;
2) orientation blocking process operation
Firstly, after the data processed by the first part is transposed, dividing the data into 15 blocks according to the azimuth direction, dividing the azimuth direction 8192 points into 1024 points, namely dividing the blocks into one block, stepping 512 points each time, and determining the initial address of the data to be processed according to 512 points in the transposed cache in an operation step. Each block is 8192x1024 points (complex points); the data needs to be cached into an external DDR3 storage space, and the external storage capacity 8192x1024x15x16x2/8 is required to be 480MB in 15 block data.
Secondly, according to the complex multiplication requirement of the previous step, Doppler center estimated values need to be obtained for each block, and then complex multiplication compensation is carried out on the Doppler center estimated values corresponding to the block.
And carrying out 1024-point FFT operation on each block according to the azimuth direction, and then carrying out complex multiplication on each point with a frequency inverse standard function, a quadratic distance pulse pressure function and a migration correction function according to the algorithm requirement.
8192-point FFT operation is carried out on each block of stored data according to the distance direction, 1024-point IFFT operation is carried out according to the direction, and then the stored data are stored into another 480MB storage space; meanwhile, the 15 processed data blocks need to be spliced into a complex matrix of 8192x8192 again to prepare for subsequent algorithm processing, and the spliced data is stored into a 256MB external cache.
Fifthly, repeating the steps from the first step to the fourth step to finish the treatment of each block.
The step of block processing operation adopts serial processing of each block to reduce resource consumption.
This step of operation requires FPGA resources as shown in table 1, in accordance with the description above.
TABLE 1 Azimuth blocked FPGA resource estimation
3) Distance chunking operations
The method comprises the steps of firstly, obtaining 1024x8192 complex point data after azimuth partitioning processing from an external cache, partitioning the data into 8 blocks according to the distance direction, and reading 1024x1024 complex point data of each block.
Searching the line where each block of 50 strong points are located: according to the algorithm requirement, each point of each row (distance direction) is subjected to modulus taking and summation, the total modulus values of each row are compared, and 50 rows are selected according to the comparison result.
And thirdly, selecting each row of the 50 rows to be subjected to complex multiplication with the azimuth matched filter vector to form a 50x 1024-point complex matrix.
And 50 middle-strong point treatment.
Calculating a value according to a formula.
Sixthly, repeating the above steps to obtain 8 calculated values.
An accelerated value is obtained by 8 values.
Repeating the steps to obtain the accelerated values of 15 large blocks.
The step of block processing operation adopts serial processing of each block to reduce resource consumption.
This step of operation requires FPGA resources as shown in table 2, in accordance with the description above.
TABLE 2 distance blocked FPGA resource estimation
4) Imaging processing operations
The aperture data of 8192x8192 points needs to be multiplied by corresponding points of a reference function to complete second-order phase compensation of distance space variation, and an 8192x8192 point compensation function needs to be calculated.
The compensation function is calculated as follows:
according to the above formula, five multiplications and three subtractions are required to obtain one compensation value. Each compensation value obtained is complex multiplied with the corresponding aperture data point.
And each point is sequentially multiplied by a corresponding point formed by 15 accelerated interpolations calculated in the previous step.
And the pulse pressure in the direction.
And fourthly, performing IFFT at 8192 points in the azimuth direction and storing the IFFT.
This step of operation requires FPGA resources as shown in table 3, in accordance with the description above.
TABLE 3 FPGA resource estimation for imaging processing
The invention combines the characteristics of a small UAV and adopts the integrated collaborative design of the SAR load interface and the small UAV interface. The SAR load design integration technology is adopted, the module functions are combined, and the integration of units such as an antenna, a frequency synthesizer, a radio frequency front end, signal processing and the like and a stable platform is realized through the structure integration technology. The frequency synthesizer adopts high integration and light weight design and is integrated into a single machine. The radio frequency front end is optimized by adopting miniaturization and lightweight design, and the size and the weight of equipment are reduced. A plurality of functional units such as acquisition, control, storage, real-time processing and the like are integrated into a single machine, so that high integration and light weight design of the imaging processing single machine are realized. Through the thought and the technical method, the number of the single machine modules is greatly reduced, the length of the interconnection path between the single machines is shortened, the size and the weight of the radar system are reduced, the power consumption is reduced, and the imaging quality is further improved through a more accurate real-time imaging algorithm.
The invention has not been described in detail in part of the common general knowledge of those skilled in the art.
Claims (6)
1. A collaborative design method of a W FMCW SAR and small UAV integrated system is characterized by comprising the following steps:
(1) carrying out integrated structural layout design on the UAV and SAR loads;
the integrated structure layout design comprises the following contents:
selecting W FMCW SAR load as SAR load;
the SAR load is mounted under the UAV platform through a stable platform, the stable platform and the SAR load adopt an integrated layout design, the normal direction of an SAR load antenna and the horizontal plane form a certain included angle for installation, and the landing gear is ensured not to have interference influence on the SAR load antenna;
carrying out adaptive iterative design on the size of the SAR load according to the requirement of the UAV on the SAR load outer envelope, so that the UAV can contain the SAR load and the structure of the UAV does not interfere with SAR load observation;
planning and arranging the positions of the single units of the SAR load in the stable platform, arranging in design software according to the weight of each single unit module of the SAR load, calculating the gravity center in a simulation mode, and adjusting the size of an SAR load shafting according to the position of the gravity center to enable the gravity center of the SAR load to be overlapped with the intersection point of the azimuth axis and the pitch axis of the SAR load;
(2) highly integrated lightweight design is carried out on a frequency synthesizer in the SAR load;
the implementation mode is as follows:
the frequency synthesizer comprises a DDS circuit module, a comb spectrum generator module, a phase-locked source module, an internal local oscillator circuit, an up-conversion circuit, a power supply and a control circuit;
the DDS circuit module, the dressing table generator module and the phase-locked source module adopt a small module integrated design,are spatially shielded from each other; the area of the small module is not more than 60mm 2 ；
The up-conversion circuit adopts a microwave multifunctional chip to realize two-stage frequency conversion, so that the integration level is improved;
the control circuit adopts a plurality of bare chips for integrated packaging;
the weight of shielding shells of the DDS circuit module, the dressing table generator module and the phase-locked source module is reduced;
the arrangement area of the circuit is reduced by optimizing the arrangement layout of other auxiliary circuits;
(3) carrying out miniaturization and lightweight design on the W-band radio frequency front end in the SAR load;
the implementation mode is as follows:
the W-band radio frequency front end is divided into a transmitting channel, a receiving channel and a power supply module; the transmitting channel converts the X-band microwave signal input by the frequency synthesizer to a W-band and radiates the W-band signal out through an antenna; the receiving channel has the opposite function, and the W-band signals received by the antenna are subjected to frequency mixing processing by the receiving channel and then are changed into I/Q two paths of intermediate frequency signals; the transmitting channel comprises an octave multiplier, a filter, a driving amplifier and an active power amplifier transmitting module; the receiving channel comprises a filter, a coupler, a mixer and a receiving module;
replacing active filters in a transmitting channel and a receiving channel with light passive filters manufactured based on an LTCC multilayer process;
the integration of the active power amplifier transmitting module in the transmitting channel is realized by adopting a hybrid integration mode;
the feed interfaces of the transmitting channel, the receiving channel and the antenna are realized by adopting an integrated design method;
(4) carrying out lightweight design on a digital imaging processing single machine in SAR load;
the implementation mode is as follows:
the digital imaging processing unit in the SAR load is realized by adopting two FPGA chips, wherein in the two FPGA chips, the first FPGA chip is used as a main control chip to realize the functions of monitoring, timing, digital receiving and processing and data storage, and the second FPGA chip realizes real-time imaging processing.
2. The collaborative design method of the W FMCW SAR and small UAV integrated system according to claim 1, wherein: the method for manufacturing the lightweight passive filter based on the LTCC multilayer process comprises the following steps:
designing a plurality of metal columns in an LTCC substrate, wherein the metal columns and metals on the upper surface and the lower surface of the LTCC substrate jointly form an SIW coupling resonant cavity;
2 horizontal slotted holes are formed in the center of the upper surface of the LTCC substrate, and no local via hole is formed around each slotted hole, so that cascade coupling and cross coupling of an internal SIW resonant cavity are realized;
realizing a passive filter through electromagnetic coupling inside the cascade SIW resonant cavity;
and a microstrip line is respectively led out from the left side and the right side of the SIW resonant cavity, and 1 straight transverse groove is respectively arranged in the SIW resonant cavity close to the left microstrip line and the right microstrip line, so that the input and the output of the passive filter are realized.
3. The method as claimed in claim 1, wherein the W FMCW SAR and small UAV integrated system is designed in cooperation with each other, and comprises: the implementation method for realizing the integration of the transmitting module of the active power amplifier in the transmitting channel by adopting a hybrid integration mode is as follows:
bonding an input/output end of a W-band compound MMIC chip adopted by an active power amplifier transmitting module into the MEMS microcavity through a microstrip probe;
manufacturing a SIW coupling resonant cavity based on an LTCC multilayer process;
the microstrip probe is used as the input and output of the active power amplifier transmitting module and is coupled to the SIW coupling resonant cavity through the cavity in the MEMS microcavity.
4. The collaborative design method of the W FMCW SAR and small UAV integrated system according to claim 1, wherein:
a monitoring timing function unit, a digital receiving and processing unit and a data storage function unit are designed on the first FPGA chip;
the monitoring timing function unit is used for receiving the remote control command and the configuration data injected by the ground control terminal and completing the unpacking, forwarding and executing operation of the remote control command; performing power-on and power-off control on the power supply of the electronic equipment on the UAV platform according to the received remote control instruction, and controlling the on-off of other single machines of the SAR load; the system is communicated with a frequency synthesizer, a SAR load controller and a W-band radio frequency front end, receives telemetering information sent by each part and sends the telemetering information as auxiliary data to a data receiving and processing unit, a data storage function unit and a real-time imaging processing unit; setting a working mode of the SAR load according to the operation task requirement; controlling the working time sequence of the system, generating a periodic waveform control signal, outputting the periodic waveform control signal to a frequency synthesizer, and generating an echo data acquisition signal;
a digital reception processing unit: receiving two paths of I/Q analog signals input by a frequency synthesizer analog receiver, and finishing acquisition and AD conversion of analog echo signals; receiving auxiliary data of the monitoring timing function unit, framing the auxiliary data with the analog echo signal after AD conversion, and sending the auxiliary data and the analog echo signal to the data storage function unit to finish storage; preprocessing the analog echo signal after AD conversion, caching the data obtained by preprocessing, and sending the data to a real-time imaging processing functional unit;
a data storage function unit: the device is provided with an independent original echo data storage area and can store analog echo signals after AD conversion and auxiliary data of a monitoring timing function unit; the imaging processing system is provided with an independent real-time imaging processing data storage area for storing imaging data sent by a real-time imaging processing unit; the mapping management and storage space management functions from the logical address to the physical address are provided; has the functions of reading, writing and erasing.
5. The collaborative design method of the W FMCW SAR and small UAV integrated system according to claim 4, wherein: a real-time imaging processing unit is designed on the second FPGA chip, receives the auxiliary data of the monitoring timing function unit and the preprocessed data of the digital receiving processing unit, and analyzes and caches the auxiliary data and the preprocessed data; and processing the preprocessed data by adopting a real-time imaging algorithm to obtain real-time imaging data, and sending the real-time imaging data to the data storage functional unit to finish storage.
6. The collaborative design method of W FMCW SAR and small UAV integrated system according to claim 5, wherein the real-time imaging algorithm comprises the following steps:
1) carrying out azimuth filtering and extraction on input data to obtain preprocessed data;
2) performing inertial navigation first-order error compensation on the preprocessed data;
3) performing azimuth blocking processing on the compensated data to obtain a plurality of pieces of data;
4) sequentially performing Doppler center estimation, direction FFT (fast Fourier transform), FS (frequency shift correction) and direction IFFT (inverse fast Fourier transform) processing, distance block processing, MD (machine direction) estimation frequency modulation, calculation frequency modulation difference and calculation acceleration processing on one piece of data obtained after the direction block processing in the step 3);
5) processing the data obtained in the step 3) in the step 4) in sequence;
6) performing azimuth data synthesis processing, and synthesizing the data subjected to the block processing in the step 3) into a block of data;
7) and sequentially carrying out inertial navigation second-order error compensation, phase compensation, azimuth matching filtering and azimuth PGA self-focusing processing on the synthesized data to complete real-time imaging and obtain a final imaging image.
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