CN111832233A - Method for checking whether signal line exists below special device in PCB design - Google Patents
Method for checking whether signal line exists below special device in PCB design Download PDFInfo
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- CN111832233A CN111832233A CN202010666835.6A CN202010666835A CN111832233A CN 111832233 A CN111832233 A CN 111832233A CN 202010666835 A CN202010666835 A CN 202010666835A CN 111832233 A CN111832233 A CN 111832233A
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- 238000000034 method Methods 0.000 title claims abstract description 22
- 230000004048 modification Effects 0.000 claims description 10
- 238000012986 modification Methods 0.000 claims description 10
- 238000009434 installation Methods 0.000 claims description 9
- 239000013078 crystal Substances 0.000 claims description 5
- 238000003475 lamination Methods 0.000 claims description 2
- 238000007689 inspection Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 150000003071 polychlorinated biphenyls Chemical class 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000011218 segmentation Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/31—Design entry, e.g. editors specifically adapted for circuit design
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/392—Floor-planning or layout, e.g. partitioning or placement
Abstract
The invention provides a method for checking whether a signal wire is arranged below a special device in PCB design, which belongs to the technical field of PCB wiring design, and is used for classifying all signal layers according to an ETCH layer and classifying sensitive devices; and detecting each sensitive device, determining the coordinate position of each sensitive device, and checking whether the coordinate position of the calculated target, which is the special device, and the wiring coordinates of all the signal layers have coincident points. The invention can check whether a signal line passes through each signal layer below the special device or not, and improves the efficiency of the Layout operation.
Description
Technical Field
The invention relates to a PCB wiring design technology, in particular to a method for checking whether a signal wire is arranged below a special device in PCB design.
Background
In the electronic industry, a plurality of types of PCB design software exist, and the Allegro software has abundant and powerful functions as one of the PCB design software. The software uses a unique data format to store the design files, and each design file has a corresponding independent database support. There are two main types of information in the database: physical information and logical information. Various functional operations of the Allegro software are editing and operating on the database. In the same situation, the database can be edited by using an extended kill interface provided by software, so that functions which are not provided by some programs are realized, and the working efficiency of Layout is improved.
When a complex circuit board is designed, the board is provided with more or less interference devices such as inductors, MOS, crystal oscillators, clock chips and the like. Because these special devices can generate electromagnetic interference, the interference is caused to sensitive wires such as high-speed wires, power signal wires and the like, and the wires are forbidden right below the devices. Because the complex circuit board is provided with a plurality of signal wiring layers and a plurality of interference devices, in order to ensure the signal quality, whether a signal line exists below each special device or not can be checked one by one after the wiring is finished, and if the signal line exists, the signal line can be moved away, so that the purpose of avoiding the interference of the special devices is achieved. This is a cumbersome and easily missed task.
Disclosure of Invention
In order to solve the technical problems, the invention provides a method for checking whether a signal line exists below a special device in PCB design so as to consider time cost and ensure the signal quality of a circuit board.
The technical scheme of the invention is as follows:
a method for checking whether a signal line is under a special device in PCB design,
the method comprises the following steps:
1) classifying all signal layers according to the PCB lamination layer according to the ETCH layer surface, and naming the signal layers as subclass names;
2) classifying the sensitive devices, wherein the inductance is recorded as L (the inductance represents the device mark), the crystal oscillator is X, the clock chip is CK, and the MOS is MOS;
3) detecting each sensitive device, determining the coordinate position of each sensitive device and recording the coordinate position;
4) the user selects one type of device to check independently, namely, all L or all MOS are checked;
after clicking check, the program will perform the calculation; the calculated target is whether the coordinate position of the special device and the wiring coordinates of all the signal layers have coincident points or not;
if the coincident point shows that the signal wire passes through the lower part of the special device, and if the coincident point does not show that the signal wire does not pass through the lower part of the special device, the coincident point does not show that the signal wire does not pass through the lower part of the special device; the particular device through which the signal passes will be highlighted.
Further, in the above-mentioned case,
the above-mentioned write-in Skill program is used to directly check and report the situation of which specific devices have signal lines in which layer under them. The implementation of the Skill program requires modification of part of the configuration files of the software to achieve the necessary runtime environment to make direct modifications to the background database of the Layout design.
1) Firstly, a menu bar file of Allegro software is modified, and a configuration file of the Allegro software is placed in a catalog of \ Cadence \ SPB _16.6\ share \ pcb \ text \ cuimenus under an Allegro installation path.
Part of the partial code for this step is as follows:
the part is a command for adding a software menu; the first POPUP is a level one menu, the second POPUP is a level two menu, and then MENUITEM is a display command in the menu.
2) Modifying an alloguro.ilinit file under a Cadence \ SPB _16.6\ share \ local \ pcb \ still directory under an Allegro installation path, and adding a row of codes into the file as follows: load ("check _ cross _ symbol. il").
3) Putting a check _ cross _ symbol.il file into a Cadence \ SPB _16.6\ share \ local \ pcb \ still directory under an Allegro installation path;
putting the written kill program under a calling directory of software;
4) the Cross Symbol command is executed in the menu bar, and the special device which does not meet the design requirement is highlighted, so that the modification is convenient.
The invention develops the extended function on the basis of Allegro software. Some expansion operations beyond the basic functions of the software can be realized through the Skill program interface of the Allegro software.
With the SKILL, it is possible to check whether a signal line passes under each particular device.
With the SKILL, it is possible to check each signal layer under a particular device for signal lines to pass through.
The method can be widely applied to the layout design of PCBs of all board cards, and is a universal inspection method.
The invention has the advantages that
And writing a method for checking whether a signal line exists below the special device into the Skill program. Use this Skill program, can directly inspect and report out the below of which special device has the condition of signal line on which layer, if then highlight out device and walking line, the engineer can directly look over the special device and the signal line that are highlighted out and optimize, reduces the process of manual searching problem to improve work efficiency, avoid because of the omission mistake that manual inspection appears.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer and more complete, the technical solutions in the embodiments of the present invention will be described below, it is obvious that the described embodiments are a part of the embodiments of the present invention, rather than all embodiments, and all other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without creative efforts belong to the protection scope of the present invention.
The invention relates to a method for checking whether a signal wire is arranged below a special device in PCB design, wherein the used design software is Cadence Allegro PCB Editor. In the wiring completion stage in the circuit board design, whether signal lines are arranged under interference devices such as inductors, crystal oscillators, MOS (metal oxide semiconductors), clock chips and the like needs to be checked, and the method comprises the following steps:
1) all signal layers are sorted by ETCH level according to PCB stack and named their subclass name.
2) The sensitive devices are classified, wherein the inductance is recorded as L (here, the device label), the crystal oscillator is X, the clock chip is CK, and the MOS is MOS.
3) And detecting each sensitive device, determining the coordinate position of each sensitive device (determining the coordinate positioning of the outer frame track of the place _ bound _ top of the sensitive device), and recording.
4) The user can individually select a certain type of device to check, i.e., check all L or all MOS.
After clicking check, the program will perform the calculation. The target to be calculated is the coordinate position of the particular device and whether there is a coincident point in the trace coordinates of all signal layers.
If there is a coincident point indicating that there is a signal trace passing under this particular device, there is no coincident point indicating that there is no signal trace passing. The particular device through which the signal passes will be highlighted.
The implementation of this kill program requires modification of part of the configuration file of the software to achieve the necessary operating environment to make direct modifications to the background database of the Layout of Layout.
(1) Firstly, a menu bar file of Allegro software is modified, and a configuration file of the Allegro software is placed in a directory of \ Cadence \ SPB _16.6\ share \ pcb \ text \ cuimenus in an Allegro installation path (the directory stores the menu configuration file of the Allegro software, and a menu interface of the software can be modified through modifying codes). Part of the partial code for this step is as follows:
this part is a command to add a software menu. The first POPUP is a level one menu, the second POPUP is a level two menu, and then MENUITEM is a display command in the menu.
(2) Modifying an alloguro.ilinit file under a Cadence \ SPB _16.6\ share \ local \ pcb \ still directory under an Allegro installation path, and adding a row of codes into the file as follows: load ("check _ cross _ symbol. il")
The function is the initialization file for the kill. The kill program can be automatically loaded when the software is started without manually inputting command calls in the software.
(3) The check _ cross _ symbol file is put into a Cadence \ SPB _16.6\ share \ local \ pcb \ skill directory under an Allegro installation path.
And putting the written kill program under a calling directory of the software.
(4) The Cross Symbol command is executed in the menu bar, and the functions described in the invention can be realized. Special devices which do not meet the design requirements are highlighted for modification.
When in operation, an operation interface can be popped up by modifying a menu configuration file and adding a button, Cross Symbol, from a menu bar once clicking; selecting a Symbol type from the operation interface or selecting all the Symbol types and clicking check. The highlighted special device is yellow after clicking check (the highlighted color is set by software and can be manually changed), and a designer can optimize according to the reported result to avoid the situation of cross segmentation.
The above description is only a preferred embodiment of the present invention, and is only used to illustrate the technical solutions of the present invention, and not to limit the protection scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention shall fall within the protection scope of the present invention.
Claims (8)
1. A method for checking whether there is signal line under special device in PCB design is characterized in that,
the method comprises the following steps:
1) classifying all signal layers according to the PCB lamination layer according to the ETCH layer surface, and naming the signal layers as subclass names;
2) classifying the sensitive devices, wherein the inductance is recorded as L (the inductance represents the device mark), the crystal oscillator is X, the clock chip is CK, and the MOS is MOS;
3) detecting each sensitive device, determining the coordinate position of each sensitive device and recording the coordinate position;
4) the user selects one type of device to check independently, namely, all L or all MOS are checked; after clicking check, the program will perform the calculation; the calculated target is whether the coordinate position of the special device and the wiring coordinates of all the signal layers have coincident points or not; if the coincidence point exists, the signal wire passes through the lower part of the special device, and if the coincidence point does not exist, the signal wire does not pass through the lower part of the special device; the particular device through which the signal passes will be highlighted.
2. The method of claim 1,
the above-mentioned write-in Skill program is used to directly check and report the situation of which specific devices have signal lines on which layer under them.
3. The method of claim 2,
the implementation of the Skill program requires modification of part of the configuration file of the software to achieve the necessary operating environment to make direct modifications to the background database of the Layout of Layout.
4. The method of claim 2,
firstly, a menu bar file of Allegro software is modified, and a configuration file of the Allegro software is placed in a catalog of \ Cadence \ SPB _16.6\ share \ pcb \ text \ cuimenus under an Allegro installation path.
5. The method of claim 4,
part of the partial code for this step is as follows:
6. the method of claim 5,
the part is a command for adding a software menu; the first POPUP is a level one menu, the second POPUP is a level two menu, and then MENUITEM is a display command in the menu.
7. The method of claim 6,
modifying an alloguro.ilinit file under a Cadence \ SPB _16.6\ share \ local \ pcb \ still directory under an Allegro installation path, and adding a row of codes into the file as follows: load ("check _ cross _ symbol. il").
8. The method of claim 7,
putting a check _ cross _ symbol.il file into a Cadence \ SPB _16.6\ share \ local \ pcb \ still directory under an Allegro installation path;
putting the written kill program under a calling directory of software;
the Cross Symbol command is executed in the menu bar, and the special device which does not meet the design requirement is highlighted, so that the modification is convenient.
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| CN202010666835.6A CN111832233B (en) | 2020-07-13 | 2020-07-13 | Method for checking whether signal wires exist below special devices in PCB design |
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| CN202010666835.6A CN111832233B (en) | 2020-07-13 | 2020-07-13 | Method for checking whether signal wires exist below special devices in PCB design |
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| CN111832233A true CN111832233A (en) | 2020-10-27 |
| CN111832233B CN111832233B (en) | 2024-03-26 |
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| WO2019192147A1 (en) * | 2018-04-02 | 2019-10-10 | 青岛海信移动通信技术股份有限公司 | Printed circuit board and movable device |
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2020
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Patent Citations (6)
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| CN103810346A (en) * | 2014-02-27 | 2014-05-21 | 山东超越数控电子有限公司 | Method for checking part height restrictions through ALLEGRO software |
| CN105095597A (en) * | 2015-08-27 | 2015-11-25 | 浪潮集团有限公司 | Method for building Skill program of PCB design layers and films |
| WO2019192147A1 (en) * | 2018-04-02 | 2019-10-10 | 青岛海信移动通信技术股份有限公司 | Printed circuit board and movable device |
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