CN109492310A - A kind of method and check device of the inspection of line - Google Patents
A kind of method and check device of the inspection of line Download PDFInfo
- Publication number
- CN109492310A CN109492310A CN201811354034.5A CN201811354034A CN109492310A CN 109492310 A CN109492310 A CN 109492310A CN 201811354034 A CN201811354034 A CN 201811354034A CN 109492310 A CN109492310 A CN 109492310A
- Authority
- CN
- China
- Prior art keywords
- coordinate
- signal wire
- via hole
- processor
- check device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
The embodiment of the present application discloses the method and check device of a kind of inspection of line, for checking dog bone Dogbone route, a large amount of working hour can be reduced by this inspection method and this check device, shorten the development cycle, and be not in missing inspection situation, improve the Stability and dependability of calculating process.The embodiment of the present application method includes: the first coordinate and tail coordinate for obtaining the signal wire；The coordinate of processor is obtained, which is located in the route where the signal wire；The coordinate of via hole is obtained, which is located in the route where the signal wire；If the coordinate of the head coordinate and the processor is identical and the tail coordinate is identical as the coordinate of the via hole, alternatively, if the coordinate of the tail coordinate and the processor is identical and the first coordinate is identical as the coordinate of the via hole, it is determined that the length and width of the signal wire；If the length is not in the first presetting range, and the width is not in the second presetting range, it is determined that the signal wire failure.
Description
Technical field
This application involves systems design areas, and in particular to a kind of method and check device of the inspection of line.
Background technique
Intel Purley and next generation's Whitley platform central processor (central processing unit,
CPU cloud operation product (server, memory etc.) printed circuit board (printed circuit board, PCB)) designs neck
In domain, need to check DDR4 dog bone (Dogbone) cabling.
Since Intel has stringent cabling requirement to this part cabling, generally by the way of checking manually, check
The line width and wire length of DDR4Dogbone cabling.
Since DDR4 cabling number is very more, checks manually excessively cumbersome and there is uncertainty, influence to check reliability
And stability.
Summary of the invention
The embodiment of the present application provides a kind of method of inspection of line, can be with by this inspection method and this check device
A large amount of working hour is reduced, shortens the development cycle, and is not in missing inspection situation, improves the stability of calculating process and reliable
Property.
In order to achieve the above objectives, the embodiment of the present application provides the following technical solutions:
The application first aspect provides a kind of method of inspection of line, and this method can be applied to the inspection of DDR4Dogbone cabling
Cha Zhong, it is real that the check device that the method for the inspection of line is related in the process of implementation corresponds to corresponding function in terminal device
Body.This method may include: the first coordinate and tail coordinate for obtaining the signal wire；The coordinate of processor is obtained, which is located at
In route where the signal wire；The coordinate of via hole is obtained, which is located in the route where the signal wire；If the head coordinate
And the coordinate of the processor is identical and the tail coordinate is identical as the coordinate of the via hole, alternatively, if the tail coordinate and the processor
Coordinate is identical and the first coordinate is identical as the coordinate of the via hole, it is determined that the length and width of the signal wire；If the length does not exist
First presetting range or the width be not in the second presetting range, it is determined that the signal wire failure.
Optionally, in some application embodiments of the application, determination signal wire to be checked may include: to obtain
The keyword message of the signal wire；According to the keyword message, the signal wire is determined；Or, obtaining the mark of the signal wire；According to
The mark determines the signal wire.
Optionally, in some application embodiments of the application, after the coordinate of the check processor, this method can be with
It include: the quantity for obtaining memory bank, which is located in the route where the signal wire；According to the number of the memory bank
Amount, determines first presetting range and the second presetting range.
Optionally, in some application embodiments of the application, the coordinate of the acquisition via hole may include: to obtain the mistake
The quantity in hole；If the quantity of the via hole is not 0, the coordinate of the via hole is obtained.
Optionally, in some application embodiments of the application, after the determination signal wire failure, this method can be with
It include: generation fault message；Show the fault message.
The application second aspect provides a kind of check device, which, which has, realizes above-mentioned first aspect or first party
The function of the method for any one possible implementation of face.The function can also be executed by hardware realization by hardware
Corresponding software realization.The hardware or software include one or more modules corresponding with above-mentioned function.
The third aspect, the embodiment of the present application provide a kind of check device, the check device may include terminal device or
The entities such as chip, the check device include: input/output (I/O) interface, processor and memory；The memory is used for
Store instruction；The processor is used to execute the described instruction in the memory, so that the check device is executed as aforementioned
Method described in any one of first aspect.
Fourth aspect, the embodiment of the present application provides a kind of computer readable storage medium, including instruction, when it is in computer
When upper operation, so that computer executes the method as described in aforementioned first aspect and any optional implementation.
The computer storage medium include: USB flash disk, mobile hard disk, read-only memory (read-only memory, ROM), with
Machine accesses various Jie that can store program code such as memory (random access memory, RAM), magnetic or disk
Matter.
5th aspect, the embodiment of the present application provide a kind of computer program product, when run on a computer, so that
Computer executes the method as described in aforementioned first aspect and any optional implementation.
6th aspect, this application provides a kind of chip system, which includes processor, checks dress for supporting
It sets and realizes function involved in above-mentioned aspect, for example, sending or handling data and/or information involved in the above method.
In a kind of possible design, the chip system further includes memory, and the memory is necessary for saving check device
Program instruction and data.The chip system is also possible to apply and executes corresponding function in check device either check device
The System on Chip/SoC of energy.
As can be seen from the above technical solutions, the embodiment of the present application has the advantage that
The first coordinate and tail coordinate that the embodiment of the present application passes through the acquisition signal wire；Obtain the coordinate of processor, the processing
Device is located in the route where the signal wire；The coordinate of via hole is obtained, which is located in the route where the signal wire；If should
The coordinate of first coordinate and the processor is identical and the tail coordinate is identical as the coordinate of the via hole, alternatively, if the tail coordinate and this at
The coordinate of reason device is identical and the first coordinate is identical as the coordinate of the via hole, it is determined that the length and width of the signal wire；If the length
Degree is not in the first presetting range or the width not in the second presetting range, it is determined that the signal wire failure.Pass through this inspection method
And this checks that equipment can reduce a large amount of working hour, shortens the development cycle, and be not in missing inspection situation, improves calculating
The Stability and dependability of process.
Detailed description of the invention
Fig. 1 is the place on line schematic diagram of Dogbone cabling；
Fig. 2 is a kind of method schematic diagram of inspection of line provided by the embodiments of the present application；
Fig. 3 is a kind of interface schematic diagram of inspection of line tool provided by the embodiments of the present application；
Fig. 4 is a kind of interface schematic diagram of filter utility provided by the embodiments of the present application；
Fig. 5 is the interface schematic diagram of another inspection of line tool provided by the embodiments of the present application；
Fig. 6 is a kind of structural schematic diagram of check device provided by the embodiments of the present application；
Fig. 7 is the structural schematic diagram of another check device provided by the embodiments of the present application.
Specific embodiment
With reference to the accompanying drawing, embodiments herein is described, it is clear that described embodiment is only the application
The embodiment of a part, instead of all the embodiments.Those of ordinary skill in the art are it is found that with the development of technology and new field
The appearance of scape, technical solution provided by the embodiments of the present application are equally applicable for similar technical problem.
The embodiment of the present application provides the method and check device of a kind of inspection of line, for carrying out to Dogbone route
It checks, a large amount of working hour can be reduced by this inspection method and this check device, shorten the development cycle, and be not in
Missing inspection situation improves the Stability and dependability of calculating process.
The invention relates to the cloud operation product (clothes for using Intel Purley and next generation's Whitley platform CPU
Be engaged in device, memory etc.) in PCB design field for the tool of DDR4Dogbone cabling automation inspection.Intel is to this part
Cabling has stringent cabling requirement, including line width and wire length, as attached drawing one lists walking for DQ/DQS/ECC Dogbone
Line requirement.Since DDR4 cabling number is very more, inspection is excessively cumbersome manually, and the digital memory slot of different number
(Dual-Inline-Memory-Modules, DIMM) corresponding different inspection rule, need to use Cadence SKILL language to compile
The tool for Intel CPU DDR4Dogbone cabling automation inspection is write, to realize the automatic inspection to this region cabling
It looks into, Automatic sieve selects problematic cabling, carries out improvement cabling convenient for Layout engineer and meets design requirement, signal has good
Good signal integrity, to guarantee that whole system has good reliability and stability.As shown in Figure 1, being that Dogbone is walked
The situation that the place on line schematic diagram of line is DIMM quantity in figure when being 2.
In specific workflow, after the completion of Layout engineer placement-and-routing, requirement as above is checked manually,
Inevitably there is the generation of missing inspection situation in this way.Pass through inspection method provided by the embodiments of the present application and tool, it is possible to reduce a large amount of work
When, shorten the development cycle, and be not in missing inspection situation.Greatly improve PCB processing quality.
The method that the present embodiment proposes is to solve the problems, such as this, for ease of understanding, below to the specific stream in the present embodiment
Journey is described, as shown in Fig. 2, being a kind of method schematic diagram of inspection of line provided by the embodiments of the present application, this method includes
But it is not limited to following steps:
201, the first coordinate and tail coordinate of the signal wire are obtained；
In the present embodiment, the signal wire for needing to check being determined, obtaining its first coordinate and tail coordinate first, coordinate value is herein
A kind of station location marker of circuit board, can position all devices, and can be calculated by coordinate value respectively where signal wire
The distance between device, or the length with coordinate span device.
202, the coordinate of processor is obtained；
In the present embodiment, processor CPU can be one of Intel processor, and the coordinate of processor can be CPU and draw
The coordinate of foot, detailed process are to determine CPU to be checked, obtain the coordinate of CPU pin relevant to signal wire.
203, the coordinate of via hole is obtained；
In the present embodiment, the quantity of via hole Via can be had an impact checking process, if Via number is 0, be illustrated
It is with CPU in the same face, usually Top layers, this link in this way does not have to continue checking.If Via number is not 0, continue to examine
It looks into.
If 204, the coordinate of the head coordinate and the processor is identical and the tail coordinate is identical as the coordinate of the via hole, alternatively,
If the coordinate of the tail coordinate and the processor is identical and the first coordinate is identical as the coordinate of the via hole；
In the present embodiment, since the head and the tail of signal wire can be general, for the comparison of its coordinate can there are two types of sides
Formula, i.e., first coordinate is identical as the coordinate of the processor and the tail coordinate is identical as the coordinate of the via hole, alternatively, tail coordinate at this
The coordinate of reason device is identical and the first coordinate is identical as the coordinate of the via hole.
It should be noted that coordinate is identical herein does not define the length of signal wire, i.e. signal wire can be non-rectilinear
Cabling mode, depending on concrete condition is because of actual scene, herein without limitation.
205, the length and width of the signal wire are determined；
It is available to the length of signal wire and the information of width after determining the coordinate of signal wire in the present embodiment, phase
The calculating of pass can be the difference of coordinate, be also possible to the variation relative value calculated by coordinate, concrete condition is because of reality
Depending on scene, herein without limitation.
If 206, the length is not in the first presetting range or the width not in the second presetting range；
In the present embodiment, the first presetting range and the second presetting range can be Intel Company for CPU
The cabling rule of DDR4Dogbone is also possible to the input in response to user, and the cabling rule of generation, concrete condition is because of reality
Depending on scene, herein without limitation.
It should be noted that the topology according to DDR4 is different, it includes 1SPC that rule is different, two kinds of 2SPC, wherein DDR4
Topology can be judged by DIMM Slot information, such as: if DIMM Slot is two, inputted using user
2SPC rule；If DIMM Slot is one, the 1SPC rule inputted using user, specific 2SPC and 1SPC rule can
To be in response to the input in user, it is also possible to the parameter of default, depending on concrete condition is because of actual scene, herein without limitation.
207, the signal wire failure is determined.
In the present embodiment, signal wire failure can be length not in the first presetting range, or width is not second
Presetting range, can also be for length is not in the first presetting range and width is not in the second presetting range.
It is understood that the cabling information for being unsatisfactory for requiring can be shown after determining the signal wire failure, with
Convenient for the examination of related personnel；Inspection result can also be stored into text document, be convenient for subsequent access.
The first coordinate and tail coordinate that the embodiment of the present application passes through the acquisition signal wire；Obtain the coordinate of processor, the processing
Device is located in the route where the signal wire；The coordinate of via hole is obtained, which is located in the route where the signal wire；If should
The coordinate of first coordinate and the processor is identical and the tail coordinate is identical as the coordinate of the via hole, alternatively, if the tail coordinate and this at
The coordinate of reason device is identical and the first coordinate is identical as the coordinate of the via hole, it is determined that the length and width of the signal wire；If the length
Degree is not in the first presetting range or the width not in the second presetting range, it is determined that the signal wire failure.Pass through this inspection method
And this checks that equipment can reduce a large amount of working hour, shortens the development cycle, and be not in missing inspection situation, improves calculating
The Stability and dependability of process.
It should be noted that the embodiment of the present application can be embodied by a kind of specific software work meeting, below root
It is illustrated according to attached drawing.
Application of the interface that the present embodiment proposes to illustrate this method, for ease of understanding, below in the present embodiment
Specific interface module is described, as shown in figure 3, being a kind of interface signal of inspection of line tool provided by the embodiments of the present application
Figure, specially dog bone cabling Dogbone checking tool.The interface includes but is not limited to following module:
Network 301 is selected, wiring rule 302, network list 303, inspection result 304,305, report 306 is checked and closes
Close 307.
In the present embodiment, signal wire to be checked can be determined by selection network 301；It is inputted by wiring rule 302
For the line width and wire length of Different Rule；The signal wire checked is shown by network list 303；Pass through inspection result 304
Show the inspection result of coherent signal line and the correspondence situation of corresponding inspection rule；It is unsatisfactory for by checking 305
It is required that cabling information show, in order to the examination of related personnel；Inspection result is stored to text document by report 306
In, it is convenient for subsequent access；By closing 307 end check programs.
It is understood that a kind of filtering can be passed through during selecting network 301 to determine signal wire to be checked
Tool selects coherent signal line, as shown in figure 4, be a kind of interface schematic diagram of filter utility provided by the embodiments of the present application.
In the present embodiment, when selecting the signal wire to be checked, the letter to be checked can be inputted according to user's demands on examination
Number line, can input keyword and quickly be filtered, and the signal wire filtered out is chosen to carry out subsequent examination.It can also input
Whole signal wire network name carries out subsequent examination.In signal wire filter process, program takes this company, signal wire institute out of automatically
The device information for connecing device, it is CPU which, which needs to manually select, is convenient for subsequent further inspection.
For example, by network filtering input keyword M_*, can show M_CHA_G0_DQ<0>, M_CHA_G0_DQ<1>,
The relevant signal wires such as M_CHA_G0_DQ<2>, M_CHA_G0_DQ<3>, M_CHA_G0_DQ<4>, M_CHA_G0_DQ<5>.
It should be noted that can also be by component that coherent signal line is connected to determine whether being measured signal
Line inputs the signal wire to be checked in secondary interface, can keyword also complete signal name, while filtering out signal name,
The information of the device of its connector is also recalled.Then click it is all be moved to filtered network, then CPU information is moved
It moves in CPU frame, clicks confirmation, can confirm measured signal line.
In the case where a kind of completion checking process, checking tool can show interface as shown in Figure 5, and Fig. 5 is this Shen
Please embodiment provide another inspection of line tool interface schematic diagram.
Each key distribution and function are similar with embodiment illustrated in fig. 3, are not repeated herein.
In the present embodiment, dependency rule is shown in wiring rule, for example, 2SPC rule provides corresponding signal wire line width
Threshold value is 6.75mil, and wire length threshold value is less than or equal to 50mil, and 1SPC rule provides that corresponding signal wire line width threshold value is
4.3mil, wire length threshold value are less than or equal to 50mil.For signal wire M_CHA_G0_DQ<0>, M_CHA_G0_DQ to be checked
<1>, M_CHA_G0_DQ<2>, M_CHA_G0_DQ<3>, M_CHA_G0_DQ<4>, M_CHA_G0_DQ<5>etc. are shown in network column
In table, corresponding inspection result is shown in inspection result, wherein if line width or wire length do not meet threshold requirement, result
Display can be able to be Pass if line width or wire length meet threshold requirement for Fail as the result is shown.
The embodiment of the present application can be applied in check device according to the above method, and carry out functional module to check device
Division two or more functions can also be integrated for example, each functional module of each function division can be corresponded to
In a processing module.Above-mentioned integrated module both can take the form of hardware realization, can also use software function mould
The form of block is realized.It should be noted that being schematical, only a kind of logic to the division of module in the embodiment of the present application
Function division, there may be another division manner in actual implementation.
For example, in the case where to use the integrated each functional unit of model split, as shown in fig. 6, being that the application is implemented
A kind of structural schematic diagram for check device that example provides.
If Fig. 6 shows, check device 600 provided by the embodiments of the present application includes determination unit 601 and acquiring unit 602.
Determination unit 601, for determining signal wire to be checked；
Acquiring unit 602, for obtaining the first coordinate and tail coordinate of the signal wire；
The acquiring unit 602, is also used to obtain the coordinate of processor, which is located at the route where the signal wire
In；
The acquiring unit 602, is also used to obtain the coordinate of via hole, which is located in the route where the signal wire；
The determination unit 601, if being also used to that the head coordinate is identical as the coordinate of the processor and the tail coordinate and the via hole
Coordinate it is identical, alternatively, if the coordinate of the tail coordinate and the processor is identical and the first coordinate is identical as the coordinate of the via hole,
Determine the length and width of the signal wire；
The determination unit 601, if being also used to the length not in the first presetting range, and the width is not in the second preset model
It encloses, it is determined that the signal wire failure.
Optionally, determination unit 601, specifically for obtaining the keyword message of the signal wire；The determination unit 601,
Specifically for determining the signal wire according to the keyword message；Or, the determination unit 601, specifically for obtaining the signal wire
Mark；The determination unit 601 is specifically used for determining the signal wire according to the mark.
Optionally, the acquiring unit 602, is also used to obtain the quantity of memory bank, which is located at the signal wire
In the route at place；The acquiring unit 602, is also used to the quantity according to the memory bank, determines first presetting range and
Two presetting ranges.
Optionally, acquiring unit 602, specifically for obtaining the quantity of the via hole；The acquiring unit 602, is specifically used for
If the quantity of the via hole is not 0, the coordinate of the via hole is obtained.
Optionally, the determination unit 601, is also used to generate fault message；The determination unit 601, is also used to show the event
Hinder information.
Wherein, all related contents for each step that above method embodiment is related to can quote corresponding function unit
Function description, details are not described herein.
In the present embodiment, check device 600 can be in the form of the integrated each functional module of model split
It is existing.Here " module " can refer to application-specific integrated circuit (application-specific integrated
Circuit, ASIC), circuit, the processor and memory of the one or more softwares of execution or firmware program, integrated logic circuit,
And/or other can provide the device of above-mentioned function.In a simple embodiment, those skilled in the art is contemplated that
Check device 600 can use form shown in Fig. 7.
As shown in fig. 7, being the structural schematic diagram of another check device provided by the embodiments of the present application, check device 700
It include: input/output (I/O) interface 701, processor 702, memory 703.Specifically, the processor 702 in Fig. 7 can lead to
The computer executed instructions called and stored in memory 703 are crossed, so that check device 700 executes the reality in above method embodiment
The method of the existing inspection of line.
Specifically, function/realization process of determination unit 601 and acquiring unit 602 in Fig. 6 can be by Fig. 7
Processor 702 calls the computer executed instructions stored in memory 703 to realize.Alternatively, 601 He of determination unit in Fig. 6
The function of acquiring unit 602/realization process can be realized by input/output (I/O) interface 701 in Fig. 7.
Since check device 700 provided by the embodiments of the present application can be used for executing the method for the inspection of line, institute's energy
The technical effect of acquisition can refer to above method embodiment, and details are not described herein.
Optionally, the embodiment of the present application provides a kind of chip system, which includes processor, for supporting inspection
Look into the method that device realizes the above-mentioned inspection of line.In a kind of possible design, which further includes memory.The storage
Device, for saving the necessary program instruction of check device and data.The chip system can be made of chip, also may include
Chip and other discrete devices, the embodiment of the present application are not especially limited this.
In the above-described embodiments, can come wholly or partly by software, hardware, firmware or any combination thereof real
It is existing.When implemented in software, it can entirely or partly realize in the form of a computer program product.
The computer program product includes one or more computer instructions.Load and execute on computers the meter
When calculation machine program instruction, entirely or partly generate according to process or function described in the embodiment of the present application.The computer can
To be general purpose computer, special purpose computer, computer network or other programmable devices.The computer instruction can be deposited
Storage in a computer-readable storage medium, or from a computer readable storage medium to another computer readable storage medium
Transmission, for example, the computer instruction can pass through wired (example from a web-site, computer, server or data center
Such as coaxial cable, optical fiber, Digital Subscriber Line (DSL)) or wireless (such as infrared, wireless, microwave) mode to another website
Website, computer, server or data center are transmitted.The computer readable storage medium can be computer and can deposit
Any usable medium of storage either includes that the data storages such as one or more usable mediums integrated server, data center are set
It is standby.The usable medium can be magnetic medium, (for example, floppy disk, hard disk, tape), optical medium (for example, DVD) or partly lead
Body medium (such as solid state hard disk solid state disk (SSD)) etc..
The description and claims of this application and term " first " in above-mentioned attached drawing, " second " etc. are for distinguishing
Similar object, without being used to describe a particular order or precedence order.It should be understood that the data used in this way are in appropriate feelings
It can be interchanged under condition, so that the embodiments described herein can be real with the sequence other than the content for illustrating or describing herein
It applies.In addition, term " includes " and " having " and their any deformation, it is intended that cover it is non-exclusive include, for example, packet
The process, method, system, product or equipment for having contained series of steps or module those of be not necessarily limited to be clearly listed step or
Module, but may include other steps being not clearly listed or intrinsic for these process, methods, product or equipment or
Module.Occur in this application to step carry out name perhaps number be not meant to must according to name or number
Indicated time/logic sequencing executes the step in method flow, and named or number process step can be with
Execution order is changed according to the technical purpose to be realized, as long as identical or similar technical effect can be reached.This Shen
Please appeared in module division, be a kind of division in logic, can have other division side when realizing in practical application
Formula, such as multiple modules can be combined into or are integrated in another system, or some features can be ignored or not executed, separately
Outside, shown or discussion mutual coupling, direct-coupling or communication connection can be through some interfaces, module
Between indirect coupling or communication connection can be electrical or other similar form, be not construed as limiting in the application.Also, make
It can be the separation that may not be physically for the module or submodule of separate part description, can be and may not be physics
Module, or can be distributed in multiple circuit modules, some or all of modules can be selected according to the actual needs
To realize the purpose of application scheme.
Those of ordinary skill in the art will appreciate that all or part of the steps in the various methods of above-described embodiment is can
It is completed with instructing relevant hardware by program, which can be stored in a computer readable storage medium, storage
Medium may include: ROM, RAM, disk or CD etc..
Detailed Jie has been carried out to the method, check device and system of the inspection of line provided by the embodiment of the present application above
It continues, specific examples are used herein to illustrate the principle and implementation manner of the present application, and the explanation of above embodiments is only
It is to be used to help understand the method for this application and its core ideas；At the same time, for those skilled in the art, according to this Shen
Thought please, there will be changes in the specific implementation manner and application range, in conclusion the content of the present specification should not manage
Solution is the limitation to the application.
Claims (10)
1. a kind of method of the inspection of line characterized by comprising
Determine signal wire to be checked；
Obtain the first coordinate and tail coordinate of the signal wire；
The coordinate of processor is obtained, the processor is located in the route where the signal wire；
The coordinate of via hole is obtained, the via hole is located in the route where the signal wire；
If the coordinate of the head coordinate and the processor is identical and the tail coordinate is identical as the coordinate of the via hole, alternatively,
If the coordinate of the tail coordinate and the processor is identical and the first coordinate is identical as the coordinate of the via hole, it is determined that described
The length and width of signal wire；
If the length is not in the first presetting range or the width in the second presetting range, it is determined that the signal wire event
Barrier.
2. the method according to claim 1, wherein the signal wire that the determination is to be checked, comprising:
Obtain the keyword message of the signal wire；
According to the keyword message, the signal wire is determined；
Or,
Obtain the mark of the signal wire；
According to the mark, the signal wire is determined.
3. the method according to claim 1, wherein the method is also after the coordinate of the check processor
Include:
The quantity of memory bank is obtained, the memory bank is located in the route where the signal wire；
According to the quantity of the memory bank, first presetting range and the second presetting range are determined.
4. the method according to claim 1, wherein the coordinate for obtaining via hole, comprising:
Obtain the quantity of the via hole；
If the quantity of the via hole is not 0, the coordinate of the via hole is obtained.
5. method according to any of claims 1-4, which is characterized in that the determination signal wire failure it
Afterwards, the method also includes:
Generate fault message；
Show the fault message.
6. a kind of check device characterized by comprising
Determination unit, for determining signal wire to be checked；
Acquiring unit, for obtaining the first coordinate and tail coordinate of the signal wire；
The acquiring unit, is also used to obtain the coordinate of processor, and the processor is located in the route where the signal wire；
The acquiring unit, is also used to obtain the coordinate of via hole, and the via hole is located in the route where the signal wire；
The determination unit, if being also used to the first coordinate tail coordinate identical and described with the coordinate of the processor and the mistake
The coordinate in hole is identical, alternatively, if the tail coordinate is identical as the coordinate of the processor and the first coordinate and the via hole
Coordinate is identical, it is determined that the length and width of the signal wire；
The determination unit, if being also used to the length not in the first presetting range or the width not in the second presetting range,
Then determine the signal wire failure.
7. check device according to claim 6, which is characterized in that
The determination unit, specifically for obtaining the keyword message of the signal wire；
The determination unit is specifically used for determining the signal wire according to the keyword message；
Or,
The determination unit, specifically for obtaining the mark of the signal wire；
The determination unit is specifically used for determining the signal wire according to the mark.
8. check device according to claim 6, which is characterized in that
The acquiring unit, is also used to obtain the quantity of memory bank, and the memory bank is located at the line where the signal wire
Lu Zhong；
The acquiring unit is also used to the quantity according to the memory bank, determines first presetting range and second preset
Range.
9. check device according to claim 6, which is characterized in that
The acquiring unit, specifically for obtaining the quantity of the via hole；
The acquiring unit obtains the coordinate of the via hole if the quantity specifically for the via hole is not 0.
10. the check device according to any one of claim 6-9, which is characterized in that
The determination unit is also used to generate fault message；
The determination unit is also used to show the fault message.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811354034.5A CN109492310B (en) | 2018-11-14 | 2018-11-14 | Line inspection method and inspection device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811354034.5A CN109492310B (en) | 2018-11-14 | 2018-11-14 | Line inspection method and inspection device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109492310A true CN109492310A (en) | 2019-03-19 |
| CN109492310B CN109492310B (en) | 2021-10-29 |
Family
ID=65695834
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811354034.5A Active CN109492310B (en) | 2018-11-14 | 2018-11-14 | Line inspection method and inspection device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109492310B (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110501353A (en) * | 2019-07-26 | 2019-11-26 | 苏州浪潮智能科技有限公司 | A kind of horizontal vertical of PCB walks Check Methods and relevant apparatus |
| CN111159971A (en) * | 2019-12-20 | 2020-05-15 | 上海爱信诺航芯电子科技有限公司 | Detection method and device for integrated circuit layout, design method and electronic equipment |
| CN111832233A (en) * | 2020-07-13 | 2020-10-27 | 济南浪潮高新科技投资发展有限公司 | Method for checking whether signal line exists below special device in PCB design |
| CN115081389A (en) * | 2022-06-17 | 2022-09-20 | 苏州浪潮智能科技有限公司 | Printed circuit board routing inspection method, device, equipment and storage medium |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100768917B1 (en) * | 2006-09-19 | 2007-10-19 | 삼성전자주식회사 | Preparing method of phenol pcb |
| US20120175160A1 (en) * | 2009-04-17 | 2012-07-12 | Kadri Rachid M | Method and system for reducing trace length and capacitance in a large memory footprint |
| CN105865319A (en) * | 2016-03-31 | 2016-08-17 | 华为技术有限公司 | PCB testing method, PCB manufacturing method and PCB |
| CN107194058A (en) * | 2017-05-19 | 2017-09-22 | 郑州云海信息技术有限公司 | One kind is segmented isometric automatic checking method and system based on differential pair on PCB |
| CN107389007A (en) * | 2017-07-26 | 2017-11-24 | 郑州云海信息技术有限公司 | A kind of automatic method and device for checking power signal line |
| CN108804809A (en) * | 2018-06-07 | 2018-11-13 | Oppo（重庆）智能科技有限公司 | Emulation mode, system and the Wiring structure of DDR circuits |
-
2018
- 2018-11-14 CN CN201811354034.5A patent/CN109492310B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100768917B1 (en) * | 2006-09-19 | 2007-10-19 | 삼성전자주식회사 | Preparing method of phenol pcb |
| US20120175160A1 (en) * | 2009-04-17 | 2012-07-12 | Kadri Rachid M | Method and system for reducing trace length and capacitance in a large memory footprint |
| CN105865319A (en) * | 2016-03-31 | 2016-08-17 | 华为技术有限公司 | PCB testing method, PCB manufacturing method and PCB |
| CN107194058A (en) * | 2017-05-19 | 2017-09-22 | 郑州云海信息技术有限公司 | One kind is segmented isometric automatic checking method and system based on differential pair on PCB |
| CN107389007A (en) * | 2017-07-26 | 2017-11-24 | 郑州云海信息技术有限公司 | A kind of automatic method and device for checking power signal line |
| CN108804809A (en) * | 2018-06-07 | 2018-11-13 | Oppo（重庆）智能科技有限公司 | Emulation mode, system and the Wiring structure of DDR circuits |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110501353A (en) * | 2019-07-26 | 2019-11-26 | 苏州浪潮智能科技有限公司 | A kind of horizontal vertical of PCB walks Check Methods and relevant apparatus |
| CN111159971A (en) * | 2019-12-20 | 2020-05-15 | 上海爱信诺航芯电子科技有限公司 | Detection method and device for integrated circuit layout, design method and electronic equipment |
| CN111159971B (en) * | 2019-12-20 | 2023-09-22 | 上海航芯电子科技股份有限公司 | Integrated circuit layout detection method and device, integrated circuit layout design method and electronic equipment |
| CN111832233A (en) * | 2020-07-13 | 2020-10-27 | 济南浪潮高新科技投资发展有限公司 | Method for checking whether signal line exists below special device in PCB design |
| CN111832233B (en) * | 2020-07-13 | 2024-03-26 | 山东浪潮科学研究院有限公司 | Method for checking whether signal wires exist below special devices in PCB design |
| CN115081389A (en) * | 2022-06-17 | 2022-09-20 | 苏州浪潮智能科技有限公司 | Printed circuit board routing inspection method, device, equipment and storage medium |
| CN115081389B (en) * | 2022-06-17 | 2024-01-23 | 苏州浪潮智能科技有限公司 | Printed circuit board wiring inspection method, device, equipment and storage medium |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109492310B (en) | 2021-10-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109492310A (en) | A kind of method and check device of the inspection of line | |
| US8234610B2 (en) | Design rule management method, design rule management program, rule management apparatus, and rule verification apparatus | |
| CN105005532A (en) | System for automatically testing stability of application program interface and method | |
| CN105335570B (en) | A method of netlist comparison is carried out based on component pin connection relation | |
| CN109491894A (en) | A kind of method and apparatus of interface testing | |
| CN109240688A (en) | Interface development method, electronic device and readable storage medium storing program for executing | |
| CN102750301B (en) | Blueprint generating method for integrated avionic system model aiming at architecture analysis and design language (AADL) description | |
| CN109409005B (en) | DCS design document generation method, device, equipment and readable storage medium | |
| CN105302710A (en) | Method and apparatus for determining test case in need of regression testing | |
| US10452522B1 (en) | Synthetic data generation from a service description language model | |
| CN107870989A (en) | webpage generating method and terminal device | |
| CN102968370A (en) | Test data generating method and device | |
| CN108769179A (en) | A kind of service health state evaluation method and device | |
| US20200410150A1 (en) | Generating a template-driven schematic from a netlist of electronic circuits | |
| CN109739700B (en) | Interface testing method and device | |
| CN108536915A (en) | Pad design method and apparatus in a kind of printing board PCB design drawing | |
| CN109857387A (en) | A kind of method and electronic equipment generating JAVA class object | |
| CN113705143B (en) | Automatic simulation system and automatic simulation method | |
| CN109241074A (en) | Check data automatic processing method, device, computer equipment and storage medium | |
| CN109598067A (en) | Wiring method, wiring system, storage medium and the electronic equipment of printed circuit board | |
| CN109461072A (en) | A kind of transaction execution method and device | |
| WO2024113778A1 (en) | Holder determination method, apparatus and device for field replace unit device | |
| CN109241594A (en) | T-type topological structure wire length inspection method, device, equipment and readable storage medium storing program for executing | |
| CN117608761A (en) | Kubernetes cluster deployment method, device, equipment and storage medium | |
| US9996656B2 (en) | Detecting dispensable inverter chains in a circuit design |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |