CN111832246A - Method for checking whether wiring is divided in cross mode in PCB design - Google Patents

Method for checking whether wiring is divided in cross mode in PCB design Download PDF

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Publication number
CN111832246A
CN111832246A CN202010472796.6A CN202010472796A CN111832246A CN 111832246 A CN111832246 A CN 111832246A CN 202010472796 A CN202010472796 A CN 202010472796A CN 111832246 A CN111832246 A CN 111832246A
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China
Prior art keywords
layer
etch
plane
pcb
checking whether
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Pending
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CN202010472796.6A
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Chinese (zh)
Inventor
崔铭航
卞一名
刘强
金长新
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Jinan Inspur Hi Tech Investment and Development Co Ltd
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Jinan Inspur Hi Tech Investment and Development Co Ltd
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Priority to CN202010472796.6A priority Critical patent/CN111832246A/en
Publication of CN111832246A publication Critical patent/CN111832246A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/398Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/394Routing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2115/00Details relating to the type of the circuit
    • G06F2115/12Printed circuit boards [PCB] or multi-chip modules [MCM]

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

The invention aims to provide a method for checking whether wiring is divided in a spanning way in PCB design, which comprises the following steps: classifying all routing wires according to the ETCH layer according to the PCB lamination; detecting whether an adjacent layer of each ETCH layer is a PLANE layer; the user selects an ETCH layer to be checked, and whether one section of complete cline coordinate is in a coordinate point area of PLANE is calculated; if not, judging to be cross-partitioned and marking; all ETCH layers to be checked are processed by the same method. The invention can enable the layout engineer to get rid of the complicated work of manual inspection, thereby achieving the purpose of high efficiency and accuracy.

Description

Method for checking whether wiring is divided in cross mode in PCB design
Technical Field
The invention relates to the field of PCB design, in particular to a method for checking whether wiring is divided in a crossing way in PCB design.
Background
Currently, in the electronic industry, there are multiple types of PCB design software, and Allegro software, as one of them, has very rich and powerful functions. The software uses a unique data format to store the design files, and each design file has a corresponding independent database support. There are two main types of information in the database: physical information and logical information. Various functional operations of the Allegro software are editing and operating on the database. In the same situation, the extended kill interface provided by the software can be used for editing the database, so that functions which are not provided by some programs are realized, and the working efficiency of the Layout is improved.
When a circuit board is designed, various power supplies (such as 12V, 3.3V, 1.8V and the like), various grounds (digital ground, analog ground, protective ground and the like) are crisscrossed on a power supply plane or a ground plane, and the required power supply and the ground plane are hollowed out. In order to ensure high reliability of the power supply and the ground, the power supply and the ground cannot be distributed on one layer, so that the lamination of a PCB is increased, and the manufacturing cost of the circuit board is greatly increased. In order to save cost and ensure reliability of a circuit board, when the PCB is designed, power supplies or grounds of various PCBs are designed on the same plane according to characteristics of the circuit board, so that the incompleteness of the power supplies and the ground plane is caused, namely, the power supply (ground) layer is divided. The PCB routing on the circuit is split across the power (ground) layers, the signal integrity is greatly affected, and the EMI and EMC characteristics of the circuit also change. When the PCB is designed and wired, the situation of cross-division is inevitable because the wiring quantity is large and complicated. In order to solve the problem, a long-time layout engineer such as a PCB design completion wiring and a high-speed line needs to open a certain ETCH layer and an adjacent power (ground) layer to manually check whether the wiring is divided, but the manual check not only wastes time but also easily omits.
Disclosure of Invention
The invention aims to provide a method for automatically checking whether PCB design wiring is cross-segmented or not in Allegro software, so that a layout engineer is free from the complicated work of manual checking, and the aims of high efficiency and accuracy are fulfilled.
The invention is realized by the following technical scheme in order to realize the purpose.
A method for checking whether routing is cross-partitioned in PCB design includes the following steps:
classifying all routing wires according to the ETCH layer according to the PCB lamination;
detecting whether an adjacent layer of each ETCH layer is a PLANE layer;
the user selects an ETCH layer to be checked, and whether one section of complete cline coordinate is in a coordinate point area of PLANE is calculated;
if not, judging to be cross-partitioned and marking;
all ETCH layers to be checked are processed by the same method.
Preferably, the method further comprises the following steps before the step:
and modifying the configuration file of the computer software for directly modifying the background database of the Layout.
The invention has the advantages that: write into the Skill procedure the method of cutting apart whether striding the PCB wiring of inspection, use this Skill procedure, can be direct certain layer wiring appear striding the segmentation condition rather than adjacent layer, if have then highlight out, the engineer can directly look over the ETCH who is highlighted out and optimize, reduces the process of manual searching problem to improve work efficiency, avoid because of the omission mistake that manual inspection appears.
Drawings
Fig. 1 is a schematic diagram of a PCB stack in embodiment 1.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
A method for checking whether routing is cross-partitioned in PCB design includes the following steps:
s1 modifies the configuration file of the Allegro software,
and (2) putting the configuration file (alloguro) men in an Allegro installation path under a directory of \ Cadence \ SPB _16.6\ share \ pcb \ text \ cuimenus (the directory stores the menu configuration file of the alloguro software, and the menu interface of the software can be modified by modifying codes).
S2, adding a kill initialization file to automatically load the kill program when the Allegro software is started.
S3 starts the program, classifies all the traces according to the ETCH layer according to the PCB lamination, and names the traces with subclass name:
the PCB lamination is formed by stacking an ETCH layer and a PLANE layer in a specific sequence, wherein the ETCH layer is a wiring layer, the signal line is positioned on the layer, and the PLANE layer is a PLANE layer; the subcases are subclasses, things with different attributes of the PCB are divided under different subclasses, and the different subclasses are used for classifying the routing lines on different layers respectively through different names.
S4, detecting whether the adjacent layer of each ETCH layer is a PLANE layer, and displaying the name of the adjacent PLANE layer when the user selects the ETCH layer to be checked in the interactive interface;
the planar layer is divided into a VCC layer (power layer) and a GND layer (ground layer), and is subdivided to include GND1, GND2, GND3, GND4, GND5, GND6, GND7 and GND8 … … (VCC 1 and VCC 2). After the detected ETCH layer is selected, the program can automatically identify whether the adjacent layer is a PLANE layer or not, and if so, which adjacent layer is displayed.
S5 the user clicks check, and the program will perform the calculation. Whether a section of complete cline coordinates in the selected ETCH layer are all in the coordinate point area of PLANE, if not, the section of complete cline coordinates can be judged to be cross-segmented, and the cline section is highlighted;
and if all the complete clines in the whole ETCH layer are not subjected to cross segmentation, the situation that the complete clines are not subjected to the cross segmentation is the situation that the complete clines are not subjected to the cross segmentation in the layer. The position of a complete cliine is located by the coordinate values at the corners of this cliine. And connecting a positioning coordinate line to obtain the position of the whole segment of cline. Because the copper sheet areas with different shapes and different attributes are arranged in the adjacent PLANE layer, gaps exist among the different copper sheet areas, and if cliine crosses the gaps, the copper sheet areas are subjected to cross segmentation. Whether the cliine is subjected to cross segmentation can be judged by detecting whether the coordinates of all corners on the complete cliine are all in a certain copper sheet area of adjacent layer PLANE.
And the same processing method is adopted for the wiring of the other ETCH layer of S6.
The ETCH layer and PLANE are alternately stacked in the PCB stack shown in FIG. 1. When whether the routing of the SIG2 layer is split in a crossing mode is detected, the adjacent layers GND2 and GND3 are used as reference layers, and whether all corner coordinates of all complete cline in the SIG2 layer are on copper sheets vertically corresponding to the corner coordinates in GND2 and GND3 is detected. If all are present, it is said that no cross-partition exists.
Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that changes may be made in the embodiments and/or equivalents thereof without departing from the spirit and scope of the invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (2)

1. A method for checking whether routing is divided in a cross way in PCB design is characterized by comprising the following steps:
classifying all routing wires according to the ETCH layer according to the PCB lamination;
detecting whether an adjacent layer of each ETCH layer is a PLANE layer;
the user selects an ETCH layer to be checked, and whether one section of complete cline coordinate is in a coordinate point area of PLANE is calculated;
if not, judging to be cross-partitioned and marking;
all ETCH layers to be checked are processed by the same method.
2. The method of claim 1, further comprising, before the step of checking whether the routing is split or not:
and modifying the configuration file of the computer software for directly modifying the background database of the Layout.
CN202010472796.6A 2020-05-29 2020-05-29 Method for checking whether wiring is divided in cross mode in PCB design Pending CN111832246A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010472796.6A CN111832246A (en) 2020-05-29 2020-05-29 Method for checking whether wiring is divided in cross mode in PCB design

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010472796.6A CN111832246A (en) 2020-05-29 2020-05-29 Method for checking whether wiring is divided in cross mode in PCB design

Publications (1)

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CN111832246A true CN111832246A (en) 2020-10-27

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112685992A (en) * 2020-12-30 2021-04-20 浪潮电子信息产业股份有限公司 Skill-based method and system for quickly searching cross-plane routing

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112685992A (en) * 2020-12-30 2021-04-20 浪潮电子信息产业股份有限公司 Skill-based method and system for quickly searching cross-plane routing

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