CN111832088A

CN111832088A - Low-power-consumption mode data protection method and device for solid state disk, computer equipment and storage medium

Info

Publication number: CN111832088A
Application number: CN202010669747.1A
Authority: CN
Inventors: 冯通; 郭芳芳; 甘金涛; 冯元元
Original assignee: Shenzhen Union Memory Information System Co Ltd
Current assignee: Shenzhen Union Memory Information System Co Ltd
Priority date: 2020-07-13
Filing date: 2020-07-13
Publication date: 2020-10-27
Anticipated expiration: 2040-07-13
Also published as: CN111832088B

Abstract

The invention relates to a solid state disk low power consumption mode data protection method, a device, computer equipment and a storage medium; the method comprises the following steps: the CPU0 stores the log information of the solid state disk into the storage particles according to the low power consumption instruction issued by the host end; the CPU0 sends the self-defined instruction to the CPU1 and the CPU 2; the CPU0 refreshes the temporary data in the DRAM and the written data into the memory granules; the CPU0 judges whether or not the temporary data in the DRAM and the written data are all refreshed into memory particles; if yes, the CPU0 sets a low power consumption instruction completion flag to the CPU1 and the CPU 2; the CPU0 determines whether the low power consumption instruction completion flag is marked on the CPU1 and the CPU 2. The invention designs different data protection modes aiming at different modules, can flexibly store data, improve the data storage efficiency and effectively increase the stability and reliability of the system.

Description

Low-power-consumption mode data protection method and device for solid state disk, computer equipment and storage medium

Technical Field

The invention relates to the technical field of solid state disks, in particular to a method and a device for protecting low-power-consumption mode data of a solid state disk, computer equipment and a storage medium.

Background

The low power consumption mode is used as the most direct and effective function of controlling the power consumption of the solid state disk, and has very strict requirements on the basic functions of the solid state disk; power consumption, performance, stability and the like become factors for measuring the solid state disk of an enterprise, and the importance of a low power consumption function can be seen; the low power consumption function mainly aims at the hardware module to perform processing such as closing a working clock, powering down and the like so as to achieve the purpose of saving power consumption.

A solid state disk consists of many modules, for example: BM (Buffer Management space Management module), LDPC (Low-density Parity-check), DRAM (Dynamic Random Access Memory), and the like, in a Low power consumption mode, in order to save power consumption, a clock is turned off and power down processing is performed on each hardware module, and data is damaged to a great extent, so that data loss and system instability are caused, and a solid state disk system is crashed and a hardware module is damaged more seriously, so it is very important to design an effective data protection mechanism in the Low power consumption mode.

Disclosure of Invention

The invention aims to overcome the defects of the prior art and provides a method and a device for protecting low-power-consumption mode data of a solid state disk, computer equipment and a storage medium.

In order to achieve the purpose, the invention adopts the following technical scheme:

a solid state disk low power consumption mode data protection method is based on a solid state disk controlled by a CPU0, a CPU1 and a CPU 2; the method comprises the following steps:

the CPU0 stores the log information of the solid state disk into the storage particles according to the low power consumption instruction issued by the host end;

the CPU0 sends the self-defined instruction to the CPU1 and the CPU 2;

the CPU0 refreshes the temporary data in the DRAM and the written data into the memory granules;

the CPU0 judges whether or not the temporary data in the DRAM and the written data are all refreshed into memory particles;

if yes, the CPU0 sets a low power consumption instruction completion flag to the CPU1 and the CPU 2;

the CPU0 determines whether the low power consumption instruction completion flags are marked on the CPU1 and the CPU 2;

if yes, the CPU1 and the CPU2 set the PCIE link to enter a low power consumption mode;

the CPU1 and the CPU2 store the configuration and data of the PCIE physical layer and the data link layer to an SRAM power-fail-free area;

the CPU1 and the CPU2 reset the PCIE link and the PCIE physical layer;

the CPU1 and the CPU2 store the register and the configuration information of the NVME module in an SRAM power-failure-free area;

the CPU1 and the CPU2 reset the NVME module;

the CPU1 and the CPU2 close the clock of the solid state disk and do power-off processing;

the CPU0 obtains a command issued by the host, the CPU1 and the CPU2 control the solid state disk to exit the low power consumption mode, return to the normal operating state, and return to the step "the CPU0 stores the log information of the solid state disk into the storage granules according to the low power consumption command issued by the host".

The further technical scheme is as follows: before the step "the CPU0 sends the customized instruction to the CPU1 and the CPU 2", the method further includes: the CPU0 judges whether the log information of the solid state disk is stored in the storage particles or not; if the processing is finished, the processing flow goes to the step that the CPU0 sends the self-defined instruction to the CPU1 and the CPU 2; if not, returning to the step "the CPU0 saves the log information of the solid state disk to the storage granules according to the low power consumption instruction issued by the host".

The further technical scheme is as follows: the step "the CPU0 judges whether or not the temporary data in the DRAM and the written data are all refreshed in the memory granules", and if not, the CPU0 sets a low power consumption instruction non-completion flag to the CPU1 and the CPU2, and executes the step "the CPU0 judges whether or not the low power consumption instruction completion flag is marked on the CPU1 and the CPU 2".

The further technical scheme is as follows: in the step "the CPU0 judges whether the low power consumption instruction completion flags are marked on the CPU1 and the CPU 2", if not, the process returns to the step "the CPU0 sends the customized instruction to the CPU1 and the CPU 2".

Solid state disk low-power consumption mode data protection device includes: the device comprises an acquisition and storage unit, a sending unit, a refreshing unit, a first judging unit, a first setting unit, a second judging unit, a second setting unit, a first storage unit, a first resetting unit, a second storage unit, a second resetting unit, a closing unit and an acquisition and quitting return unit;

the acquisition and storage unit is used for storing the log information of the solid state disk into the storage particles by the CPU0 according to the low power consumption instruction issued by the host end;

the sending unit is used for sending the self-defined instruction to the CPU1 and the CPU2 by the CPU 0;

the refreshing unit is used for refreshing the temporary data and the written data in the DRAM into the memory particles by the CPU 0;

the first judgment unit is used for judging whether the temporary data and the written data in the DRAM are all refreshed into the memory particles or not by the CPU 0;

the first setting unit is used for setting a low-power-consumption instruction completion flag for the CPU1 and the CPU2 by the CPU 0;

the second judging unit is used for judging whether the low-power-consumption instruction completion marks are marked on the CPU1 and the CPU2 by the CPU 0;

the second setting unit is used for the CPU1 and the CPU2 to set the PCIE link to enter a low power consumption mode;

the first storage unit is used for storing the configuration and data of the PCIE physical layer and the data link layer to an SRAM power-fail-free area by the CPU1 and the CPU 2;

the first reset unit is used for resetting the PCIE link and the PCIE physical layer by the CPU1 and the CPU 2;

the second storage unit is used for storing the register and the configuration information of the NVME module into an SRAM non-power-down area by the CPU1 and the CPU 2;

the second reset unit is used for resetting the NVME module by the CPU1 and the CPU 2;

the closing unit is used for closing the clock of the solid state disk by the CPU1 and the CPU2 and performing power-off processing;

the obtaining and quitting return unit is used for the CPU0 to obtain a command issued by the host end, the CPU1 and the CPU2 control the solid state disk to quit the low power consumption mode, return to the normal working state, and return to the execution CPU0 to store the log information of the solid state disk into the storage particles according to the low power consumption command issued by the host end.

The further technical scheme is as follows: further comprising: and a third judging unit, configured to judge, by the CPU0, whether saving of the log information of the solid state disk into the storage granule is completed.

The further technical scheme is as follows: in the first judgment unit, if the temporary data and the written data in the DRAM are not all refreshed in the memory granule, the CPU0 sets a low power consumption instruction non-completion flag to the CPU1 and the CPU 2.

The further technical scheme is as follows: in the second determination unit, if the CPU1 and the CPU2 are not marked with the low power consumption instruction completion flag, the return execution CPU0 sends the self-defined instruction to the CPU1 and the CPU 2.

A computer device comprises a memory and a processor, wherein a computer program is stored on the memory, and the processor executes the computer program to realize the low power consumption mode data protection method of the solid state disk.

A storage medium storing a computer program comprising program instructions which, when executed by a processor, may implement the solid state disk low power mode data protection method as described above.

Compared with the prior art, the invention has the beneficial effects that: the method comprises the steps that log information of a solid state disk is stored in storage particles through a background, a front end sends a self-defined command for temporary data in a DRAM and data of the storage particles which are being written, the data are flushed into the storage particles, meanwhile, the state of a rear end is detected until the rear end is in an idle state, and when no data are written, processing such as clock closing is carried out; the data which are interacted with the host machine, such as a front-end link, NVME and the like, are stored in the SRAM without power failure of the chip, so that the data recovery time can be reduced, meanwhile, the state before entering low power consumption can be recovered quickly, different data protection modes are designed for different modules, the data can be stored flexibly, the data storage efficiency is improved, the stability and the reliability of a system can be effectively improved, and the requirement can be better met.

The invention is further described below with reference to the accompanying drawings and specific embodiments.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1 is a schematic flowchart of a data protection method in a low power consumption mode of a solid state disk according to an embodiment of the present invention;

fig. 2 is a schematic block diagram of a solid state disk low power consumption mode data protection apparatus according to an embodiment of the present invention;

FIG. 3 is a schematic block diagram of a computer device provided by an embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

Referring to the specific embodiment shown in fig. 1 to fig. 3, wherein, referring to fig. 1, the invention discloses a method for protecting data of a solid state disk in a low power consumption mode, comprising the following steps:

s1, the CPU0 stores the log information of the solid state disk into storage particles according to a low power consumption instruction issued by the host;

in this embodiment, the log information of the solid state disk is mainly smart information, security information, and the like.

S3, the CPU0 sends the self-defined instruction to the CPU1 and the CPU 2;

before step S3, the method further includes: step S2, the CPU0 determines whether the storage of the log information of the solid state disk into the storage granules is completed; if so, go to step S3; if not, the process returns to step S1.

When the log information of the solid state disk is not completely saved in the storage granules, the method returns to step S2 to perform full coverage again, so as to avoid the possibility of missing storage.

The self-defined instruction is that the CPU0 sends the instruction to the CPU1 and the CPU2 through the shared memory of the CPU0, the CPU1 and the CPU 2.

Further, the custom instructions are low power instructions generated by the CPU 0.

S4, the CPU0 refreshes the temporary data in the DRAM and the written data into the memory particles;

in the present embodiment, the CPU includes a CPU0, a CPU1, and a CPU2, where the CPU0 is a front end and the CPU1 and the CPU2 are a back end.

S5, the CPU0 determines whether all of the temporary data and written data in the DRAM are refreshed in the memory particles;

if not, the process advances to step S6, the CPU0 sets a low power consumption instruction uncompleted flag to the CPU1 and the CPU2, and the process advances to step S8.

S7, if yes, CPU0 sets a low power consumption instruction completion flag to CPU1 and CPU 2;

s8, the CPU0 determines whether the low power consumption instruction completion flag is marked on the CPU1 and the CPU 2; if not, return to step S3 "CPU 0 sends custom instructions to CPU1 and CPU 2".

S9, if yes, the CPU1 and the CPU2 set a PCIE (bus protocol) link to enter a low power consumption mode;

s10, the CPU1 and the CPU2 store the configuration and data of the PCIE physical layer and the data link layer to the SRAM power-off-free area;

the SRAM non-power-down area is a flash memory area which is arranged on the solid state disk and does not have power down.

S11, the CPU1 and the CPU2 reset the PCIE link and the PCIE physical layer;

in this embodiment, the reset is to restore to the initialization state, and the reset is cleared for subsequent processing of power failure or clock shutdown.

S12, the CPU1 and the CPU2 save the register and the configuration information of the NVME module to the SRAM power-off-free area;

s13, resetting the NVME module by the CPU1 and the CPU 2;

s14, the CPU1 and the CPU2 close the clock of the solid state disk and do power-off processing;

s15, the CPU0 obtains the command issued by the host, the CPU1 and the CPU2 control the solid state disk to exit the low power consumption mode and return to the normal working state, and the step S1 is returned to S1, wherein the CPU0 stores the log information of the solid state disk into the storage particles according to the low power consumption command issued by the host.

The method comprises the steps that log information of the solid state disk is stored in storage particles through a background, a front end sends a self-defined command for temporary data in a DRAM and data of the storage particles being written, the data are flushed into the storage particles, meanwhile, the state of a rear end is detected until the rear end is in an idle state, and when no data are written, processing such as clock closing is carried out; the data which are interacted with the host machine, such as a front-end link, NVME and the like, are stored in the SRAM without power failure of the chip, so that the data recovery time can be reduced, meanwhile, the state before entering low power consumption can be recovered quickly, different data protection modes are designed for different modules, the data can be stored flexibly, the data storage efficiency is improved, the stability and the reliability of a system can be effectively improved, and the requirement can be better met.

Referring to fig. 2, the present invention also discloses a solid state disk low power consumption mode data protection apparatus, including: an acquisition saving unit 10, a sending unit 30, a refreshing unit 40, a first judging unit 50, a first setting unit 60, a second judging unit 70, a second setting unit 80, a first saving unit 90, a first resetting unit 100, a second saving unit 110, a second resetting unit 120, a closing unit 130, and an acquisition exit returning unit 140;

the obtaining and storing unit 10 is configured to store, by the CPU0, log information of the solid state disk to the storage granules according to a low power consumption instruction issued by the host;

the sending unit 30 is used for sending the self-defined instruction to the CPU1 and the CPU2 by the CPU 0;

the refreshing unit 40 is used for refreshing the temporary data and the written data in the DRAM into the memory particles by the CPU 0;

the first judgment unit 50, which is used for the CPU0 to judge whether the temporary data in the DRAM and the written data are all refreshed into the memory granules;

the first setting unit 60, configured to set the low power consumption instruction completion flag to the CPU1 and the CPU2 by the CPU 0;

the second judging unit 70 is configured to judge, by the CPU0, whether a low power consumption instruction completion flag is marked on the CPU1 and the CPU 2;

the second setting unit 80 is configured to set the PCIE link to enter the low power consumption mode by the CPU1 and the CPU 2;

the first storage unit 90 is used for the CPU1 and the CPU2 to store the configuration and data of the PCIE physical layer and the data link layer to the SRAM non-power-down region;

the first reset unit 100 is configured to reset the PCIE link and the PCIE physical layer by the CPU1 and the CPU 2;

the second saving unit 110 is used for the CPU1 and the CPU2 to save the register and the configuration information of the NVME module to the SRAM non-power-down area;

the second reset unit 120 is used for resetting the NVME module by the CPU1 and the CPU 2;

the closing unit 130 is used for closing the clock of the solid state disk by the CPU1 and the CPU2 and performing power-off processing;

the obtaining and exiting return unit 140 is configured to obtain a command issued by the host by the CPU0, control the solid state disk to exit the low power consumption mode by the CPU1 and the CPU2, return to a normal operating state, and return to the execution CPU0 to store the log information of the solid state disk in the storage granule according to the low power consumption command issued by the host.

Wherein, this solid state hard drives low power consumption mode data protection device still includes: and a third judging unit 20 for the CPU0 to judge whether the saving of the log information of the solid state disk into the memory granules is completed.

In the first judging unit 50, if all the temporary data and written data in the DRAM are not refreshed in the memory granules, the CPU0 sets a low power consumption instruction non-completion flag to the CPU1 and the CPU 2.

In the second determination unit 70, if the CPU1 and the CPU2 are not marked with the low power consumption instruction completion flag, the return execution CPU0 sends the customized instruction to the CPU1 and the CPU 2.

It should be noted that, as can be clearly understood by those skilled in the art, the specific implementation process of the solid state disk low power consumption mode data protection apparatus and each unit may refer to the corresponding description in the foregoing method embodiment, and for convenience and brevity of description, no further description is provided herein.

The data protection device in the low power consumption mode of the solid state disk can be implemented in the form of a computer program, and the computer program can be run on a computer device as shown in fig. 3.

Referring to fig. 3, fig. 3 is a schematic block diagram of a computer device according to an embodiment of the present application; the computer device 500 may be a terminal or a server, where the terminal may be an electronic device with a communication function, such as a smart phone, a tablet computer, a notebook computer, a desktop computer, a personal digital assistant, and a wearable device. The server may be an independent server or a server cluster composed of a plurality of servers.

Referring to fig. 3, the computer device 500 includes a processor 502, memory, and a network interface 505 connected by a system bus 501, where the memory may include a non-volatile storage medium 503 and an internal memory 504.

The non-volatile storage medium 503 may store an operating system 5031 and a computer program 5032. The computer programs 5032 include program instructions that, when executed, cause the processor 502 to perform a solid state disk low power mode data protection method.

The processor 502 is used to provide computing and control capabilities to support the operation of the overall computer device 500.

The internal memory 504 provides an environment for the operation of the computer program 5032 in the non-volatile storage medium 503, and when the computer program 5032 is executed by the processor 502, the processor 502 may be enabled to execute a solid state disk low power mode data protection method.

The network interface 505 is used for network communication with other devices. Those skilled in the art will appreciate that the configuration shown in fig. 3 is a block diagram of only a portion of the configuration associated with the present application and does not constitute a limitation of the computer device 500 to which the present application may be applied, and that a particular computer device 500 may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.

It should be understood that, in the embodiment of the present Application, the Processor 502 may be a Central Processing Unit (CPU), and the Processor 502 may also be other general-purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field-Programmable Gate arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components, and the like. Wherein a general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

It will be understood by those skilled in the art that all or part of the flow of the method implementing the above embodiments may be implemented by a computer program instructing associated hardware. The computer program includes program instructions, and the computer program may be stored in a storage medium, which is a computer-readable storage medium. The program instructions are executed by at least one processor in the computer system to implement the flow steps of the embodiments of the method described above.

Accordingly, the present invention also provides a storage medium. The storage medium may be a computer-readable storage medium. The storage medium stores a computer program, wherein the computer program comprises program instructions which, when executed by a processor, can implement the solid state disk low power mode data protection method described above.

The storage medium may be a usb disk, a removable hard disk, a Read-Only Memory (ROM), a magnetic disk, or an optical disk, which can store various computer readable storage media.

Those of ordinary skill in the art will appreciate that the elements and algorithm steps of the examples described in connection with the embodiments disclosed herein may be embodied in electronic hardware, computer software, or combinations of both, and that the components and steps of the examples have been described in a functional general in the foregoing description for the purpose of illustrating clearly the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative. For example, the division of each unit is only one logic function division, and there may be another division manner in actual implementation. For example, various elements or components may be combined or may be integrated into another system, or some features may be omitted, or not implemented.

The steps in the method of the embodiment of the invention can be sequentially adjusted, combined and deleted according to actual needs. The units in the device of the embodiment of the invention can be merged, divided and deleted according to actual needs. In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a storage medium. Based on such understanding, the technical solution of the present invention essentially or partially contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a terminal, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention.

The technical contents of the present invention are further illustrated by the examples only for the convenience of the reader, but the embodiments of the present invention are not limited thereto, and any technical extension or re-creation based on the present invention is protected by the present invention. The protection scope of the invention is subject to the claims.

Claims

1. A solid state disk low power consumption mode data protection method is based on a solid state disk controlled by a CPU0, a CPU1 and a CPU 2; the method is characterized by comprising the following steps:

the CPU0 sends the self-defined instruction to the CPU1 and the CPU 2;

the CPU1 and the CPU2 reset the PCIE link and the PCIE physical layer;

the CPU1 and the CPU2 reset the NVME module;

2. The method for protecting data in low power consumption mode of solid state disk according to claim 1, wherein before the step "CPU 0 sends customized command to CPU1 and CPU 2", the method further comprises: the CPU0 judges whether the log information of the solid state disk is stored in the storage particles or not; if the processing is finished, the processing flow goes to the step that the CPU0 sends the self-defined instruction to the CPU1 and the CPU 2; if not, returning to the step "the CPU0 saves the log information of the solid state disk to the storage granules according to the low power consumption instruction issued by the host".

3. The solid state disk low power consumption mode data protection method of claim 1, wherein the step "CPU 0 judges whether all temporary data in DRAM and written data are refreshed into memory granules", if not, CPU0 sets a low power consumption instruction non-completion flag to CPU1 and CPU2, and executes the step "CPU 0 judges whether the low power consumption instruction completion flag is marked on CPU1 and CPU 2".

4. The method for protecting data in low power consumption mode of solid state disk according to claim 1, wherein said step "CPU 0 judges whether or not the low power consumption instruction completion flag is marked on CPU1 and CPU 2", and if not, returns to the step "CPU 0 sends the customized instruction to CPU1 and CPU 2".

5. Solid state disk low-power consumption mode data protection device, its characterized in that includes: the device comprises an acquisition and storage unit, a sending unit, a refreshing unit, a first judging unit, a first setting unit, a second judging unit, a second setting unit, a first storage unit, a first resetting unit, a second storage unit, a second resetting unit, a closing unit and an acquisition and quitting return unit;

6. The solid state disk low power consumption mode data protection device of claim 5, further comprising: and a third judging unit, configured to judge, by the CPU0, whether saving of the log information of the solid state disk into the storage granule is completed.

7. The solid state disk low power consumption mode data protection device of claim 5, wherein in the first judgment unit, if the temporary data in the DRAM and the written data are not all refreshed in the memory granules, the CPU0 sets a low power consumption command unfinished flag to the CPU1 and the CPU 2.

8. The solid state disk low power consumption mode data protection device of claim 5, wherein in the second determination unit, if no low power consumption instruction completion flag is marked on the CPU1 and the CPU2, the return execution CPU0 sends a self-defined instruction to the CPU1 and the CPU 2.

9. A computer device, characterized in that the computer device comprises a memory and a processor, the memory stores a computer program, and the processor implements the method for protecting data in low power consumption mode of a solid state disk according to any one of claims 1 to 4 when executing the computer program.

10. A storage medium storing a computer program comprising program instructions which, when executed by a processor, implement the method of data protection in low power mode of a solid state disk according to any one of claims 1 to 4.