CN111913836B - Solid state disk low power consumption mode data recovery method and device, computer equipment and storage medium - Google Patents

Solid state disk low power consumption mode data recovery method and device, computer equipment and storage medium Download PDF

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Publication number
CN111913836B
CN111913836B CN202010753506.5A CN202010753506A CN111913836B CN 111913836 B CN111913836 B CN 111913836B CN 202010753506 A CN202010753506 A CN 202010753506A CN 111913836 B CN111913836 B CN 111913836B
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data
cpu0
unit
recovery
information
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CN111913836A (en
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冯通
贾宗铭
王伟良
冯元元
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Shenzhen Union Memory Information System Co Ltd
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Shenzhen Union Memory Information System Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1471Saving, restoring, recovering or retrying involving logging of persistent data for recovery
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1032Simple parity
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)

Abstract

The invention relates to a method and a device for recovering low-power-consumption mode data of a solid state disk, computer equipment and a storage medium; the method comprises the following steps: the CPU0 controls the solid state disk to exit from the low power consumption mode and starts a hardware data carrying function; the CPU0 recovers Pcie data and Nvme data stored in the SRAM power failure-free area through a hardware data carrying function; the CPU0 checks the Pdie data and the Nvme data; the CPU0 judges whether the Pdie data and the Nvme data pass the verification; if the data passes the data processing function, the CPU0 closes the hardware data handling function; the CPU0 acquires the trigger of the host to control the Pcie to exit from the low power consumption mode, and the Pcie restores to a normal working state; and the CPU0 reloads the firmware of the solid state disk. The invention designs different data recovery mechanisms aiming at the exit process with low power consumption, and simultaneously increases parity check so as to ensure the stability and reliability of data.

Description

Solid state disk low power consumption mode data recovery method and device, computer equipment and storage medium
Technical Field
The invention relates to the technical field of solid state disk data recovery, in particular to a solid state disk low power consumption mode data recovery method and device, computer equipment and a storage medium.
Background
The low power consumption mode is used as the most direct and effective function of controlling the power consumption of the solid state disk, and has very strict requirements on the basic functions of the solid state disk; the power consumption, the performance, the stability and the like become standards for evaluating the quality of the solid state disk by enterprises, and the importance of the low power consumption function can be seen. The low power consumption function mainly aims at the hardware module to perform processing such as closing a working clock, powering off and the like so as to achieve the purpose of saving power consumption. Therefore, after the solid state disk is awakened again, the solid state disk can be restored to the state before the solid state disk enters the low power consumption state, and the solid state disk can work normally.
The solid state disk is composed of a plurality of modules, the process of restarting and powering on is also very complicated, the exit of the low power consumption mode and the powering on restart are very similar, but the essential difference exists, but the actions of powering on the hardware module, reloading firmware, the hardware module, initializing a software structure and the like are involved, and for low power consumption, the data recovery is inevitably involved when the state before the low power consumption is recovered, so that the design of a data recovery mechanism is very important.
As shown in fig. 1, an application scenario of hardware startup of an existing solid state disk takes three cores as an example: the firmware involves DMAC (Direct Memory Access Controller) hardware in the loading process and directly loads the burned firmware to the ATCM (static random access Memory) of the three cores (SRAM area for storing the firmware), after the firmware is started, the firmware involves a plurality of modules, including: platform, pceie, nvme, NFC (NAND Flash Controller), FSM (software state machine), feature and other modules are initialized, which also indicates that the data of the previous state can be cleared and set as default values, and when the firmware is reloaded in the low power consumption mode, much data are cleared, so that the stability and reliability of the data cannot be ensured.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a method and a device for recovering low-power-consumption mode data of a solid state disk, computer equipment and a storage medium.
In order to achieve the purpose, the invention adopts the following technical scheme:
a low-power-consumption mode data recovery method of a solid state disk is based on the solid state disk controlled by a CPU0, a CPU1 and a CPU 2; the method comprises the following steps:
the CPU0 controls the solid state disk to exit from the low power consumption mode and starts a hardware data carrying function;
the CPU0 recovers Pcie data and Nvme data stored in the SRAM power failure-free area through a hardware data carrying function;
the CPU0 checks the Pdie data and the Nvme data;
the CPU0 judges whether the Pdie data and the Nvme data pass the verification;
if the data passes the data processing function, the CPU0 closes the hardware data handling function;
the CPU0 acquires the trigger of the host to control the Pcie to exit from the low power consumption mode, and the Pcie restores to a normal working state;
CPU0 pair solid state disk reloading the firmware;
the CPU0 configures a hardware drive and a working mode of the solid state disk;
CPU0 restores the log information from NAND to DRAM1;
the CPU0 restores mapping table information from the NAND to the DRAM2 of the CPU 1;
the CPU0 recovers the characteristic information of the Nvme from the NAND to the DRAM3 of the CPU 0;
CPU0 restores the command information from the NAND to the DRAMs 4 of CPU0, CPU1 and CPU 2;
the CPU0 checks the log information of the DRAM1, the mapping table information of the DRAM2, the characteristic information of the Nvme of the DRAM3 and the command information of the DRAM4;
the CPU0 judges whether the log information of the DRAM1, the mapping table information of the DRAM2, the characteristic information of the Nvme of the DRAM3 and the command information of the DRAM4 pass the verification or not;
if yes, the CPU0 judges whether log information for generating data abnormal recovery exists; if yes, returning to the step of recovering the log information from the NAND to the DRAM1 by the CPU 0;
if not, the solid state disk returns to the normal working state.
The further technical scheme is as follows: in the step of verifying the Pdie data and the Nvme data by the CPU0, the CPU0 verifies the Pdie data and the Nvme data through parity check.
The further technical scheme is as follows: in the step "the CPU0 judges whether the Pcie data and the Nvme data pass the verification", the method further includes: if not, the CPU0 records the data abnormity recovery module information and the working states of the CPU0, the CPU1 and the CPU2, generates log information of the data abnormity recovery, saves the log information of the data abnormity recovery into the NAND, and executes the step of closing the hardware carrying data function by the CPU 0.
The further technical scheme is as follows: the step "the CPU0 determines whether the log information of the DRAM1, the mapping table information of the DRAM2, the Nvme feature information of the DRAM3, and the command information of the DRAM4 pass the verification", further includes: if not, the CPU0 records the data abnormal recovery module information and the working states of the CPU0, the CPU1 and the CPU2, generates log information of the data abnormal recovery, saves the log information of the data abnormal recovery into the NAND, and executes the step of judging whether the log information of the data abnormal recovery is generated by the CPU 0.
Solid state disk low-power consumption mode data recovery device includes: the system comprises an exit opening unit, a storage unit, a first checking unit, a first judgment unit, a closing unit, an acquisition recovery unit, a loading unit, a configuration unit, a first recovery unit, a second recovery unit, a third recovery unit, a fourth recovery unit, a second checking unit, a second judgment unit, a third judgment unit and a return unit;
the exit starting unit is used for the CPU0 to control the solid state disk to exit from the low power consumption mode and start a hardware data carrying function;
the storage unit is used for recovering Pcie data and Nvme data stored in the SRAM power failure-free area through a hardware data carrying function by the CPU 0;
the first checking unit is used for checking the Pdie data and the Nvme data by the CPU 0;
the first judging unit is used for judging whether the Pceie data and the Nvme data pass the verification or not by the CPU 0;
the closing unit is used for closing the hardware data carrying function by the CPU 0;
the acquisition and recovery unit is used for the CPU0 to acquire the trigger of the host to control the Pdie to exit from the low power consumption mode and the Pdie to recover to a normal working state;
the loading unit is used for the CPU0 to reload the firmware of the solid state disk;
the configuration unit is used for configuring the hardware drive and the working mode of the solid state disk by the CPU 0;
the first recovery unit is used for recovering the log information from the NAND to the DRAM1 by the CPU 0;
the second recovery unit is used for recovering mapping table information from the NAND to the DRAM2 of the CPU1 by the CPU 0;
the third recovery unit is used for recovering the characteristic information of the Nvme from the NAND by the CPU0 to the DRAM3 of the CPU 0;
the fourth recovery unit is used for recovering the command information from the NAND by the CPU0 to the DRAMs 4 of the CPU0, the CPU1 and the CPU 2;
the second checking unit is used for checking the log information of the DRAM1, the mapping table information of the DRAM2, the characteristic information of the Nvme of the DRAM3 and the command information of the DRAM4 by the CPU 0;
the second judging unit is used for judging whether the log information of the DRAM1, the mapping table information of the DRAM2, the characteristic information of the Nvme of the DRAM3 and the command information of the DRAM4 pass the verification or not by the CPU 0;
the third judging unit is used for judging whether log information for generating data abnormal recovery exists or not by the CPU 0;
and the return unit is used for returning the solid state disk to a normal working state.
The further technical scheme is as follows: in the first check unit, the CPU0 checks the Pcie data and the Nvme data through parity check.
The further technical scheme is as follows: further comprising: and the first record storage unit is used for recording the data abnormity recovery module information and the working states of the CPU0, the CPU1 and the CPU2 by the CPU0, generating the log information of the data abnormity recovery and storing the log information of the data abnormity recovery into the NAND.
The further technical scheme is as follows: further comprising: and the second record storage unit is used for recording the data abnormity recovery module information and the working states of the CPU0, the CPU1 and the CPU2 by the CPU0, generating the log information of the data abnormity recovery and storing the log information of the data abnormity recovery into the NAND.
A computer device comprises a storage and a processor, wherein a computer program is stored on the storage, and the processor executes the computer program to realize the data recovery method of the low power consumption mode of the solid state disk.
A storage medium storing a computer program comprising program instructions which, when executed by a processor, may implement the solid state disk low power mode data recovery method as described above.
Compared with the prior art, the invention has the beneficial effects that: different data recovery mechanisms are designed aiming at the exit process with low power consumption, and parity check is added, so that the stability and reliability of data are ensured, and the functions of completely recovering Pcie data and Nvme data, reloading firmware, recovering the normal working state of hardware and the like can be realized; meanwhile, the method has the characteristics of being capable of recovering a logical-physical mapping table and the like and completing the recovery of the working state before entering low power consumption; moreover, parity check is carried out on the recovered data, abnormal data in the recovery process are stored in the storage particles (NAND) in a logging mode, and when the solid state disk normally works, a user-defined solid state disk command is adopted to obtain abnormal data information, so that problem location is conveniently carried out, and the requirement can be better met.
The invention is further described below with reference to the accompanying drawings and specific embodiments.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is an application scenario of hardware startup of a conventional solid state disk;
fig. 2 is a schematic flowchart of a method for recovering low-power-consumption mode data of a solid state disk according to an embodiment of the present invention;
fig. 3 is a schematic block diagram of a solid state disk low power consumption mode data recovery apparatus according to an embodiment of the present invention;
fig. 4 is a schematic block diagram of a computer device provided in an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used in the specification of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
Referring to the specific embodiment shown in fig. 2 to 4, in which, referring to fig. 2, the invention discloses a method for recovering low-power mode data of a solid state disk, comprising the following steps:
s1, a CPU0 controls a solid state disk to exit from a low power consumption mode and starts a hardware data carrying function;
s2, the CPU0 recovers Pcie data and Nvme data stored in the SRAM power failure-free area through a hardware data carrying function;
s3, the CPU0 verifies the Pdie data and the Nvme data;
in the step of verifying the Pcie data and the Nvme data by the CPU0, the CPU0 verifies the Pcie data and the Nvme data through parity check, and the verification is simple and wide in application.
S4, the CPU0 judges whether the Pcie data and the Nvme data pass the verification;
if the data is not passed, the process goes to step S5, the CPU0 records the data abnormality recovery module information and the operating states of the CPU0, the CPU1 and the CPU2, generates log information of the data abnormality recovery, stores the log information of the data abnormality recovery into the NAND, and executes step S6, that is, the CPU0 turns off the hardware transport data function.
S6, if the data passes through the data processing function, the CPU0 closes the hardware data carrying function;
s7, the CPU0 acquires the trigger of the host to control the Pcie to exit from the low power consumption mode, and the Pcie restores to a normal working state;
s8, the CPU0 reloads the firmware of the solid state disk;
s9, configuring a solid state disk hardware drive and a working mode by the CPU 0;
s10, the CPU0 recovers the log information from the NAND to the DRAM1;
s11, the CPU0 restores mapping table information from the NAND to the DRAM2 of the CPU 1;
s12, the CPU0 recovers the characteristic information of the Nvme from the NAND to the DRAM3 of the CPU 0;
s13, the CPU0 restores the command information from the NAND to the DRAMs 4 of the CPU0, the CPU1 and the CPU 2;
s14, the CPU0 checks the log information of the DRAM1, the mapping table information of the DRAM2, the characteristic information of the Nvme of the DRAM3 and the command information of the DRAM4;
in the step of checking the log information of the DRAM1, the mapping table information of the DRAM2, the Nvme feature information of the DRAM3, and the command information of the DRAM4 by the CPU0, the CPU0 checks the log information of the DRAM1, the mapping table information of the DRAM2, the Nvme feature information of the DRAM3, and the command information of the DRAM4 by parity check, and the check is simple and widely applicable.
S15, the CPU0 judges whether the log information of the DRAM1, the mapping table information of the DRAM2, the characteristic information of the Nvme of the DRAM3 and the command information of the DRAM4 pass the verification or not;
if the data is not passed, the process goes to step S16, the CPU0 records the data abnormality recovery module information and the operating states of the CPU0, the CPU1 and the CPU2, generates log information of the data abnormality recovery, stores the log information of the data abnormality recovery into the NAND, and executes the step "the CPU0 determines whether there is log information of the data abnormality recovery.
S17, if the log information passes the judgment, the CPU0 judges whether log information for generating data abnormal recovery exists; if yes, returning to step S10, namely that the CPU0 recovers the log information from the NAND to the DRAM1;
and S18, if not, returning the solid state disk to the normal working state.
According to the method, different data recovery mechanisms are designed for a low-power-consumption exit process, and parity check is added, so that the stability and reliability of data are ensured, and functions of completely recovering Pcie data and Nvme data, reloading firmware, recovering a normal working state of hardware and the like can be realized; meanwhile, the method has the characteristics of being capable of recovering a logical-physical mapping table and the like to finish recovering the working state before entering low power consumption; moreover, parity check is carried out on the recovered data, abnormal data in the recovery process are stored in the storage particles (NAND) in a logging mode, and when the solid state disk normally works, a user-defined solid state disk command is adopted to obtain abnormal data information, so that problem location is conveniently carried out, and the requirement can be better met.
Referring to fig. 3, the present invention also discloses a solid state disk low power consumption mode data recovery device, including: the system comprises a quit opening unit 10, a saving unit 20, a first checking unit 30, a first judging unit 40, a closing unit 60, an acquisition restoring unit 70, a loading unit 80, a configuration unit 90, a first restoring unit 100, a second restoring unit 110, a third restoring unit 120, a fourth restoring unit 130, a second checking unit 140, a second judging unit 150, a third judging unit 170 and a returning unit 180;
the exit starting unit 10 is used for the CPU0 to control the solid state disk to exit from the low power consumption mode and start a hardware data carrying function;
the storage unit 20 is used for the CPU0 to restore the Pcie data and Nvme data stored in the SRAM non-power-down area through the hardware data handling function;
the first verifying unit 30 is configured to verify the Pcie data and the Nvme data by the CPU 0;
the first judging unit 40 is configured to judge, by the CPU0, whether the Pcie data and the Nvme data pass verification;
the closing unit 60 is configured to close the hardware data handling function by the CPU 0;
the acquiring and recovering unit 70 is used for the CPU0 to acquire the host trigger control Pnie to exit from the low power consumption mode, and the Pnie recovers to a normal working state;
the loading unit 80 is used for the CPU0 to reload the firmware of the solid state disk;
the configuration unit 90 is used for configuring the hardware drive and the working mode of the solid state disk by the CPU 0;
the first recovery unit 100, which is used for the CPU0 to recover the log information from the NAND to the DRAM1;
the second recovery unit 110, configured to recover mapping table information from the NAND to the DRAM2 of the CPU1 by the CPU 0;
the third recovery unit 120 is configured to recover, by the CPU0, the feature information of the Nvme from the NAND to the DRAM3 of the CPU 0;
the fourth restoring unit 130, which is used for the CPU0 to restore the command information from the NAND to the DRAMs 4 of the CPU0, the CPU1 and the CPU 2;
the second checking unit 140 is configured to check, by the CPU0, the log information of the DRAM1, the mapping table information of the DRAM2, the feature information of the Nvme of the DRAM3, and the command information of the DRAM4;
the second determining unit 150 is configured to determine, by the CPU0, whether the log information of the DRAM1, the mapping table information of the DRAM2, the Nvme feature information of the DRAM3, and the command information of the DRAM4 pass the verification;
the third judging unit 170, configured to judge, by the CPU0, whether there is log information for generating data abnormal recovery;
the returning unit 180 is used for returning the solid state disk to a normal working state.
In the first checking unit 30, the CPU0 checks the Pcie data and the Nvme data through parity.
Wherein, the device still includes: the first record saving unit 50 is configured to record the data abnormality recovery module information and the operating states of the CPU0, the CPU1, and the CPU2 by the CPU0, generate log information of the data abnormality recovery, and save the log information of the data abnormality recovery into the NAND.
Wherein, the device still includes: and a second record saving unit 160, configured to record the data abnormality recovery module information and the operating states of the CPU0, the CPU1, and the CPU2 by the CPU0, generate log information of the data abnormality recovery, and save the log information of the data abnormality recovery into the NAND.
It should be noted that, as can be clearly understood by those skilled in the art, the specific implementation processes of the solid state disk low power consumption mode data recovery apparatus and each unit may refer to the corresponding descriptions in the foregoing method embodiments, and for convenience and brevity of description, no further description is provided herein.
The solid state disk low power consumption mode data recovery apparatus may be implemented in the form of a computer program, and the computer program may be run on a computer device as shown in fig. 4.
Referring to fig. 4, fig. 4 is a schematic block diagram of a computer device according to an embodiment of the present application; the computer device 500 may be a terminal or a server, where the terminal may be an electronic device with a communication function, such as a smart phone, a tablet computer, a notebook computer, a desktop computer, a personal digital assistant, and a wearable device. The server may be an independent server or a server cluster composed of a plurality of servers.
Referring to fig. 4, the computer device 500 includes a processor 502, memory, and a network interface 505 connected by a system bus 501, where the memory may include a non-volatile storage medium 503 and an internal memory 504.
The non-volatile storage medium 503 may store an operating system 5031 and a computer program 5032. The computer programs 5032 include program instructions that, when executed, cause the processor 502 to perform a solid state disk low power mode data recovery method.
The processor 502 is used to provide computing and control capabilities to support the operation of the overall computer device 500.
The internal memory 504 provides an environment for the operation of the computer program 5032 in the non-volatile storage medium 503, and when the computer program 5032 is executed by the processor 502, the processor 502 may be enabled to execute a solid state disk low power mode data recovery method.
The network interface 505 is used for network communication with other devices. Those skilled in the art will appreciate that the configuration shown in fig. 4 is a block diagram of only a portion of the configuration associated with the present application and does not constitute a limitation of the computer device 500 to which the present application may be applied, and that a particular computer device 500 may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.
It should be understood that in the embodiment of the present Application, the Processor 502 may be a Central Processing Unit (CPU), and the Processor 502 may also be other general-purpose processors, digital Signal Processors (DSPs), application Specific Integrated Circuits (ASICs), field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components, and the like. Wherein a general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
It will be understood by those skilled in the art that all or part of the flow of the method implementing the above embodiments may be implemented by a computer program instructing associated hardware. The computer program includes program instructions, and the computer program may be stored in a storage medium, which is a computer-readable storage medium. The program instructions are executed by at least one processor in the computer system to implement the flow steps of the embodiments of the method described above.
Accordingly, the present invention also provides a storage medium. The storage medium may be a computer-readable storage medium. The storage medium stores a computer program, wherein the computer program comprises program instructions, which when executed by a processor, can implement the solid state disk low power consumption mode data recovery method described above.
The storage medium may be a usb disk, a removable hard disk, a Read-Only Memory (ROM), a magnetic disk, or an optical disk, which can store various computer readable storage media.
Those of ordinary skill in the art will appreciate that the various illustrative components and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the components and steps of the various examples have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative. For example, the division of each unit is only one logic function division, and there may be another division manner in actual implementation. For example, various elements or components may be combined or may be integrated into another system, or some features may be omitted, or not implemented.
The steps in the method of the embodiment of the invention can be sequentially adjusted, combined and deleted according to actual needs. The units in the device of the embodiment of the invention can be merged, divided and deleted according to actual needs. In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a storage medium. Based on such understanding, the technical solution of the present invention essentially or partially contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a terminal, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention.
The technical contents of the present invention are further illustrated by the examples only for the convenience of the reader, but the embodiments of the present invention are not limited thereto, and any technical extension or re-creation based on the present invention is protected by the present invention. The protection scope of the invention is subject to the claims.

Claims (4)

1. A low-power-consumption mode data recovery method of a solid state disk is based on the solid state disk controlled by a CPU0, a CPU1 and a CPU 2; the method is characterized by comprising the following steps:
the CPU0 controls the solid state disk to exit from the low power consumption mode and starts a hardware data carrying function;
the CPU0 recovers Pcie data and Nvme data stored in the SRAM power failure-free area through a hardware data carrying function;
the CPU0 checks the Pdie data and the Nvme data;
the CPU0 judges whether the Pdie data and the Nvme data pass the verification;
if the data passes the data processing function, the CPU0 closes the hardware data handling function;
the CPU0 acquires the trigger of the host to control the Pcie to exit from the low power consumption mode, and the Pcie restores to a normal working state;
the CPU0 reloads the firmware of the solid state disk;
the CPU0 configures a hardware drive and a working mode of the solid state disk;
CPU0 restores the log information from NAND to DRAM1;
the CPU0 restores mapping table information from the NAND to the DRAM2 of the CPU 1;
the CPU0 recovers the characteristic information of the Nvme from the NAND to the DRAM3 of the CPU 0;
CPU0 restores the command information from the NAND to the DRAMs 4 of CPU0, CPU1 and CPU 2;
the CPU0 checks the log information of the DRAM1, the mapping table information of the DRAM2, the characteristic information of the Nvme of the DRAM3 and the command information of the DRAM4;
the CPU0 judges whether the log information of the DRAM1, the mapping table information of the DRAM2, the characteristic information of the Nvme of the DRAM3 and the command information of the DRAM4 pass the verification;
if yes, the CPU0 judges whether log information for generating data abnormal recovery exists; if yes, returning the CPU0 to recover the log information from the NAND to the DRAM1;
if not, the solid state disk returns to the normal working state;
during the verification of the Pdie data and the Nvme data by the CPU0, the Pdie data and the Nvme data are verified by the CPU0 through parity check;
the CPU0 judges whether the Pcie data and the Nvme data pass the verification, and the method further comprises the following steps: if the data is not passed through, the CPU0 records the data abnormity recovery module information and the working states of the CPU0, the CPU1 and the CPU2, generates log information of the data abnormity recovery, stores the log information of the data abnormity recovery into the NAND, and executes the function of closing the hardware carrying data of the CPU 0;
the CPU0 determines whether the log information of the DRAM1, the mapping table information of the DRAM2, the Nvme feature information of the DRAM3, and the command information of the DRAM4 pass the verification, and further includes: if the data is not passed through, the CPU0 records the data abnormity recovery module information and the working states of the CPU0, the CPU1 and the CPU2, generates log information of the data abnormity recovery, saves the log information of the data abnormity recovery into the NAND, and executes the CPU0 to judge whether the log information of the data abnormity recovery is generated.
2. Solid state disk low-power consumption mode data recovery device, its characterized in that includes: the device comprises an exit opening unit, a storage unit, a first checking unit, a first judging unit, a closing unit, an acquisition recovery unit, a loading unit, a configuration unit, a first recovery unit, a second recovery unit, a third recovery unit, a fourth recovery unit, a second checking unit, a second judging unit, a third judging unit and a returning unit;
the exit opening unit is used for controlling the solid state disk to exit from the low power consumption mode by the CPU0 and opening a hardware data carrying function;
the storage unit is used for recovering Pcie data and Nvme data stored in the SRAM power failure-free area through a hardware data carrying function by the CPU 0;
the first checking unit is used for checking the Pdie data and the Nvme data by the CPU 0;
the first judging unit is used for judging whether the Pcie data and the Nvme data pass the verification or not by the CPU 0;
the closing unit is used for closing the hardware data carrying function by the CPU 0;
the acquisition and recovery unit is used for the CPU0 to acquire the trigger of the host to control the Pdie to exit from the low power consumption mode and the Pdie to recover to a normal working state;
the loading unit is used for the CPU0 to reload the firmware of the solid state disk;
the configuration unit is used for configuring the hardware drive and the working mode of the solid state disk by the CPU 0;
the first recovery unit is used for recovering the log information from the NAND to the DRAM1 by the CPU 0;
the second recovery unit is used for recovering mapping table information from the NAND to the DRAM2 of the CPU1 by the CPU 0;
the third recovery unit is used for recovering the characteristic information of the Nvme from the NAND by the CPU0 to the DRAM3 of the CPU 0;
the fourth recovery unit is used for recovering the command information from the NAND by the CPU0 to the DRAMs 4 of the CPU0, the CPU1 and the CPU 2;
the second checking unit is used for checking the log information of the DRAM1, the mapping table information of the DRAM2, the characteristic information of the Nvme of the DRAM3 and the command information of the DRAM4 by the CPU 0;
the second judging unit is used for judging whether the log information of the DRAM1, the mapping table information of the DRAM2, the characteristic information of the Nvme of the DRAM3 and the command information of the DRAM4 pass the verification or not by the CPU 0;
the third judging unit is used for judging whether log information for generating data abnormal recovery exists or not by the CPU 0;
the return unit is used for returning the solid state disk to a normal working state;
in the first check unit, a CPU0 checks Pceie data and Nvme data through parity check;
further comprising: the first record storage unit is used for recording the data abnormity recovery module information and the working states of the CPU0, the CPU1 and the CPU2 by the CPU0, generating the log information of the data abnormity recovery and storing the log information of the data abnormity recovery into the NAND;
further comprising: and the second record saving unit is used for recording the data abnormity recovery module information and the working states of the CPU0, the CPU1 and the CPU2 by the CPU0, generating the log information of the data abnormity recovery and saving the log information of the data abnormity recovery into the NAND.
3. A computer device, characterized in that the computer device comprises a memory and a processor, the memory stores a computer program, and the processor implements the method for recovering data in low power consumption mode of solid state disk according to claim 1 when executing the computer program.
4. A storage medium storing a computer program comprising program instructions which, when executed by a processor, implement the solid state disk low power mode data recovery method of claim 1.
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