CN111819787B

CN111819787B - Crystal calibration method, chip and Bluetooth headset

Info

Publication number: CN111819787B
Application number: CN202080001624.9A
Authority: CN
Inventors: 林飞
Original assignee: Shenzhen Goodix Technology Co Ltd
Current assignee: Shenzhen Goodix Technology Co Ltd
Priority date: 2020-01-03
Filing date: 2020-01-03
Publication date: 2023-12-15
Anticipated expiration: 2040-01-03
Also published as: WO2021134783A1; CN111819787A

Abstract

A crystal calibration method, a chip and a Bluetooth headset are provided. The method comprises the following steps: acquiring a count difference of at least one pulse signal, wherein the at least one pulse signal comprises a pulse signal generated by the crystal based on at least one parameter of a plurality of parameters, and the count difference of each pulse signal is a difference between system tick count values based on the corresponding pulse signal acquired by using two external interrupts triggered by a reference pulse signal; determining a target parameter based on the count difference of the at least one pulse signal; and determining the pulse signal generated based on the target parameter as a pulse signal after crystal calibration. The target parameter is determined through the counting difference value of the at least one pulse signal, so that automatic calibration of the pulse signal can be realized, the labor cost is reduced, and the calibration efficiency can be improved while the complexity of a calibration mechanism is reduced.

Description

Crystal calibration method, chip and Bluetooth headset

Technical Field

Embodiments of the present application relate to the field of electronics, and more particularly, to a method, chip, and bluetooth headset for crystal alignment.

Background

When the singlechip is operated, a pulse signal is needed to be used as a trigger signal for executing the instruction. In general, the pulse signal is generated by adopting a crystal externally connected with an application circuit of the singlechip and an external capacitor connected with the crystal. The crystal has a nominal load capacitance value, and the frequency of the pulse signal generated by the crystal is most accurate when the load capacitance value is close to or equal to the real capacitance value of the external capacitance.

However, the material parameters of the same batch are not completely consistent, and fluctuation of the material parameters can lead to variation of product parameters such as load capacitance of the same batch of crystals produced by the same manufacturer, capacitance of the same batch of external capacitors produced by the same manufacturer and the like within a certain range, so that the frequency of pulse signals generated by the crystals is not accurate enough.

Disclosure of Invention

The crystal calibration method, the chip and the Bluetooth headset are provided, and can realize automatic crystal calibration.

In a first aspect, a method of crystal alignment is provided, suitable for use with a chip having a crystal, the method comprising:

acquiring a count difference of at least one pulse signal, wherein the at least one pulse signal comprises a pulse signal generated by the crystal based on at least one parameter of a plurality of parameters, and the count difference of each pulse signal is a difference between system tick count values based on the corresponding pulse signal acquired by using two external interrupts triggered by a reference pulse signal;

Determining a target parameter based on the count difference of the at least one pulse signal;

and determining the pulse signal generated based on the target parameter as a pulse signal after crystal calibration.

The target parameter is determined through the counting difference value of the at least one pulse signal, so that automatic calibration of the pulse signal can be realized, the labor cost is reduced, and the calibration efficiency can be improved while the complexity of a calibration mechanism is reduced.

In some possible implementations, the acquiring the count difference of the at least one pulse signal includes:

and obtaining the count difference value of the at least one pulse signal by using a dichotomy.

The counting difference value of at least one pulse signal is obtained through the two differentiation, so that the counting difference value of all pulse signals is prevented from being obtained, the total amount of the counting difference values required to be obtained is reduced, the calibration accuracy is ensured, the calibration efficiency is improved, and the time cost is reduced.

In some possible implementations, the acquiring the count difference of the at least one pulse signal using a dichotomy includes:

determining a minimum parameter and a maximum parameter of a plurality of parameters;

generating a first pulse signal and a second pulse signal based on the minimum parameter and the maximum parameter, respectively;

Respectively acquiring a first count difference value of the first pulse signal and a second count difference value of the second pulse signal;

wherein determining the target parameter based on the count difference of the at least one pulse signal comprises:

the target parameter is determined based on the first count difference and the second count difference.

In some possible implementations, the determining the target parameter based on the first count difference and the second count difference includes:

and determining the average value of the minimum parameter and the maximum parameter as the target parameter under the condition that the average value of the first count difference value and the second count difference value is equal to a preset count difference value.

when the average value of the first count difference value and the second count difference value is larger than the preset count difference value, adding 1 to the average value of the minimum parameter and the maximum parameter to determine the first parameter;

generating a third pulse signal based on the first parameter;

acquiring a third counting difference value of the third pulse signal;

The target parameter is determined based on the third count difference and the second count difference.

subtracting one from the average value of the minimum parameter and the maximum parameter to determine the second parameter under the condition that the average value of the first count difference and the second count difference is smaller than the preset count difference;

generating a fourth pulse signal based on the second parameter;

acquiring a fourth count difference value of the fourth pulse signal;

the target parameter is determined based on the fourth count difference and the first count difference.

acquiring a plurality of pulse signals respectively generated by the crystal based on the plurality of parameters;

acquiring a plurality of counting difference values corresponding to the pulse signals;

wherein the determining the target parameter based on the count difference of the at least one pulse signal comprises:

obtaining a target count difference value closest to a preset count difference value in the plurality of count difference values by using a dichotomy;

And determining the parameter corresponding to the target counting difference value as the target parameter.

The target counting difference value is obtained through a dichotomy, so that the comparison of the preset counting difference value and the counting difference value of each pulse signal in a traversal mode is avoided, the calculated amount of a chip is reduced, the calibration efficiency is improved, and the time cost is reduced.

In some possible implementations, the method further includes:

the plurality of count differences are ordered in ascending or descending order.

In some possible implementations, the parameter values of the plurality of parameters decrease as the frequency of the pulse signal increases.

By defining the characteristics of the plurality of parameters, the acquired differential value counts can be automatically sequenced from large to small or from small to large, the step of re-sequencing the plurality of differential value counts after the plurality of differential value counts are acquired is avoided, and the time cost of the calibration pulse signal is effectively reduced on the basis of acquiring the target parameters or the target differential value counts through a dichotomy.

In some possible implementations, the parameter values of the plurality of parameters are inversely proportional to the frequency of the pulse signal.

And sequentially acquiring the count difference value of at least one pulse signal according to the ascending order or the descending order of the parameter values.

In some possible implementations, the method further includes:

and receiving a calibration signaling sent by the test equipment by using a Universal Serial Bus (USB) to serial port and a Universal Asynchronous Receiver Transmitter (UART) HUB (HUB), wherein the calibration signaling is used for triggering the chip to calibrate crystals.

In some possible implementations, the calibration signaling includes the plurality of parameters.

In some possible implementations, the method further includes:

the plurality of parameters are stored to a register so as to be transmitted to the crystal by controlling the register.

The register triggers the crystal to generate the pulse signal to be calibrated, namely the register is responsible for and controls the operation of the crystal to generate the signal to be calibrated, so that the work load of the chip is reduced, and the work efficiency of the chip for calibrating the pulse signal is effectively improved.

In some possible implementations, the method further includes:

storing a calibration result to the register, the calibration result being used to indicate the target parameter.

In some possible implementations, the method further includes:

And transmitting a calibration result and/or a count difference value of the at least one pulse signal to the test equipment by using the Universal Serial Bus (USB) to serial port and the Universal Asynchronous Receiver Transmitter (UART) HUB HUB, wherein the calibration result is used for indicating the target parameter, and the count difference value of the at least one pulse signal is used for comparing the test equipment with a preset count difference value on a display interface.

And sending the counting difference value of the at least one pulse signal to the test equipment, so that a user can observe the corresponding relation between each counting difference value of the counting difference values of the at least one pulse signal and the preset counting difference value on a display interface of the test equipment, and the user can conveniently and manually adjust the target counting difference value so as to realize an automatic calibration and manual calibration matching calibration mechanism. Similarly, by sending the calibration results to the test equipment, it is convenient for the designer to perform batch calibration and adjust the parameter design.

acquiring a plurality of count differences of each pulse signal in the at least one pulse signal;

And determining at least one counting difference value which is temporally later in a plurality of counting differences of each pulse signal in the at least one pulse signal as the counting difference value of the corresponding pulse signal.

Therefore, the counting difference value corresponding to each pulse signal can be accurately obtained, and accordingly, the calibration accuracy of the pulse signals can be improved. In other words, after each pulse signal in the at least one pulse signal is tested, the count difference value corresponding to each pulse signal is obtained, so that inaccuracy of the count difference value of the pulse signal measured under the condition of unstable system or unstable crystal can be avoided, and accuracy of the count difference value and calibration accuracy of the pulse signal can be improved.

In some possible implementations, the method further includes:

the reference pulse signal generated with the calibrated application system is received.

The application system triggers the calibrated chip to generate the reference pulse signal, so that the structure of the chip can be simplified and the hardware cost can be reduced on the basis of acquiring the reference pulse signal.

In some possible implementations, the reference pulse signal is a pulse width modulated PWM signal.

In some possible implementations, the chip is a bluetooth low energy BLE chip.

In a second aspect, there is provided a chip comprising:

a crystal for generating at least one pulse signal based on at least one of the plurality of parameters;

a processing unit connected to the crystal, the processing unit configured to:

acquiring a count difference value of the at least one pulse signal, wherein the count difference value of each pulse signal in the at least one pulse signal is a difference value between system tick count values based on the corresponding pulse signal, which are acquired by using two external interrupts triggered by a reference pulse signal;

In some possible implementations, the processing unit is specifically configured to:

In some possible implementations, the processing unit is more specifically configured to:

generating a third pulse signal based on the first parameter;

acquiring a third counting difference value of the third pulse signal;

Generating a fourth pulse signal based on the second parameter;

acquiring a fourth count difference value of the fourth pulse signal;

In some possible implementations, the processing unit is further configured to:

In some possible implementations, the chip further includes:

the USB to serial port and UART HUB are connected to the processing unit through the UART HUB, the processing unit receives calibration signaling sent by the testing equipment through the USB to serial port and the UART HUB, and the calibration signaling is used for triggering the chip to calibrate crystals.

In some possible implementations, the chip further includes:

a register, through which the processing unit is connected to the crystal, the processing unit being configured to store the plurality of parameters to the register so as to send the plurality of parameters to the crystal by controlling the register.

In some possible implementations, the processing unit is further configured to store a calibration result to the register, the calibration result being used to indicate the target parameter.

In some possible implementations, the chip further includes:

the USB converting serial port is connected to the processing unit through the UART HUB, the processing unit sends a calibration result and/or a counting difference value of at least one pulse signal to the testing equipment through the USB converting serial port and the UART HUB, the calibration result is used for indicating the target parameter, and the counting difference value of the at least one pulse signal is used for comparing the testing equipment with a preset counting difference value on a display interface.

In some possible implementations, the chip is a bluetooth low energy BLE chip.

In a third aspect, a bluetooth headset is provided, including:

a chip as described in the second aspect or any one of the possible implementations of the second aspect.

Drawings

FIG. 1 is a schematic diagram of a system architecture of an embodiment of the present application.

Fig. 2 is a schematic flow chart of a method of crystal alignment according to an embodiment of the application.

Fig. 3 is another schematic flow chart of a method of crystal alignment of an embodiment of the application.

Fig. 4 is a schematic block diagram of a chip of an embodiment of the application.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings.

The method according to the embodiment of the application can be applied to various crystals (also called resonators) and various chips or electronic devices with the crystals. For example, a crystal element of IC constituting an oscillation circuit is added inside the package. The method can also be applied to crystal oscillators (also known as oscillators). The crystal may also be referred to as a passive crystal oscillator and the crystal oscillator may also be referred to as an active crystal oscillator. For example, a crystal oscillator is understood to be a combination of the crystal and the capacitance to which the crystal is connected.

For another example, the chip may be a Single-chip (Single-Chip Microcomputer) or an integrated circuit chip. For example, the chip may be a small and sophisticated microcomputer system using very large scale integrated circuit technology to integrate functions such as a central processing unit (Central Processing Unit, CPU) with data processing capability, random access Memory (Random Access Memory, RAM), read Only Memory (ROM), various I/O ports and interrupt systems, timers/counters, etc. (possibly including display driver circuitry, pulse width modulation circuitry, analog multiplexer, a/D converters, etc.) onto a single piece of silicon.

Wherein, the crystal can generate pulse signals through the cooperation of the capacitor connected with the crystal. In this embodiment, the capacitor connected to the crystal may be integrated into the chip, and the capacitance value may be sized in a configurable state. For example, the capacitance value is made into a plurality of parameters for representing the capacitance value configured so that the crystal in the chip can generate a plurality of pulse signals based on the plurality of parameters, respectively. For example, the crystals in the chip may generate pulse signals at a plurality of frequencies, respectively, based on a plurality of parameters of the configuration. At this time, the user can adjust the frequency of the pulse signal by modifying the magnitude of the capacitance value (i.e., modifying the parameters of the configuration). Because of the consistency of components in each circuit, each product needs to be set with an optimal capacitance value before being put into use, so that the frequency of the pulse signal meets the application requirement. The crystal calibration involved in embodiments of the present application may refer to the process of obtaining this optimal capacitance value (or optimal parameter) before the chip is put into use. Of course, the above crystal calibration may include a post-repair calibration or test to determine if the product performs or runs its function in accordance with the original product specifications.

FIG. 1 is a schematic block diagram of a system architecture of an embodiment of the present application.

As shown in fig. 1, the system architecture 100 may include a test device 110, an intermediate device or system 120, and a chip 130. The test device 110 may be configured to take care of the initiation or triggering of the entire calibration procedure, for example, to issue parameters for generating a pulse signal to an intermediate device or system 120 for forwarding to the chip 130. The test device 110 may also be used to display calibration results. The intermediate device or system 120 may also be used to generate a reference pulse signal. The chip 130 may compare the reference pulse signal generated by the intermediary device or system 120 with a pulse signal generated by a crystal in the chip 130 to be calibrated to determine a calibration result. The chip 130 may also send the calibration results to the test device 110 via the intermediary device or system 120 so that the test device 110 displays the calibration results.

The test equipment 110 may also be referred to as a calibration tool or test platform. For example, the test device may be a personal computer or a personal computer (Personal Computer, PC). Such as conventional desktop computers, DIY computers, notebook computers, and tablet computers, all-in-one computers, ultrabooks, palm computers, embedded computers, etc., which have begun to prevail in recent years.

In some embodiments of the application, the test device 110 may include a universal asynchronous receiver Transmitter (Universal Asynchronous Receiver/Transmitter, UART) 111. The UART111 converts information or data to be transmitted between serial communication and parallel communication. For example, a chip that converts a parallel input signal into a serial output signal, the UART111 may be integrated on a connection of a communication interface of the test device 110. The test device 110 may send a reference pulse signal trigger command to the intermediate device or system 120 through the UART111, where the reference pulse signal trigger command is used to trigger the intermediate device or system 120 to generate at least one reference pulse signal. For example, the reference pulse signal trigger command is used to trigger the intermediary device or system 120 to generate a reference pulse signal.

The intermediate device or system 120 may be a physical device separate from the test device 110 and the chip 130, or may be a device or application integrated on the test device 110 or chip.

In some embodiments of the present application, the intermediate device or system 120 may further include an application system 121 for generating a reference pulse signal. For example, the application 121 may generate 16 reference pulse signals. For example, the reference pulse signal may be a clock signal (CLK), that is, CLK … CLK16. Optionally, the intermediate device or system 120 may include a universal serial bus (Universal Serial Bus, USB) to serial port 122 for converting the USB interface of the test device 110 into a universal serial port, so as to quickly receive information or data sent by the test device 110. For example, the USB-to-serial port 122 may convert one serial port to a 4 serial port. Optionally, the test equipment may further comprise a universal asynchronous receiver transmitter hub (Universal Asynchronous Receiver/TransmitterHub, UARTHUB) 123, and the uarttyb 123 may be used to split the received signal into multiple serial ports. For example, the uarttyb 123 may be used to convert the received 4-way serial port into 16-way serial port. I.e. the uartuhub 123 may be connected to a UART1 … UART 16 serial port. For example, the intermediate device or system 120 may broadcast the information to be transmitted to the chip 130 through the UART1 … UART 16 serial port.

The serial port may also be called a serial interface, a serial communication interface, or a serial communication interface (e.g., COM interface), and is an expansion interface adopting a serial communication method. The Serial Interface (Serial Interface) sequentially transmits data bit by bit, and has a simple communication line, so that bidirectional communication can be realized (telephone lines can be directly used as transmission lines).

The chip 130 may be referred to as a device under test (Device Under Test, DUT), which is also referred to as a device under test (EUT) and a Unit Under Test (UUT). The device under test may be an article of manufacture that is tested at the time of first manufacture or later in its lifecycle. The chip 130 may be any type of chip including a crystal or a crystal oscillator. For example, the chip 130 may be a bluetooth low energy (Bluetooth Low Energy, BLE) chip, which may also be referred to as a bluetooth low energy chip.

In some embodiments of the present application, the chip 130 may include a crystal 131, and the crystal 131 is used to generate a pulse signal so that the chip 130 can operate normally. Optionally, the chip 130 may further include a processing unit 132, which may be used to perform a crystal calibration procedure, i.e. to determine whether the pulse signal to be calibrated can reach the desired frequency, or to compare the pulse signal to be calibrated with a reference pulse signal. Optionally, the chip 130 may further include a register 133, where the register 133 is used to store parameters for generating the pulse signal. During calibration, the processing unit 132 may send parameters to be calibrated to the crystal by controlling the register 133 so that the crystal generates a corresponding pulse signal.

It should be noted that, in the framework of fig. 1, the intermediate device or system 120 may generate 16 reference signals (i.e. CLK1 … CLK 16) at the same time, and the intermediate device or system 120 may send information or data through 16 serial ports (UART 1 … UART 16 serial ports). In other words, the frame 100 shown in fig. 1 may be used to calibrate 16 chips simultaneously, wherein the chip 130 may be one of the 16 chips. Of course, in actual operation, one or more chips may be calibrated according to the requirement, or reference pulse signals (or UART serial ports) smaller than 16 paths or larger than 16 paths may be set.

Fig. 2 is a schematic flow chart of a method 200 of crystal calibration of the own embodiment. The method 200 is applicable to the crystal 131 or the chip 130 shown in fig. 1, and is also applicable to the system frame 100, and for ease of understanding, the method will be described below by taking the execution body of the method 200 as an example. Such as a bluetooth low energy (Bluetooth Low Energy, BLE) chip.

As shown in fig. 2, the method 200 described above may include:

s210, acquiring a count difference value of at least one pulse signal, wherein the at least one pulse signal comprises a pulse signal generated by the crystal based on at least one parameter of a plurality of parameters, and the count difference value of each pulse signal in the at least one pulse signal is a difference value between system tick count values based on the corresponding pulse signal acquired by using two external interrupts triggered by a reference pulse signal.

S220, determining a target parameter based on the count difference of the at least one pulse signal.

And S230, determining the pulse signal generated based on the target parameter as the pulse signal after crystal calibration.

In short, after the crystal in the chip generates at least one pulse signal based on the obtained at least one parameter, the processing unit of the chip may determine a count difference value of the at least one pulse signal (i.e., each pulse signal in the at least one pulse signal is a clock signal, obtain two count values output by the system tick counter through two external interrupts triggered by the reference pulse signal, and take a difference value of the two count values as a count difference value of the same pulse signal), and then determine a calibration result (i.e., the target parameter) based on the count difference value of the at least one pulse signal. Wherein the frequency of the pulse signal generated by the crystal based on the target parameter best meets an expected frequency. The calibration result may be used to indicate the target parameter or a pulse signal generated based on the target parameter, or the calibration result may also be used to indicate a count difference corresponding to the target parameter.

The reference pulse signal may be a pulse signal generated by the application system 121 shown in fig. 1 triggering other calibrated chips.

In some embodiments of the application, the method 200 may further comprise:

the chip receives the reference pulse signal generated with the calibrated application system.

Of course, embodiments of the present application are not limited thereto. For example, in other alternative embodiments, a high precision reference pulse signal may also be provided by a hardware circuit integrated with a field programmable gate array (Field Programmable Gate Array, FPGA) or complex programmable logic device (Complex Programmable Logic Device, CPLD).

The reference pulse signal may be any pulse signal whose accuracy reaches a condition. For example, the reference pulse signal may be a pulse width modulated (Pulse Width Modulation, PWM) signal. The signal may be modulated by an analog control to generate the PWM signal. For example, the desired waveform (including shape and amplitude) can be equivalent by modulating the width of the pulse, and further digitally encoding the analog signal level to generate information or data that can be used for transmission. For example, the change in signal, energy, etc. may be adjusted by adjusting the change in duty cycle. The duty cycle may refer to the percentage of the total signal period that the signal is at a high level during one period, for example, the duty cycle of a square wave is 50%.

In some embodiments of the application, the PWM signal may be generated directly by an internal module of the chip. For example, the PWM signal may be generated by the chip 130 or the application system 121 shown in fig. 1. For example, the I/O interface of the chip 130 may be provided with an integrated module. In other words, the chip 130 may be provided with a functional module with PWM signal output in a program. The I/O interface may be a link for exchanging information between the chip 130 and the controlled object. The chip 130 may exchange data with external devices through an I/O interface. The I/O interface may be a programmable interface, i.e. the manner in which the I/O interface operates may be controlled by a program.

The method for obtaining the count difference of at least one pulse signal by the chip in the embodiment of the application is described below.

In some embodiments of the application, application system 121 may be a system that has been calibrated using a spectrometer prior to performing crystal calibration, the clock frequency accuracy having reached a more accurate state than a standard protocol (e.g., BLE standard protocol). In practice, the application system 121 may generate a precise PWM signal with a certain frequency (e.g., 40 Hz) to the chip 130. Chip 130 de-samples the PWM signal generated by application 121 via an I/O interface that may be used as an external interrupt input. The calibration process may be performed within chip 130, driven by the PWM signal generated by application 121.

Taking the traversing manner to obtain a plurality of count differences corresponding to the plurality of pulse signals as an example, referring to fig. 1, when the test device 110 sends a serial port instruction to start the calibration process, the chip 130 writes a parameter (i.e. a parameter for generating the pulse signal) into the register 133. For example, the parameter may be a bias value. For another example, the initial value of the bias value may be 0. The chip 130 may then calculate and record the difference in system tick count between the two external interrupts (assuming that the clock frequency of the system tick is set to 64M, if the crystal is calibrated, the clock frequency of the system tick would be infinitely close to 64M, when the clock frequency of the system tick is 64M, the difference in system tick count between the two external interrupts triggered by the PWM signal at 40Hz should be 1600000, i.e., the preset count difference may be 1600000), then parameter +1 is written into the register 133, the difference in system tick count between the two external interrupts is calculated again and recorded, and the parameters for calibrating all the crystals are traversed, and the parameter corresponding to the closest 1600000 difference in system tick count value is found to be the target parameter for crystal calibration (which may be used to reflect the calibration result).

It should be noted that, the register may trigger the crystal to generate the calibrated pulse signal based on the target parameter, for example, the register may modify (or adjust) the capacitance value of the capacitor connected to the crystal to the capacitance value corresponding to the target parameter based on the target parameter, so as to generate the calibrated pulse signal. In other words, the plurality of parameters correspond to the plurality of configured capacitance values, respectively. For example, the plurality of parameters are in one-to-one correspondence with the plurality of capacitance values. And selecting the target parameter from the multiple parameters as an optimal parameter, so that the pulse signal generated based on the capacitance value corresponding to the target parameter is the pulse signal which is most in line with expectations (namely, the most accurate).

In the above process, a traversal method is adopted to test each possible parameter, and then the optimal parameter is selected as a calibration result. The application reduces the time cost, reduces the sampling number of the parameter or the counting difference value, can determine the target parameter only through the counting difference value of the at least one pulse signal, can realize the automatic calibration of the pulse signal, reduces the labor cost, and can improve the calibration efficiency while reducing the complexity of a calibration mechanism.

In some embodiments of the present application, the S210 may include:

For example, at least one sampling parameter may be obtained from the plurality of parameters by a dichotomy, and then a count difference of at least one pulse signal is obtained based on the at least one pulse signal respectively generated by the at least one sampling parameter.

In other words, the chip may sample a plurality of parameters based on a dichotomy, then generate a pulse signal based on the sampled parameters, and then perform crystal calibration based on a count difference of the pulse signal. Alternatively, the chip may sample the plurality of parameters based on a dichotomy, and then determine whether to continue sampling based on the count difference of the acquired pulse signals.

In some embodiments of the application, the chip may first determine a minimum parameter and a maximum parameter of the plurality of parameters; generating a first pulse signal and a second pulse signal respectively based on the minimum parameter and the maximum parameter; then respectively obtaining a first count difference value of the first pulse signal and a second count difference value of the second pulse signal; the chip may then determine the target parameter based on the first count difference and the second count difference.

For example, the chip may determine the target parameter by comparing a preset count difference with an average of the first count difference and the second count difference.

The preset count difference may be a count difference corresponding to a preset pulse signal, that is, the preset count difference may be a difference between system tick count values based on a calibrated pulse signal obtained by using two external interrupts triggered by a reference pulse signal. The preset count difference may be a preset count difference or a preset count difference, and of course, may also be a count difference measured in the calibration process, which is not limited in the embodiment of the present application.

In other words, the chip may first take the maximum parameter and the minimum parameter as sampling parameters in the plurality of parameters, so as to acquire the pulse signal based on the sampling parameters, and then determine whether to continue acquiring the sampling parameters in the plurality of parameters based on the average value of the first count difference value and the second count.

For example, in the case where the average value of the first count difference and the second count difference is equal to a preset count difference, the average value of the minimum parameter and the maximum parameter may be determined as the target parameter. In other words, the chip need not acquire the sampling parameters after acquiring the first count difference and the second count difference.

For another example, in the case where the average value of the first count difference value and the second count difference value is greater than the preset count difference value, the average value of the minimum parameter and the maximum parameter may be increased by 1 to be determined as the first parameter; generating a third pulse signal based on the first parameter; acquiring a third counting difference value of the third pulse signal; the target parameter is determined based on the third count difference and the second count difference. In other words, after the chip obtains the first count difference value and the second count difference value, the chip also needs to use a dichotomy to take the first parameter as a sampling parameter to obtain the third pulse signal. Optionally, the plurality of parameters are consecutive parameters. Optionally, the plurality of parameters includes the first parameter. Optionally, among the plurality of parameters, parameter values of the plurality of parameters decrease with an increase in count difference of the pulse signal; alternatively, the parameter values of the plurality of parameters increase as the count difference of the pulse signal decreases.

The sampling parameters are determined in the multiple parameters by a dichotomy, so that under the condition of ensuring the calibration accuracy, the sampling parameters are reduced, namely pulse signals required to be generated are reduced, the counting difference required to be measured is also reduced, the calibration efficiency can be effectively improved, and the calibration time can be shortened.

For another example, in the case that the average value of the first count difference value and the second count difference value is smaller than the preset count difference value, the average value of the minimum parameter and the maximum parameter may be subtracted by one to determine as the second parameter; generating a fourth pulse signal based on the second parameter; acquiring a fourth count difference value of the fourth pulse signal; the target parameter is determined based on the fourth count difference and the first count difference. In other words, after the chip obtains the first count difference value and the second count difference value, the second parameter needs to be used as a sampling parameter by a dichotomy to obtain the fourth pulse signal. Optionally, the plurality of parameters are consecutive parameters. Optionally, the plurality of parameters includes the second parameter. Optionally, among the plurality of parameters, parameter values of the plurality of parameters decrease with an increase in count difference of the pulse signal; alternatively, the parameter values of the plurality of parameters increase as the count difference of the pulse signal decreases.

In summary, the counting difference value of at least one pulse signal is obtained by using the two differentiation, so that the counting difference value of all pulse signals is avoided, the total amount of the counting difference values required to be obtained is reduced, the calibration accuracy is ensured, the calibration efficiency is improved, and the time cost is reduced.

Fig. 3 is a schematic flow chart of a method 300 of crystal alignment in an embodiment of the application.

As shown in fig. 3, the method 300 may include some or all of the following:

s310, the chip acquires the minimum parameter and the maximum parameter.

S320, the chip generates a first pulse signal and a second pulse signal based on the minimum parameter and the maximum parameter, and determines whether the first pulse signal and the second pulse signal have been triggered by the reference pulse signal and are externally interrupted?

S330, if the first pulse signal and the second pulse signal are respectively triggered to be interrupted externally through the reference pulse signal, the chip acquires a count difference value of the first pulse signal and a count difference value of the second pulse signal. If the first pulse signal or the second pulse signal is not triggered by the reference pulse signal, the external interrupt is returned to S320 and executed.

S340, is the chip already acquired the difference between the 5 counts of the first pulse signal and the difference between the 5 counts of the second pulse signal?

S350, if the chip has acquired the 5 times of count difference values of the first pulse signal and the 5 times of count difference values of the second pulse signal, the chip determines an average value of the last 3 times of count difference values in the 5 times of count difference values of the first pulse signal as a first count difference value corresponding to the first pulse signal; and determining the average value of the last 3 count difference values in the 5 count difference values of the second pulse signal as a second count difference value corresponding to the second pulse signal. If the chip does not acquire the difference value of the 5 counts of the first pulse signal or the difference value of the 5 counts of the second pulse signal, the process returns to S320 and is executed.

S360, is the minimum parameter less than the maximum parameter?

S390, if the minimum parameter is equal to the maximum parameter, the chip determines the minimum parameter or the maximum parameter as a target parameter.

S370, if the minimum parameter is smaller than the maximum parameter, determining whether the average value of the first count difference and the second count difference is equal to a preset count difference?

S371, if the average value of the first count difference value and the second count difference value is equal to a preset count difference value, the chip determines the average value of the minimum parameter and the maximum parameter as a target parameter.

S380, if the average value of the first count difference and the second count difference is not equal to the preset count difference, determining whether the average value of the first count difference and the second count difference is greater than the preset count difference?

And S381, if the average value of the first count difference value and the second count difference value is larger than the preset count difference value, the chip re-determines the average value of the minimum parameter and the maximum parameter plus 1 as the minimum parameter, returns to S320 and executes.

And S382, if the average value of the first count difference value and the second count difference value is smaller than the preset count difference value, the chip redetermines the average value of the minimum parameter and the maximum parameter minus 1 as the maximum parameter, returns to S320 and executes.

S390, calibration is finished.

In other embodiments of the present application, the S210 may include:

At this time, the chip may first obtain a plurality of count difference values corresponding to the plurality of pulse signals; then, a target counting difference value closest to a preset counting difference value in the plurality of counting difference values is obtained by a dichotomy; and finally, determining the parameter corresponding to the target counting difference value as the target parameter.

In some embodiments of the application, the method 200 may further comprise:

In other words, after the chip obtains the plurality of count difference values, the plurality of count difference values are arranged in an ascending order or a descending order, and then a target count difference value closest to the preset count difference value is found by a dichotomy based on the arranged set of count difference values.

For example, the chip may first determine a set of the plurality of count differences as a first set of differences; the target count difference is then determined using a dichotomy within the first set of differences. The count differences within the first set of differences are ordered in ascending or descending order.

At this time, the chip may first determine a count difference of intermediate positions in the first difference set; and determining the counting difference value of the middle position as the target counting difference value under the condition that the counting difference value of the middle position is equal to the preset counting difference value. And if the first difference value is combined with the first difference value to be sorted in descending order, determining the target count difference value in the first half section of the first difference value set. And if the first difference value is combined with the first difference value to be sorted in descending order, determining the target count difference value in the second half section of the first difference value set.

In some embodiments of the application, the parameter values of the plurality of parameters decrease with increasing frequency of the pulse signal.

For example, the parameter values of the plurality of parameters are inversely proportional to the frequency of the pulse signal.

In other words, the parameter values of the plurality of parameters decrease as the count difference of the pulse signal increases. For example, the parameter values of the plurality of parameters are inversely proportional to the count difference of the pulse signals.

In other words, the parameter values of the plurality of parameters are reduced with the increase of the frequency of the pulse signal, so that the parameter values of the plurality of parameters are reduced with the increase of the count difference of the pulse signal, or so that the parameter values of the plurality of parameters are increased with the decrease of the count difference of the pulse signal, so that the chip determines the target parameter or the target count difference using the dichotomy.

In some embodiments of the present application, the S210 may include:

In some embodiments of the application, the method 200 may further comprise:

and receiving a calibration signaling sent by the test equipment by using the USB to serial port and the UART HUB, wherein the calibration signaling is used for triggering the chip to calibrate crystals.

In some embodiments of the application, the calibration signaling includes the plurality of parameters.

In some embodiments of the application, the method 200 may further comprise:

and transmitting a calibration result and/or a count difference value of the at least one pulse signal to the test equipment by using the USB serial port and the UART HUB, wherein the calibration result is used for indicating the target parameter, and the count difference value of the at least one pulse signal is used for comparing the test equipment with a preset count difference value at a display interface.

In some embodiments of the present application, the S210 may include:

In addition, the application also provides a chip which can be used for executing the method 200 or 300.

Fig. 4 is a schematic block diagram of a chip 400 according to an embodiment of the application. The chip 400 may be the chip 130 shown in fig. 1.

As shown in fig. 4, the chip 400 may include:

a crystal 410 for generating a plurality of pulse signals based on a plurality of parameters, respectively;

a processing unit 420, the processing unit 420 being connected to the crystal 410, the processing unit 420 being configured to:

acquiring at least one pulse signal generated by the crystal 410 based on at least one parameter of a plurality of parameters;

acquiring a count difference of at least one pulse signal, wherein the count difference of each pulse signal in the at least one pulse signal is a difference value between system tick count values based on the corresponding pulse signal acquired by using two external interrupts triggered by a reference pulse signal;

the pulse signal generated based on the target parameter is determined as a pulse signal after calibration of the crystal 410.

In some embodiments of the present application, the processing unit 420 is specifically configured to:

In some embodiments of the present application, the processing unit 420 is more specifically configured to:

generating a third pulse signal based on the first parameter;

acquiring a third counting difference value of the third pulse signal;

generating a fourth pulse signal based on the second parameter;

acquiring a fourth count difference value of the fourth pulse signal;

acquiring a plurality of pulse signals respectively generated by the crystal 410 based on the plurality of parameters;

In some embodiments of the application, the processing unit 420 is further configured to:

In some embodiments of the application, the parameter values of the plurality of parameters are inversely proportional to the frequency of the pulse signal.

In some embodiments of the application, the chip further comprises:

the USB to serial port and UART HUB are connected to the processing unit 420, the processing unit 420 receives the calibration signaling sent by the test equipment through the USB to serial port and the UART HUB, and the calibration signaling is used for triggering the chip to calibrate the crystal 410.

In some embodiments of the application, the chip further comprises:

a register through which the processing unit 420 is connected to the crystal 410, the processing unit 420 being configured to store the plurality of parameters to the register so as to transmit the plurality of parameters to the crystal 410 by controlling the register.

In some embodiments of the application, the processing unit 420 is further configured to store a calibration result to the register, the calibration result being used to indicate the target parameter.

In some embodiments of the application, the chip further comprises:

the USB to serial port and UART HUB are connected to the processing unit 420, the processing unit 420 sends a calibration result and/or a count difference value of at least one pulse signal to the testing device through the USB to serial port and the UART HUB, the calibration result is used for indicating the target parameter, and the count difference value of the at least one pulse signal is used for comparing the testing device with a preset count difference value at a display interface.

In some embodiments of the application, the reference pulse signal is a pulse width modulated PWM signal.

In some embodiments of the application, the chip is a bluetooth low energy BLE chip.

In addition, the application also provides a Bluetooth headset, which can comprise the chip 400.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.

In the several embodiments provided by the present application, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.

The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.

The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A method of crystal alignment, suitable for use with a chip having a crystal, the method comprising:

acquiring a count difference of at least one pulse signal, the acquiring the count difference of the at least one pulse signal comprising:

obtaining a count difference value of the at least one pulse signal by using a dichotomy;

the at least one pulse signal comprises a pulse signal generated by the crystal based on at least one parameter of a plurality of parameters, and the count difference of each pulse signal in the at least one pulse signal is the difference between system tick count values based on the corresponding pulse signal, which are acquired by using two external interrupts triggered by a reference pulse signal;

2. The method of claim 1, wherein said obtaining the count difference of the at least one pulse signal using a dichotomy comprises:

3. The method of claim 2, wherein the determining the target parameter based on the first count difference and the second count difference comprises:

4. A method according to claim 3, wherein said determining said target parameter based on said first count difference and said second count difference comprises:

generating a third pulse signal based on the first parameter;

Acquiring a third counting difference value of the third pulse signal;

5. The method of claim 4, wherein the determining the target parameter based on the first count difference and the second count difference comprises:

generating a fourth pulse signal based on the second parameter;

acquiring a fourth count difference value of the fourth pulse signal;

6. The method of claim 1, wherein the obtaining a count difference of at least one pulse signal comprises:

7. The method of claim 6, wherein the method further comprises:

8. The method of claim 7, wherein parameter values of the plurality of parameters decrease as the frequency of the pulse signal increases.

9. The method of claim 8, wherein the parameter values of the plurality of parameters are inversely proportional to the frequency of the pulse signal.

10. The method of claim 8, wherein the obtaining a count difference of at least one pulse signal comprises:

11. The method according to claim 10, wherein the method further comprises:

12. The method of claim 11, wherein the calibration signaling comprises the plurality of parameters.

13. The method of claim 11, wherein the method further comprises:

14. The method of claim 13, wherein the method further comprises:

15. The method of claim 14, wherein the method further comprises:

16. The method of claim 15, wherein the obtaining a count difference of at least one pulse signal comprises:

17. The method of claim 16, wherein the method further comprises:

18. The method of claim 17, wherein the reference pulse signal is a pulse width modulated PWM signal.

19. The method according to any one of claims 1 to 18, wherein the chip is a bluetooth low energy BLE chip.

20. A chip, the chip comprising:

a crystal for generating a plurality of pulse signals based on a plurality of parameters, respectively;

a processing unit connected to the crystal, the processing unit configured to:

obtaining a count difference of at least one pulse signal by using a dichotomy, wherein the at least one pulse signal comprises a pulse signal generated by the crystal based on at least one parameter of a plurality of parameters, and the count difference of each pulse signal in the at least one pulse signal is a difference between system tick count values based on the corresponding pulse signal obtained by using two external interrupts triggered by a reference pulse signal;

21. The chip of claim 20, wherein the processing unit is specifically configured to:

22. The chip of claim 21, wherein the processing unit is more specifically configured to:

23. The chip of claim 22, wherein the processing unit is more specifically configured to:

24. The chip of claim 22, wherein the processing unit is more specifically configured to:

generating a third pulse signal based on the first parameter;

acquiring a third counting difference value of the third pulse signal;

25. The chip of claim 24, wherein the processing unit is more specifically configured to:

generating a fourth pulse signal based on the second parameter;

acquiring a fourth count difference value of the fourth pulse signal;

26. The chip of claim 20, wherein the processing unit is specifically configured to:

27. The chip of claim 26, wherein the processing unit is further configured to:

28. The chip of claim 27, wherein parameter values of the plurality of parameters decrease as the frequency of the pulse signal increases.

29. The chip of claim 28, wherein the parameter values of the plurality of parameters are inversely proportional to the frequency of the pulse signal.

30. The chip of claim 28, wherein the processing unit is specifically configured to:

31. The chip of claim 30, wherein the chip further comprises:

32. The chip of claim 31, wherein the calibration signaling includes the plurality of parameters.

33. The chip of claim 32, wherein the chip further comprises:

34. The chip of claim 33, wherein the processing unit is further configured to store a calibration result to the register, the calibration result being used to indicate the target parameter.

35. The chip of claim 34, wherein the chip further comprises:

36. The chip of claim 35, wherein the processing unit is specifically configured to:

37. The chip of claim 36, wherein the processing unit is specifically configured to:

38. The chip of claim 37, wherein the reference pulse signal is a pulse width modulated PWM signal.

39. The chip according to any one of claims 20 to 38, wherein the chip is a bluetooth low energy BLE chip.

40. A bluetooth headset, comprising:

the chip of any one of claims 20 to 39.