CN111798789B - Pixel circuit, driving method thereof and display panel - Google Patents
Pixel circuit, driving method thereof and display panel Download PDFInfo
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- CN111798789B CN111798789B CN202010687823.1A CN202010687823A CN111798789B CN 111798789 B CN111798789 B CN 111798789B CN 202010687823 A CN202010687823 A CN 202010687823A CN 111798789 B CN111798789 B CN 111798789B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0257—Reduction of after-image effects
Abstract
The embodiment of the invention discloses a pixel circuit, a driving method thereof and a display panel, wherein the pixel circuit comprises: the device comprises a driving transistor, a first light-emitting control module, a light-emitting module and a black insertion control module; the first light-emitting control module is used for being turned off in a part of time interval of a light-emitting stage under the control of a light-emitting control signal, and the driving transistor is used for driving the light-emitting module to emit light when the first light-emitting control module is turned on; the black insertion control module is used for writing a preset voltage into the first pole of the driving transistor in a black insertion stage in which the first light-emitting control module and the data writing module are both turned off under the control of the first scanning signal and the light-emitting control signal, wherein in at least part of the period of the black insertion stage, the voltage difference value between the grid voltage of the driving transistor and the preset voltage and the voltage difference value between the grid voltage of the driving transistor and the first voltage when the driving transistor is turned on are opposite in positive and negative. The technical scheme of the invention is beneficial to improving the problems of residual images and driving current reduction.
Description
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a pixel circuit, a driving method thereof and a display panel.
Background
With the development of display technology, people have higher and higher requirements on display effects.
In the conventional display panel, a plurality of pixel circuits are usually included, and the pixel circuits usually include a driving transistor and a light emitting device, and the driving transistor generates a driving current to control the light emitting luminance of the light emitting device.
However, the conventional display panel has the problems of display ghost and reduction of the driving current along with the increase of the using time.
Disclosure of Invention
The invention provides a pixel circuit, a driving method thereof and a display panel, which aim to solve the problem of display ghost of the display panel, solve the problem of drive current reduction along with the increase of service time and improve the display effect.
In a first aspect, an embodiment of the present invention provides a pixel circuit, including: the device comprises a data writing module, a compensation module, a driving transistor, a first light emitting control module, a light emitting module and a black insertion control module;
the data writing module is used for writing data voltage into the driving transistor in a data writing stage under the control of a first scanning signal;
the compensation module is used for writing a compensation signal containing the threshold voltage information of the driving transistor into the grid electrode of the driving transistor in a data writing stage;
the first light-emitting control module is used for being turned off in a part of time period of a light-emitting stage under the control of a light-emitting control signal, and the driving transistor is used for driving the light-emitting module to emit light when the first light-emitting control module is turned on;
the black insertion control module is used for writing a preset voltage into the first pole of the driving transistor in a black insertion stage in which the first light-emitting control module and the data writing module are both turned off under the control of the first scanning signal and the light-emitting control signal, wherein in at least part of the period of the black insertion stage, the voltage difference value between the grid voltage of the driving transistor and the preset voltage and the voltage difference value between the grid voltage of the driving transistor and the first voltage when the driving transistor is turned on are opposite in positive and negative.
In a second aspect, an embodiment of the present invention further provides a driving method of a pixel circuit, including:
in a data writing stage, a data writing module writes data voltage into a driving transistor under the control of a first scanning signal, and a compensation module writes a compensation signal containing threshold voltage information of the driving transistor into a grid electrode of the driving transistor;
in a part of time period of the light-emitting stage, the first light-emitting control module is conducted under the control of the light-emitting control signal, and the driving transistor drives the light-emitting module to emit light when the first light-emitting control module is conducted;
and the black insertion control module writes a preset voltage into the first pole of the driving transistor in a black insertion stage in which the first light emitting control module and the data writing module are both turned off under the control of the first scanning signal and the light emitting control signal, wherein in at least part of the period of the black insertion stage, the difference between the gate voltage of the driving transistor and the preset voltage and the difference between the gate voltage of the driving transistor and the first voltage when the driving transistor is turned on are opposite in positive and negative.
In a third aspect, an embodiment of the present invention further provides a display panel, including the pixel circuit of the first aspect.
The pixel circuit, the driving method thereof and the display panel provided by the embodiment of the invention are characterized in that the pixel circuit comprises a black insertion control module, wherein the black insertion control module is used for writing a preset voltage into a first pole of a driving transistor when a first light emitting control module and a data writing module are both turned off under the control of a first scanning signal and a light emitting control signal, wherein the difference value between the number of grid voltages of the driving transistor and the preset voltage in at least part of time period of a black insertion stage is opposite to the positive and negative of the voltage difference value between the grid of the driving transistor and the first pole when the driving transistor is turned on; therefore, in at least partial time period of the black insertion stage, the threshold voltage drift degree of the driving transistor is recovered to a certain extent, and the threshold voltage drift amount is pulled back, so that the threshold voltage drift of the driving transistor can be reduced, the characteristic of the driving transistor drift can be recovered, and the ghost can be improved. And at least partial time of the black insertion stage, the current carriers are repelled to the position far away from the channel defect of the driving transistor and the position of the interface defect between the active layer and the grid insulating layer of the driving transistor, so that the accumulation of the current carriers at the position of the channel defect of the driving transistor and the position of the interface defect between the active layer and the grid insulating layer of the driving transistor is reduced, the afterimage is further improved, and the phenomenon that the driving current is reduced along with the prolonging of the service time is favorably improved, so that the aging speed of the device of the driving transistor can be reduced, and the service life of the display panel is prolonged. In addition, in the technical scheme of the embodiment, the black insertion control module is controlled by using the control signals of the data writing module and the first light emitting control module in the pixel circuit, and a new control signal does not need to be additionally added, so that a signal line does not need to be additionally added in a display panel comprising the pixel circuit, and the pixel density in the display panel is favorably ensured. And because the first scanning signal and the light-emitting control signal are control signals with fixed periods, the line-by-line transmission in the display panel is easier to realize, the line-by-line driving of pixel circuits in the display panel is further realized, and the realizability is high.
Drawings
Fig. 1 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention;
fig. 2 is a driving timing diagram of a pixel circuit according to an embodiment of the invention;
FIG. 3 is a graph of threshold voltage versus time for a driving transistor according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 7 is a driving timing diagram of another pixel circuit according to an embodiment of the invention;
fig. 8 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 9 is a flowchart of a driving method of a pixel circuit according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of a display panel according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not to be construed as limiting the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
As described in the background art, the conventional display panel has problems of display afterimage and a drop in driving current with an increase in use time. The inventors have found that the above-described problem occurs because the conventional display panel generally includes a pixel circuit in which a driving transistor operates under a forward bias or a reverse bias for a long period of time, so that the device characteristics of the driving transistor are shifted. For example, when a driving transistor in a pixel circuit is a P-type transistor, when the driving transistor is turned on to drive a light emitting device to emit light, negative pressure stress is applied between a gate and a source of the driving transistor, and as the service life of a display panel is prolonged, negative deviation occurs between the gate and the source of the driving transistor due to long-term negative pressure stress applied between the gate and the source of the driving transistor. In the prior art, characteristics of a driving transistor are not recovered for a pixel circuit, for example, a P-type driving transistor always bears negative pressure stress in each frame of display time, so that the offset characteristics of the driving transistor cannot be recovered, and the aging speed of the driving transistor is high.
In view of the above problems, an embodiment of the present invention provides a pixel circuit, and fig. 1 is a schematic structural diagram of a pixel circuit provided in an embodiment of the present invention, and referring to fig. 1, the pixel circuit includes: a data writing module 110, a compensation module 120, a driving transistor DT, a first light emitting control module 131, a light emitting module 140, and a black insertion control module 150;
the data writing module 110 is configured to write a data voltage to the driving transistor DT in a data writing phase under control of a first scan signal;
the compensation module 120 is used for writing a compensation signal containing threshold voltage information of the driving transistor DT into the gate g of the driving transistor DT in a data writing phase;
the first light emitting control module 131, the driving transistor DT and the light emitting module 140 are connected between a first power voltage input terminal Vdd and a second power voltage input terminal Vss, the first light emitting control module 131 is configured to be turned off at a partial period of the light emitting phase under the control of the light emitting control signal, and the driving transistor DT is configured to drive the light emitting module 140 to emit light when the first light emitting control module 131 is turned on;
the black insertion control module 150 is configured to write a preset voltage to the first pole s of the driving transistor DT during a black insertion period in which the first lighting control module 131 and the data writing module 110 are both turned off under the control of the first scan signal and the lighting control signal, wherein a difference between the gate voltage of the driving transistor DT and the preset voltage is opposite to a difference between the gate voltage of the driving transistor DT and the first voltage when the driving transistor DT is turned on during at least a part of the black insertion period.
Optionally, the first pole s of the driving transistor DT is a source of the driving transistor DT.
With continued reference to fig. 1, optionally, the first scan signal is input from a first scan signal input terminal, and the light emission control signal is input from a light emission control terminal. Optionally, the conducting state of the compensation module 120 is also controlled by the first scan signal. Optionally, the pixel circuit further comprises a memory module 160.
With continued reference to fig. 1, optionally, the pixel circuit further includes a second light-emitting control module 132, where fig. 1 schematically illustrates a case where the first light-emitting control module 131 and the second light-emitting control module 132 are both controlled by the same light-emitting control signal, and the second light-emitting control module 132 may also be controlled by a different signal from the first light-emitting control module 131, where this embodiment is not specifically limited herein, and the second light-emitting control module 132 is configured to be turned off in a data writing phase, and when the first light-emitting control module 131 is turned on in a light-emitting phase, the second light-emitting control module 132 is turned on.
Fig. 2 is a driving timing diagram of a pixel circuit according to an embodiment of the present invention, where the driving timing diagram is applicable to the pixel circuit shown in fig. 1, and with reference to fig. 1 and fig. 2, an example is described in which a first scan signal is active low for the data writing module 110 and the compensation module 120, a light-emitting control signal is active low for the first light-emitting control module 131 and the second light-emitting control module 132, and the first scan signal and the light-emitting control signal are active high for the black insertion control module 150. In particular, the operation of the pixel circuitThe process may include a data writing phase t1 and a light emitting phase t 2. In the data writing phase t1, the first scan signal is at a low level, the data writing module 110 is turned on under the control of the first scan signal, the compensation module 120 is also turned on, the data voltage is written to the gate g of the driving transistor DT through the turned-on data writing module 110 and the turned-on compensation module 120, the compensation module 120 writes the compensation signal containing the threshold voltage information of the driving transistor DT to the gate g of the driving transistor DT, and the gate voltage of the driving transistor DT is at this time V data -|V th Where Vdata represents a data voltage and Vth represents a threshold voltage of the driving transistor DT.
In a partial period of the light-emitting period t2 (the light-emitting sub-period t21), the light-emitting control signal is at a low level, the first light-emitting control module 131 is turned on under the control of the light-emitting control signal, and the driving transistor DT drives the light-emitting module 140 to emit light, thereby implementing the display function. During a part of the light emitting period (off sub-phase t22), the light emitting control signal is at a high level, the first light emitting control module 131 is turned off under the control of the light emitting control signal, and the driving transistor DT cannot drive the light emitting module 140 to emit light. In the embodiment of the present invention, the time period of the first light-emitting control module 131 being turned on and off in the light-emitting phase t2 is not specifically limited. Alternatively, the first light emitting control module 131 may be turned on and off multiple times in the light emitting period t2, that is, in the light emitting period t2, black insertion is performed multiple times (corresponding to the case when the first light emitting control module 131 is turned off in the light emitting period t 2).
The pixel circuit of the present embodiment further includes a black insertion control module 150, wherein the black insertion control module 150 is controlled by the first scan signal and the light emitting control signal, and writes a predetermined voltage into the first pole s of the driving transistor DT when the first light emitting control module 131 and the data writing module 110 are both turned off. Specifically, the first lighting control module 131 is electrically connected to the first power voltage input terminal Vdd and the first pole s of the driving transistor DT, so that when the first lighting control module 131 is turned on, the preset voltage cannot be correctly written into the first pole s of the driving transistor DT; the data writing module 110 is usually electrically connected to the first pole s of the driving transistor DT, so that when the data writing module 110 is turned on, the preset voltage cannot be correctly written into the first pole s of the driving transistor DT, and therefore in this embodiment, the black insertion control module 150 is controlled by the first scan signal controlling the data writing module 110 and the light emitting control signal controlling the first light emitting control module 131 together, and when both the data writing module 110 and the first light emitting control module 131 are turned off, the black insertion control module 150 is controlled to be turned on, thereby realizing correct writing of the preset voltage into the first pole of the driving transistor DT. Recording a voltage difference value between the gate voltage of the driving transistor DT and the first pole s of the driving transistor DT in the black insertion period as a first difference value, recording a voltage difference value between the gate voltage of the driving transistor DT and the first pole voltage of the driving transistor DT when the driving transistor DT is turned on as a second difference value, wherein the first difference value and the second difference value have opposite positive and negative values in at least part of the black insertion period, for example, if the first difference value is greater than 0, the second difference value is less than 0; if the first difference is less than 0, the second difference is greater than 0.
Illustratively, when the driving transistor DT is a P-type transistor, the threshold voltage Vth of the driving transistor DT is less than 0, and the on condition of the driving transistor DT is Vgs < Vth, where Vgs is Vg-Vs, Vgs represents the voltage difference between the gate voltage of the driving transistor DT and the first pole s, Vg represents the gate voltage of the driving transistor DT, and Vs represents the first pole voltage of the driving transistor DT. When the driving transistor DT is a P-type transistor, Vgs of the driving transistor DT is required to be smaller than 0 when the driving transistor DT is turned on, and the second difference is smaller than 0, so that negative stress is applied between the gate g and the first pole s of the driving transistor DT when the driving transistor DT is turned on, and a negative drift is easily generated in the threshold voltage of the driving transistor DT. And in at least part of the black insertion period, the difference between the gate voltage of the driving transistor DT and the voltage of the first pole s of the driving transistor DT is opposite to the positive or negative of the second difference, so that positive pressure stress can be borne between the gate g of the driving transistor DT and the first pole s in at least part of the black insertion period, and the negative drift degree of the threshold voltage of the driving transistor DT can be recovered to a certain extent. Fig. 3 is a graph of threshold voltage versus time of the driving transistor DT according to an embodiment of the present invention, and referring to fig. 3, wherein the abscissa represents time and the ordinate represents threshold voltage. The first curve 10 may represent a threshold voltage of the driving transistor DT with respect to time in the conventional pixel circuit, the second curve 20 may represent a threshold voltage of the driving transistor DT with respect to time in the pixel circuit of this embodiment, wherein the first phase t01 may represent a phase when the driving transistor DT is turned on within one frame (may include a period in which the first light emission control module 131 is turned on in the data writing phase t1 and the light emission phase t 2), and the second phase t20 may represent a period in which the first difference value is opposite to the second difference value in the black insertion phase. As can be seen from fig. 3, since the conventional pixel circuit does not include a stage for recovering the characteristics of the driving transistor DT during operation, the threshold voltage of the driving transistor DT always drifts in one direction (for example, fig. 3 may show a process for negatively drifting the threshold voltage of the P-type driving transistor DT. the pixel circuit of this embodiment includes a black insertion stage, in which the voltage difference between the gate voltage of the driving transistor DT and the first electrode s during at least a part of the black insertion stage is opposite to the difference between the gate voltage of the driving transistor DT and the first electrode voltage when the driving transistor DT is turned on, so that during the black insertion stage, the threshold voltage drift degree of the driving transistor DT is recovered to some extent, the threshold voltage drift amount is pulled back, thereby reducing the threshold voltage drift of the driving transistor DT, further facilitating recovery of the characteristics of the driving transistor DT drift, further facilitating improvement of image sticking, in this embodiment, by setting the difference between the data voltage and the preset voltage in at least a part of the black insertion period to be opposite to the positive or negative of the voltage difference between the gate g and the first pole of the driving transistor DT when the driving transistor DT is turned on, carriers are repelled to a position away from the channel defect of the driving transistor DT and a position at which the interface between the active layer and the gate insulating layer of the driving transistor DT is defective, so that the accumulation of carriers at the channel defect of the driving transistor DT and at the position at which the interface between the active layer and the gate insulating layer of the driving transistor DT is defective is reduced, the afterimage is further improved, and the phenomenon of the decrease of the driving current along with the extension of the service time is facilitated, so that the aging speed of the device of the driving transistor DT can be slowed down, and the service life of the display panel can be prolonged.
In addition, the pixel circuit of the embodiment controls the black insertion control module 150 by using the control signals for the data writing module 110 and the first light emitting control module 131 in the pixel circuit, and a new control signal does not need to be additionally added, so that a display panel including the pixel circuit does not need to be additionally provided with signal lines, which is beneficial to ensuring the pixel density in the display panel. And because the first scanning signal and the light-emitting control signal are control signals with fixed periods, the line-by-line transmission in the display panel is easier to realize, the line-by-line driving of pixel circuits in the display panel is further realized, and the realizability is high.
It should be noted that, in this embodiment and the following embodiments, the preset voltage may not only refer to a certain fixed voltage value, but the preset voltage may be only required to satisfy that the difference between the gate voltage of the driving transistor DT and the first electrode s when the driving transistor DT is turned on are opposite in sign during at least a part of the black insertion period, that is, the preset voltage may be a range (as described above, after the data writing period t1 is performed, the gate voltage of the driving transistor DT is V, and the gate voltage of the driving transistor DT is V data -|V th If the driving transistor DT is turned on and the gate voltage of the driving transistor DT and the voltage of the first pole s of the driving transistor DT are less than 0, the predetermined voltage is ensured to be less than V when the driving transistor DT is turned on data -|V th I, it is ensured that the difference between the gate voltage of the driving transistor DT and the preset voltage and the difference between the gate g of the driving transistor DT and the first pole s when the driving transistor DT is turned on are opposite in sign in all periods of the black insertion phase when the data writing module 110 and the first light-emitting control module 131 are both turned off).
It should be noted that, the above is exemplarily described only by taking the driving transistor DT as a P-type transistor, when the driving transistor DT is an N-type transistor, the difference between the gate voltage of the driving transistor DT and the preset voltage during at least a part of the black insertion period is opposite to the positive or negative of the voltage difference between the gate g of the driving transistor DT and the first electrode s when the driving transistor DT is turned on, which can also recover the characteristic deviation of the driving transistor DT.
In the pixel circuit provided by this embodiment, the pixel circuit includes a black insertion control module, where the black insertion control module is configured to write a preset voltage into the first pole of the driving transistor when the first light emitting control module and the data writing module are both turned off under the control of the first scan signal and the light emitting control signal, where a difference between a number of gate voltages of the driving transistor and the preset voltage in at least a part of a period of the black insertion phase and a difference between a gate voltage of the driving transistor and the first pole when the driving transistor is turned on are opposite in polarity; therefore, in at least partial time period of the black insertion stage, the threshold voltage drift degree of the driving transistor is recovered to a certain extent, and the threshold voltage drift amount is pulled back, so that the threshold voltage drift of the driving transistor can be reduced, the characteristic of the driving transistor drift can be recovered, and the ghost can be improved. And at least partial time of the black insertion stage, the current carriers are repelled to the position far away from the channel defect of the driving transistor and the position of the interface defect between the active layer and the grid insulating layer of the driving transistor, so that the accumulation of the current carriers at the position of the channel defect of the driving transistor and the position of the interface defect between the active layer and the grid insulating layer of the driving transistor is reduced, the afterimage is further improved, and the phenomenon that the driving current is reduced along with the prolonging of the service time is favorably improved, so that the aging speed of the device of the driving transistor can be reduced, and the service life of the display panel is prolonged. In addition, in the technical scheme of the embodiment, the black insertion control module is controlled by using the control signals of the data writing module and the first light emitting control module in the pixel circuit, and a new control signal does not need to be additionally added, so that a signal line does not need to be additionally added in a display panel comprising the pixel circuit, and the pixel density in the display panel is favorably ensured. And because the first scanning signal and the light-emitting control signal are control signals with fixed periods, the line-by-line transmission in the display panel is easier to realize, the line-by-line driving of pixel circuits in the display panel is further realized, and the realizability is high.
Fig. 4 is a schematic structural diagram of another pixel circuit according to the embodiment of the present invention, and referring to fig. 4, optionally, the Data writing module 110 includes a first transistor T1, a first pole of the first transistor T1 is electrically connected to the Data voltage input terminal Data, and a second pole of the first transistor T1 is electrically connected to the first pole s of the driving transistor DT;
the first light emission control module 131 includes a second transistor T2, the second transistor T2 being connected between the first power voltage input terminal Vdd and the first pole s of the driving transistor DT; the pixel circuit further includes a second light emission control module 132, the second light emission control module 132 including a third transistor T3, the third transistor T3 being connected between the second pole of the driving transistor DT and the first terminal of the light emitting module 140, the second terminal of the light emitting module 140 being connected to a second power supply voltage input terminal Vss;
the black insertion control module 150 includes a fourth transistor T4 and a fifth transistor T5 connected in series between the preset voltage terminal Vpre and the first pole of the driving transistor DT, the gate of the fourth transistor T4 and the gate of the first transistor T1 are connected with the same signal, and the gates of the fifth transistor T5 and the second transistor T2 are connected with the same signal; the fourth transistor T4 is of an opposite channel type to the first transistor T1, and the fifth transistor T5 is of an opposite channel type to the third transistor T3.
Specifically, since the black insertion control module 150 is controlled by the first scan signal for controlling the data writing module 110 and the light emitting control signal for controlling the first light emitting control module 131, the fourth transistor T4 and the fifth transistor T5 included in the black insertion control module 150 are respectively configured to be opposite to the channel types of the first transistor T1 included in the data writing module 110 and the second transistor T2 included in the first light emitting control module 131, for example, when the first transistor T1 is a P-type transistor, the fourth transistor T4 is an N-type transistor, and when the second transistor T2 is a P-type transistor, the fifth transistor T5 is an N-type transistor, so that the black insertion control module 150 can be ensured to be turned on when the data writing module 110 and the first light emitting control module 131 are both turned off, and further, a new control signal does not need to be introduced into the pixel circuit, and further, a signal line does not need to be additionally added into the display panel including the pixel circuit, it is advantageous to ensure the pixel density in the display panel. And because the first scanning signal and the light-emitting control signal are control signals with fixed periods, the line-by-line transmission in the display panel is easier to realize, the line-by-line driving of pixel circuits in the display panel is further realized, and the realizability is high.
With continued reference to fig. 4, optionally, the second transistor T2 and the third transistor T3 are of the same type, and the gate of the second transistor T2, the gate of the third transistor T3, and the gate of the fifth transistor T5 are all electrically connected to the emission control signal input EM; furthermore, on the basis that the second transistor T2 and the fifth transistor T5 can be controlled by the same control signal, the third transistor T3 can also be controlled by the same control signal as the second transistor T2 and the fifth transistor T5, so that the number of signal lines in a display panel including the pixel circuit is further reduced, and the pixel density is further improved.
Fig. 5 is a schematic structural diagram of another pixel circuit according to the embodiment of the invention, and referring to fig. 5, optionally, the compensation module 120 includes a sixth transistor T6, a first pole of the sixth transistor T6 is electrically connected to the second pole of the driving transistor DT, and a second pole of the sixth transistor T6 is electrically connected to the gate g of the driving transistor DT; the sixth transistor T6 and the first transistor T1 are of the same type, and the gate of the sixth transistor T6, the gate of the first transistor T1, and the gate of the fourth transistor T4 are electrically connected to the first scan signal input terminal S1; furthermore, on the basis that the first transistor T1 and the fourth transistor T4 can be controlled by the same control signal, the sixth transistor T6 can also be controlled by the same control signal as the first transistor T1 and the fourth transistor T4, so that the number of signal lines in a display panel including the pixel circuit is further reduced, and the pixel density is further improved.
Optionally, the sixth transistor T6 is an oxide transistor, for example, an IGZO transistor, so that the leakage current of the sixth transistor T6 can be reduced, which is more favorable for maintaining the gate potential of the driving transistor DT. The oxide transistor is generally an N-type transistor, and fig. 5 schematically illustrates a case where the first transistor T1 and the sixth transistor T6 are both N-type transistors and the fourth transistor T4 is a P-type transistor.
Fig. 6 is a schematic structural diagram of another pixel circuit provided in an embodiment of the present invention, referring to fig. 6, optionally, the pixel circuit further includes a first initialization module 170, where the first initialization module 170 is configured to write an initialization voltage of an initialization voltage terminal Vref to a gate g of the driving transistor DT in an initialization phase t 0; the initialization stage is before the data writing stage, so that the grid potential of the driving transistor DT is initialized before the data writing stage, and the driving transistor DT can be ensured to be smoothly conducted after the data writing stage is started. Optionally, the first terminal of the first initialization block 170 is electrically connected to the initialization voltage terminal Vref, the second terminal of the first initialization block 170 is electrically connected to the gate g of the driving transistor DT, and the control terminal of the first initialization block 170 is electrically connected to the second scan signal input terminal S2.
With continued reference to fig. 6, optionally, the pixel circuit further includes a second initialization module 180, the second initialization module 180 is configured to write an initialization voltage of the initialization voltage terminal Vref to the first terminal of the light emitting module 140 during the initialization period t 0; further, the residual charge of the first end of the light emitting module 140 in the previous frame can be eliminated, which is beneficial to improving the display effect. Optionally, the first terminal of the second initialization module 180 is electrically connected to the initialization voltage terminal Vref, the second terminal of the second initialization module 180 is electrically connected to the first terminal of the light emitting module 140, and the control terminal of the second initialization module 180 is electrically connected to the second scan signal input terminal S2.
Fig. 7 is a driving timing diagram of another pixel circuit provided by an embodiment of the invention, the driving timing diagram can be used for driving the pixel circuit shown in fig. 6, and referring to fig. 6 and 7, an operation process of the pixel circuit shown in fig. 6 includes an initialization phase t0, a data writing phase t1, and a light emitting phase t 2. Still, the first scan signal is active at a low level for the data writing module 110 and the compensation module 120, the light emitting control signal is active at a low level for the first light emitting control module 131 and the second light emitting control module 132, the second scan signal is active at a low level for the first initialization module 170 and the second initialization module 180, and the first scan signal and the light emitting control signal are active at a high level for the black insertion control module 150 will be described as an example. The operation of the data writing phase t1 and the light emitting phase t2 is the same as that of the pixel circuit shown in fig. 1, and is not repeated herein.
Referring to fig. 6 and 7, in the initialization period t0, the second scan signal is at a low level, the first initialization block 170 and the second initialization block 180 are turned on, the first initialization block 170 writes an initialization voltage to the gate g of the driving transistor DT, and the second initialization block 180 writes an initialization voltage to the first terminal of the light emitting module 140.
Between the initialization stage t0 and the data writing stage t1, a second intermediate stage t01 in which the second scan signal and the light-emitting control signal are both at a high level is further included, at this time, the black insertion control module 150 is turned on, and a preset voltage is written into the first pole s of the driving transistor DT, for example, when the driving transistor DT is a P-type transistor (the difference between the gate and the first pole is less than 0) the preset voltage needs to be less than the initialization voltage to realize that in the second intermediate stage t01, the difference between the gate voltage of the driving transistor DT and the preset voltage is opposite to the voltage difference between the gate voltage of the driving transistor DT and the first pole voltage when the driving transistor DT is turned on, and thus, in the second intermediate stage t01, the characteristic offset of the driving transistor DT can be recovered to a certain extent, and the problem of image retention and the reduction of the driving current is further improved.
With reference to fig. 6, optionally, a first terminal of the black insertion control module 150 is electrically connected to the initialization voltage terminal Vref, a second terminal of the black insertion control module 150 is electrically connected to the first pole s of the driving transistor DT, and the preset voltage is equal to the initialization voltage of the initialization voltage terminal Vref.
Specifically, taking the driving transistor DT as a P-type transistor as an example, the initialization voltage is smaller than the difference (i.e., V) between the data voltage corresponding to any gray level and the absolute value of the threshold voltage corresponding to the driving transistor DT data -|V th I) thus V data -|V th The difference between | and the initialization voltage is greater than 0; when the driving transistor DT is turned on, the voltage difference between the gate g and the first electrode of the driving transistor DT is less than 0, so that after the data access phase, when the light emitting control module and the data writing module 110 are both turned off, the difference between the gate voltage of the driving transistor DT and the preset voltage and the difference between the gate voltage of the driving transistor DT and the preset voltage when the driving transistor DT is turned on can be ensuredThe voltage difference of the first pole is opposite, so that the recovery of the offset characteristic of the driving transistor DT can be ensured.
On the basis of the above technical solution, optionally, the light-emitting period t2 includes at least one light-emitting sub-period t21 and at least one cut-off sub-period t22, the first light-emitting control module 131 is configured to be turned on in the light-emitting sub-period t21 and turned off in the cut-off sub-period t22 under the control of the light-emitting control signal, and in the cut-off sub-period t22, a voltage difference value between the gate voltage of the driving transistor DT and the preset voltage and a voltage difference value between the gate voltage of the driving transistor DT and the first voltage when the driving transistor DT is turned on are opposite in sign.
Specifically, the light-emitting period t2 includes at least one light-emitting sub-period t21 and at least one cut-off sub-period t22, so that the characteristics of the driving transistor DT can be recovered in the cut-off sub-period t22, which is favorable for improving the image sticking and the problem of the reduction of the driving current. Optionally, the light-emitting period t2 includes at least two cut-off sub-periods t22, so that the characteristics can be recovered more completely, and the problems of image sticking and driving current reduction can be improved more favorably. Specifically, to ensure that the sub-phase t22 is turned off, the voltage difference between the gate voltage of the driving transistor DT and the preset voltage and the voltage difference between the gate voltage of the driving transistor DT and the first voltage when the driving transistor DT is turned on are opposite in sign, and when the driving transistor DT is a P-type transistor, the preset voltage may be set to be smaller than the difference between the data voltage corresponding to any gray scale and the absolute value of the threshold voltage corresponding to the driving transistor DT (i.e., V is the difference between the absolute value of the data voltage corresponding to any gray scale and the absolute value of the threshold voltage corresponding to the driving transistor DT) data -|V th |)。
Optionally, the cut-off sub-phase t22 time is shorter than the light-emitting sub-phase t21 time;
specifically, the shorter the time of the cut-off sub-stage t22 is, the less the human eye can feel the black insertion of the light-emitting stage t2, so that the influence of the existence of the cut-off sub-stage t22 on the display effect can be reduced by the time of the cut-off sub-stage t22, and the visual display effect can be improved.
Fig. 8 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 8, optionally, the data writing module 110 includes a first transistor T1, the first light-emitting control module 131 includes a second transistor T2, the pixel circuit further includes a second light-emitting control module 132, the second light-emitting control module 132 includes a third transistor T3, the black insertion control module 150 includes a fourth transistor T4 and a fifth transistor T5, the compensation module 120 includes a sixth transistor T6, and the light-emitting module 140 includes a light-emitting device;
a first electrode of the first transistor T1 is electrically connected to the Data voltage input terminal Data, a second electrode of the first transistor T1 is electrically connected to the first electrode S of the driving transistor DT, and a gate electrode of the first transistor T1 is electrically connected to the first scan signal input terminal S1;
the second transistor T2 is connected between the first power voltage input terminal Vdd and the first pole s of the driving transistor DT, the third transistor T3 is connected between the second pole of the driving transistor DT and the first pole of the light emitting device, the second pole of the light emitting module 140 is connected to the second power voltage input terminal Vss, and the gates of the second transistor T2 and the third transistor T3 are connected to the light emission control signal input terminal EM;
a first pole of the sixth transistor T6 is electrically connected to the second pole of the driving transistor DT, a second pole of the sixth transistor T6 is electrically connected to the gate g of the driving transistor DT, and a gate of the sixth transistor T6 is electrically connected to the first scan signal input terminal S1;
the fourth transistor T4 and the fifth transistor T5 are connected in series between the preset voltage terminal and the first pole of the driving transistor DT, the gate electrode of the fourth transistor T4 is electrically connected to the first scan signal input terminal S1, and the gate electrode of the fifth transistor T5 is electrically connected to the emission control signal input terminal EM;
a first pole of the seventh transistor T7 is electrically connected to the initialization voltage terminal Vref, a second pole of the seventh transistor T7 is electrically connected to the gate g of the driving transistor DT, and a gate of the seventh transistor T7 is electrically connected to the second scan signal input terminal S2;
a first pole of the eighth transistor T8 is electrically connected to the initialization voltage terminal Vref, a second pole of the eighth transistor T8 is electrically connected to the first pole of the light emitting device, and a gate of the eighth transistor T8 is electrically connected to the second scan signal input terminal S2;
the first transistor T1, the second transistor T2, the sixth transistor T6 and the driving transistor DT are P-type transistors, and the fourth transistor T4 and the fifth transistor T5 are N-type transistors. With continued reference to fig. 8, the memory module 160 includes a first capacitance.
The driving timing shown in fig. 7 is also applicable to the pixel circuit shown in fig. 8, and referring to fig. 7 and 8, the operation process of the pixel circuit may include an initialization phase t0, a first intermediate phase t12, a data writing phase t1, a second intermediate phase t01, and a light emitting phase t 2.
In the initialization period T0, the second scan signal is low, the seventh transistor T7 and the eighth transistor T8 are turned on, the initialization voltage is transmitted to the gate g of the driving transistor DT through the turned-on seventh transistor T7, and the initialization voltage is transmitted to the first electrode of the light emitting device through the turned-on eighth transistor T8.
In the first intermediate period T12, the first scan signal and the light emission control signal are both at a high level, the fourth transistor T4 and the fifth transistor T5 are turned on, and the preset voltage inputted from the preset voltage terminal Vpre is transmitted to the first pole s of the driving transistor DT through the fourth transistor T4 and the fifth transistor T5. Optionally, the preset voltage is less than or equal to the initialization voltage, wherein when the preset voltage is equal to the initialization voltage, the initialization voltage terminal Vref may be reused as the preset voltage terminal Vpre, and thus the preset voltage terminal Vpre does not need to be additionally set. When the preset voltage is smaller than the initialization voltage, the difference between the gate voltage (equal to the initialization voltage) of the driving transistor DT and the first electrode voltage (equal to the preset voltage) is greater than 0 at the first intermediate stage t12, and the difference between the gate voltage and the first electrode voltage is smaller than 0 when the driving transistor DT is turned on, so that the characteristic deviation of the driving transistor DT is recovered at the first intermediate stage t12, which is favorable for improving the afterimage phenomenon.
In the data writing period T1, the first scan signal is at a low level, the first transistor T1 and the sixth transistor T6 are turned on, the data voltage is transmitted to the gate g of the driving transistor DT through the turned-on first transistor T1, the driving transistor DT and the sixth transistor T6, and the voltage at the gate of the driving transistor DT is equal to V data -|V th And | when |, the driving transistor DT is turned off, and the writing of the data voltage and the compensation of the threshold voltage of the driving transistor DT are completed.
In the second intermediate stage T01, the first scan signal and the emission control signal are both at a high level, the fourth transistor T4 and the fifth transistor T5 are turned on, and the preset voltage inputted from the preset voltage terminal Vpre is transmitted to the first pole s of the driving transistor DT through the fourth transistor T4 and the fifth transistor T5; and in the second intermediate period t01, the gate voltage of the driving transistor DT is maintained at V due to the holding effect of the first capacitor data -|V th L. When the preset voltage is less than or equal to the initialization voltage, the initialization voltage is less than the difference between the data voltage corresponding to any gray scale and the threshold voltage of the driving transistor DT, so that in the second intermediate stage t01, the voltage difference between the gate voltage of the driving transistor DT and the first electrode voltage is greater than 0, and the voltage difference between the gate voltage of the driving transistor DT and the first electrode voltage is less than 0 when the driving transistor DT is turned on, so that in the second intermediate stage t01, the characteristic deviation of the driving transistor DT is recovered, and the ghost phenomenon is improved.
In the light emitting sub-phase T21 of the light emitting phase T2, the light emitting control signal is at a low level, the second transistor T2 and the third transistor T3 are turned on, and the driving transistor DT drives the light emitting device to emit light; in the off sub-period T22 of the light emitting period T2, the light emission control signal is at a high level, the second transistor T2 and the third transistor T3 are turned off, and the light emitting device does not emit light. Since the first scan signal is also at a high level, the fourth transistor T4 and the fifth transistor T5 are turned on, and the preset voltage inputted from the preset voltage terminal Vpre is transmitted to the first pole s of the driving transistor DT through the fourth transistor T4 and the fifth transistor T5; and at the turn-off sub-period t22, the gate voltage of the driving transistor DT is maintained at V due to the holding effect of the first capacitor data -|V th L. the method is used for the preparation of the medicament. When the preset voltage is less than or equal to the initialization voltage, the initialization voltage is less than the difference between the data voltage corresponding to any gray scale and the threshold voltage of the driving transistor DT, so that in the cut-off sub-stage t22, the voltage difference between the gate voltage of the driving transistor DT and the first electrode voltage is greater than 0, and when the driving transistor DT is turned on, the voltage difference between the gate voltage and the first electrode voltage is less than 0, so that in the cut-off sub-stage t22, the characteristic deviation of the driving transistor DT is recovered, and the ghost phenomenon is improved.
Wherein, the black insertion phase comprises a first intermediate phase t12, a second intermediate phase t01 and a cut-off sub-phase t22 in the working phase. In addition, in this embodiment, the description is only given by the case that the preset voltage is less than or equal to the initialization voltage, and the preset voltage may be greater than the preset voltage, but it needs to be less than V data0 -|V th L, wherein V data0 And represents the minimum data voltage in the data voltages corresponding to each display gray scale, so that the difference between the gate voltage of the driving transistor DT and the preset voltage is opposite to the difference between the gate voltage of the driving transistor DT and the first voltage when the driving transistor DT is turned on in the second intermediate stage t01 and the turn-off sub-stage t 22.
An embodiment of the present invention further provides a driving method for a pixel circuit, where the driving method can be used to drive the pixel circuit according to any of the above embodiments of the present invention, fig. 9 is a flowchart of the driving method for the pixel circuit according to the embodiment of the present invention, and referring to fig. 9, the driving method for the pixel circuit includes:
In the driving method of the pixel circuit provided in the embodiment of the present invention, a black insertion control module writes a preset voltage into a first pole of a driving transistor when both a first lighting control module and a data writing module are turned off under the control of a first scan signal and a lighting control signal, where a difference between a gate voltage number of the driving transistor and the preset voltage in at least a part of a black insertion period is opposite to a positive or negative of a voltage difference between a gate of the driving transistor and the first pole when the driving transistor is turned on; therefore, in at least partial time period of the black insertion stage, the threshold voltage drift degree of the driving transistor is recovered to a certain extent, and the threshold voltage drift amount is pulled back, so that the threshold voltage drift of the driving transistor can be reduced, the characteristic of the driving transistor drift can be recovered, and the ghost can be improved. And at least partial time of the black insertion stage, the current carriers are repelled to the position far away from the channel defect of the driving transistor and the position of the interface defect between the active layer and the grid insulating layer of the driving transistor, so that the accumulation of the current carriers at the position of the channel defect of the driving transistor and the position of the interface defect between the active layer and the grid insulating layer of the driving transistor is reduced, the afterimage is further improved, and the phenomenon that the driving current is reduced along with the prolonging of the service time is favorably improved, so that the aging speed of the device of the driving transistor can be reduced, and the service life of the display panel is prolonged. In addition, in the technical scheme of the embodiment, the black insertion control module is controlled by using the control signals of the data writing module and the first light emitting control module in the pixel circuit, and a new control signal does not need to be additionally added, so that a signal line does not need to be additionally added in a display panel comprising the pixel circuit, and the pixel density in the display panel is favorably ensured. And because the first scanning signal and the light-emitting control signal are control signals with fixed periods, the line-by-line transmission in the display panel is easier to realize, the line-by-line driving of pixel circuits in the display panel is further realized, and the realizability is high.
Fig. 10 is a schematic structural diagram of a display panel according to an embodiment of the present invention, and referring to fig. 10, the display panel 30 includes the pixel circuit 301 according to any of the embodiments of the present invention. The display panel 30 further includes a data signal control driving unit 310 and a scan control driving unit 320. The data signal driving unit 310 is electrically connected to the data signal input terminals of the pixel circuits through a plurality of data lines D1, D2, D3, D4 … …, for inputting data signals to the data signal input terminals; the scan signal driving unit 320 connects a plurality of scan lines SL1, SL2, SL3, SL4 … … each connected to one row of pixel circuits.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in some detail by the above embodiments, the invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the invention, and the scope of the invention is determined by the scope of the appended claims.
Claims (10)
1. A pixel circuit, comprising: the device comprises a data writing module, a compensation module, a driving transistor, a first light emitting control module, a light emitting module and a black insertion control module;
the data writing module is used for writing data voltage into the driving transistor in a data writing stage under the control of a first scanning signal;
the compensation module is used for writing a compensation signal containing the threshold voltage information of the driving transistor into the grid electrode of the driving transistor in a data writing stage;
the first light emitting control module, the driving transistor and the light emitting module are connected between a first power supply voltage input end and a second power supply voltage input end, the first light emitting control module is used for being turned off in a part of time interval of a light emitting stage under the control of a light emitting control signal, and the driving transistor is used for driving the light emitting module to emit light when the first light emitting control module is turned on;
the black insertion control module is used for writing a preset voltage into a first pole of the driving transistor in a black insertion stage in which the first light emitting control module and the data writing module are both turned off under the control of the first scanning signal and the light emitting control signal, wherein in at least part of the black insertion stage, the positive and negative of the voltage difference value between the gate voltage of the driving transistor and the preset voltage and the voltage difference value between the gate voltage of the driving transistor and the first pole voltage when the driving transistor is turned on are opposite.
2. The pixel circuit according to claim 1, wherein the data writing module comprises a first transistor, a first pole of the first transistor is electrically connected to a data voltage input terminal, and a second pole of the first transistor is electrically connected to a first pole of the driving transistor;
the first light emission control module includes a second transistor connected between the first power supply voltage input terminal and the first pole of the driving transistor; the pixel circuit further comprises a second light-emitting control module, wherein the second light-emitting control module comprises a third transistor, the third transistor is connected between the second pole of the driving transistor and the first end of the light-emitting module, and the second end of the light-emitting module is connected with the second power supply voltage input end;
the black insertion control module comprises a fourth transistor and a fifth transistor which are connected in series between a preset voltage end and the first pole of the driving transistor, wherein the grid electrode of the fourth transistor and the grid electrode of the first transistor are connected with the same signal, and the grid electrodes of the fifth transistor and the second transistor are connected with the same signal; the fourth transistor is of an opposite channel type to the first transistor, and the fifth transistor is of an opposite channel type to the third transistor.
3. The pixel circuit according to claim 2, wherein the second transistor and the third transistor are of the same type, and wherein a gate of the second transistor, a gate of the third transistor, and a gate of the fifth transistor are all electrically connected to a light emission control signal input terminal.
4. The pixel circuit according to claim 2, wherein the compensation module comprises a sixth transistor, a first pole of the sixth transistor being electrically connected to the second pole of the driving transistor, a second pole of the sixth transistor being electrically connected to the gate of the driving transistor;
the sixth transistor and the first transistor are of the same type, and a grid electrode of the sixth transistor, a grid electrode of the first transistor and a grid electrode of the fourth transistor are electrically connected with a first scanning signal input end;
the sixth transistor is an oxide transistor.
5. The pixel circuit according to claim 1, further comprising a first initialization module, wherein the first initialization module is configured to write an initialization voltage of an initialization voltage terminal to the gate of the driving transistor in an initialization phase;
the light-emitting module further comprises a second initialization module, wherein the second initialization module is used for writing the initialization voltage of the initialization voltage end into the first end of the light-emitting module in an initialization stage.
6. The pixel circuit according to claim 5, wherein a first terminal of the black insertion control module is electrically connected to the initialization voltage terminal, a second terminal of the black insertion control module is electrically connected to the first electrode of the driving transistor, and the preset voltage is equal to an initialization voltage of the initialization voltage terminal.
7. The pixel circuit according to claim 1, wherein the light-emitting phase comprises at least one light-emitting sub-phase and at least one cut-off sub-phase, the first light-emitting control module is configured to be turned on in the light-emitting sub-phase and turned off in the cut-off sub-phase under the control of the light-emitting control signal, and in the cut-off sub-phase, the voltage difference between the gate voltage of the driving transistor and the preset voltage and the voltage difference between the gate voltage of the driving transistor and the first voltage when the driving transistor is turned on are opposite in sign;
the cut-off sub-phase time is shorter than the photon emitting phase time.
8. The pixel circuit according to claim 1, wherein the data writing module includes a first transistor, the first light emission control module includes a second transistor, the pixel circuit further includes a second light emission control module including a third transistor, the black insertion control module includes a fourth transistor and a fifth transistor, the compensation module includes a sixth transistor, and the light emitting module includes a light emitting device; the pixel circuit further includes a seventh transistor and an eighth transistor;
a first pole of the first transistor is electrically connected with the data voltage input end, a second pole of the first transistor is electrically connected with the first pole of the driving transistor, and a grid electrode of the first transistor is electrically connected with the first scanning signal input end;
the second transistor is connected between the first power supply voltage input terminal and the first pole of the driving transistor, the third transistor is connected between the second pole of the driving transistor and the first pole of the light emitting device, the second pole of the light emitting module is connected to the second power supply voltage input terminal, and the gates of the second transistor and the third transistor are connected to a light emission control signal input terminal;
a first pole of the sixth transistor is electrically connected with the second pole of the driving transistor, a second pole of the sixth transistor is electrically connected with the gate of the driving transistor, and the gate of the sixth transistor is electrically connected with the first scanning signal input end;
the fourth transistor and the fifth transistor are connected in series between a preset voltage end and the first pole of the driving transistor, the grid electrode of the fourth transistor is electrically connected with the first scanning signal input end, and the grid electrode of the fifth transistor is electrically connected with the light-emitting control signal input end;
a first electrode of the seventh transistor is electrically connected with an initialization voltage end, a second electrode of the seventh transistor is electrically connected with a grid electrode of the driving transistor, and the grid electrode of the seventh transistor is electrically connected with a second scanning signal input end;
a first electrode of the eighth transistor is electrically connected to the initialization voltage terminal, a second electrode of the eighth transistor is electrically connected to the first electrode of the light emitting device, and a gate electrode of the eighth transistor is electrically connected to the second scan signal input terminal;
wherein the first transistor, the second transistor, the sixth transistor, the seventh transistor, the eighth transistor, and the driving transistor are P-type transistors, and the fourth transistor and the fifth transistor are N-type transistors.
9. A method of driving a pixel circuit, comprising:
in a data writing stage, a data writing module writes data voltage into a driving transistor under the control of a first scanning signal, and a compensation module writes a compensation signal containing threshold voltage information of the driving transistor into a grid electrode of the driving transistor;
in a partial time interval of a light-emitting phase, the first light-emitting control module is conducted under the control of a light-emitting control signal, and the driving transistor drives the light-emitting module to emit light when the first light-emitting control module is conducted;
and the black insertion control module writes preset voltage into the first pole of the driving transistor in a black insertion stage in which the first light emitting control module and the data writing module are both switched off under the control of the first scanning signal and the light emitting control signal, wherein in at least part of the black insertion stage, the difference value between the gate voltage of the driving transistor and the preset voltage is opposite to the positive and negative of the voltage difference value between the gate voltage of the driving transistor and the first pole voltage when the driving transistor is switched on.
10. A display panel comprising the pixel circuit according to any one of claims 1 to 8.
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| CN111599315B (en) * | 2020-06-19 | 2021-11-16 | 京东方科技集团股份有限公司 | Shift register, grid driving circuit and driving method thereof |
| CN112927652A (en) * | 2021-02-05 | 2021-06-08 | 深圳市华星光电半导体显示技术有限公司 | Pixel circuit, driving method thereof, display panel and display device |
| WO2022170567A1 (en) * | 2021-02-10 | 2022-08-18 | 京东方科技集团股份有限公司 | Pixel circuit and driving method therefor, and display device |
| CN113012652B (en) * | 2021-03-09 | 2022-11-08 | Tcl华星光电技术有限公司 | Backlight driving circuit and liquid crystal display device |
| CN113112961A (en) * | 2021-04-12 | 2021-07-13 | 深圳市华星光电半导体显示技术有限公司 | Display drive circuit and drive method of display drive circuit |
| CN113112957B (en) * | 2021-04-27 | 2022-09-09 | 深圳市华星光电半导体显示技术有限公司 | Display panel driving method and display panel |
| CN115943457A (en) * | 2021-05-20 | 2023-04-07 | 京东方科技集团股份有限公司 | Pixel circuit, driving method thereof, display substrate and display device |
| CN113674668A (en) * | 2021-08-16 | 2021-11-19 | 武汉华星光电半导体显示技术有限公司 | Pixel driving circuit and display panel |
| CN113870790B (en) * | 2021-09-14 | 2023-04-14 | 武汉天马微电子有限公司 | Pixel circuit, driving method thereof, display panel and display device |
| CN117121084A (en) * | 2022-02-11 | 2023-11-24 | 京东方科技集团股份有限公司 | Display panel, driving method thereof and display device |
| CN114495799A (en) * | 2022-03-04 | 2022-05-13 | 昆山国显光电有限公司 | Pixel circuit and display panel |
| CN114758624B (en) * | 2022-03-31 | 2023-07-04 | 武汉天马微电子有限公司 | Pixel circuit, driving method thereof, array substrate, display panel and display device |
| CN114863872A (en) * | 2022-05-27 | 2022-08-05 | 武汉华星光电半导体显示技术有限公司 | Display module and display device |
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| CN105427805B (en) * | 2016-01-04 | 2018-09-14 | 京东方科技集团股份有限公司 | Pixel-driving circuit, method, display panel and display device |
| CN107507565B (en) * | 2017-09-28 | 2019-10-11 | 京东方科技集团股份有限公司 | Scanning signal generation method and device, display device |
| CN107610651B (en) * | 2017-10-31 | 2019-11-08 | 武汉天马微电子有限公司 | The driving method and display panel of pixel circuit, pixel circuit |
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| CN108922474B (en) * | 2018-06-22 | 2020-06-09 | 武汉华星光电半导体显示技术有限公司 | Pixel compensation circuit, driving method thereof and AMOLED display panel |
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