CN111796623B - PTAT reference current source circuit of high voltage power supply - Google Patents

PTAT reference current source circuit of high voltage power supply Download PDF

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CN111796623B
CN111796623B CN202010837632.9A CN202010837632A CN111796623B CN 111796623 B CN111796623 B CN 111796623B CN 202010837632 A CN202010837632 A CN 202010837632A CN 111796623 B CN111796623 B CN 111796623B
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tube
reference current
pmos
resistor
nmos tube
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CN111796623A (en
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石峰
连颖
任俊
黄亮
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BEIJING SUPLET POWER CO LTD
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices

Abstract

A PTAT reference current source circuit with high voltage power supply comprises a current absorption module and a PTAT reference current generation module, wherein the PTAT reference current generation module converts a temperature signal into a reference current output which is in direct proportion to absolute temperature through PNP type triode clamp, and adopts an LDMOS tube to replace a common MOS tube in the traditional structure, so that the circuit can adapt to high voltage power supply; aiming at the problems that the parasitic capacitance of a transistor is increased and dv/dt noise of input voltage is easier to crosstalk to the grid electrode of a fourth NMOS transistor to influence output reference current and the LDMOS transistor is larger in grid-source capacitance to cause slower starting speed caused by the fact that a common MOS is replaced by an LDMOS transistor, the LDMOS voltage-dividing current mirror and the capacitor noise filtering structure are designed, so that the LDMOS voltage-dividing current mirror can bear high voltage and reduce the influence of dv/dt noise, and meanwhile, the current absorption module is used for extracting the current of a PTAT reference current generation module to accelerate the speed of establishing a stable state of the reference current.

Description

PTAT reference current source circuit of high voltage power supply
Technical Field
The invention belongs to the technical field of electronic circuits, and relates to a PTAT reference current source circuit with high-voltage power supply.
Background
Reference current sources are widely used in analog circuitry to determine system bias or to provide a reference current signal. In most cases, the output current of the reference current source needs to have little temperature dependence or be Proportional To Absolute Temperature (PTAT). Taking the PTAT reference current source as an example, the PTAT reference current source may adjust the output reference current according to the temperature, and may compensate the influence of the temperature on the circuit system to a certain extent.
The basic principle of the PTAT reference current source is to collect emitter junction voltage of a triode to adjust output, and because the emitter junction voltage of the triode is closely related to temperature, when the temperature changes, the emitter junction voltage also changes, and then the reference current signal output which is in direct proportion to absolute temperature can be generated through operations such as amplification, clamping and the like. A typical temperature characteristic curve of a PTAT reference current source is shown in fig. 1, and since a transistor always has parasitic parameters and the accuracy of a model is limited, an actual temperature characteristic curve has a certain nonlinearity.
Most of the traditional PTAT reference current sources are designed for the power supply voltage below 5V, so that common MOS (metal oxide semiconductor) tubes are usually adopted, but the common MOS tubes cannot tolerate higher voltage and are not suitable for high-voltage power supply. However, in power electronic circuits, the supply voltage is often above 24V or even 36V, in which case the conventional PTAT reference current source design is no longer applicable and the LDMOS transistor must be used instead. The LDMOS transistor is different from a common MOS transistor in process and parameter, and needs to be specially designed and optimized. Therefore, in power electronic devices, the design of a PTAT reference current source for high voltage supply is important.
Disclosure of Invention
Aiming at the problem that a PTAT reference current source structure formed by a common MOS tube in the traditional scheme can not bear high voltage, the invention provides a PTAT reference current source circuit with high voltage power supply, wherein a PTAT reference current generation module adopts an LDMOS tube for reducing voltage and combines a PNP triode to generate reference current which is in direct proportion to absolute temperature, so that the problem that the traditional structure can not bear high voltage is solved; meanwhile, aiming at the dv/dt noise influence caused by replacing a common MOS (metal oxide semiconductor) with an LDMOS (laterally diffused metal oxide semiconductor) tube, the invention designs a first capacitor C to filter the noise caused by dv/dt; aiming at the problem of low starting speed of the LDMOS transistor, the invention designs the current absorption module to extract current from the PTAT reference current generation module, thereby accelerating the power-on starting process.
The technical scheme of the invention is as follows:
a PTAT reference current source circuit with high voltage power supply comprises a current absorption module and a PTAT reference current generation module,
the PTAT reference current generation module comprises a first PNP triode, a second resistor, a first capacitor, a third PMOS tube, a fourth PMOS tube, a third NMOS tube, a fourth NMOS tube and a fifth NMOS tube, wherein the third PMOS tube, the fourth PMOS tube, the third NMOS tube, the fourth NMOS tube and the fifth NMOS tube are LDMOS tubes, the size ratio of the third PMOS tube to the fourth PMOS tube is 1:1, and the size ratio of the third NMOS tube to the fourth NMOS tube is 1: 1;
the base electrode and the collector electrode of the first PNP type triode are interconnected and connected with the base electrode of the second PNP type triode and the source electrode of the third PMOS tube, and the emitting electrode of the first PNP type triode is connected with the power supply voltage;
the collector of the second PNP type triode is connected with the source of the fourth PMOS tube, and the emitter of the second PNP type triode is connected with the power supply voltage after passing through the second resistor;
the grid electrode of the third NMOS tube is connected with the grid electrode and the drain electrode of the fourth NMOS tube, the drain electrode of the fourth PMOS tube and the grid electrode of the fifth NMOS tube and is grounded after passing through the first capacitor;
the drain electrode of the fifth NMOS tube outputs a reference current which is in direct proportion to the absolute temperature;
the current absorption module comprises a first PMOS (P-channel metal oxide semiconductor) tube, a second PMOS tube, a first NMOS (N-channel metal oxide semiconductor) tube, a second NMOS tube and a first resistor, wherein the first PMOS tube, the second PMOS tube, the first NMOS tube and the second NMOS tube are LDMOS tubes;
the grid electrode of the second PMOS tube is connected with the grid electrode and the drain electrode of the first PMOS tube and the drain electrode of the first NMOS tube, the source electrode of the second PMOS tube is connected with the source electrode of the first PMOS tube and is connected with a power supply voltage, and the drain electrode of the second PMOS tube is connected with the grid electrode and the drain electrode of the second NMOS tube, the grid electrode of the first NMOS tube and the collector electrode of the first PNP type triode in the PTAT reference current generation module;
the size of the first PMOS tube is larger than that of the second PMOS tube, so that the current absorption module can extract current from a collector electrode of a first PNP type triode in the PTAT reference current generation module;
one end of the first resistor is connected with the source electrodes of the first NMOS tube and the second NMOS tube, and the other end of the first resistor is grounded.
Specifically, the current absorbed by the current absorption module from the collector of the first PNP triode can be controlled by adjusting the resistance of the first resistor, the larger the resistance of the first resistor is, the smaller the current is, and meanwhile, the first resistor is used for sharing the voltage drop of the high-voltage power supply; the first resistor is realized by selecting a polysilicon resistor or a well resistor.
Specifically, the size ratio of the first PMOS tube to the second PMOS tube is set to be 1.5: 1.
The invention has the beneficial effects that: the invention adopts the LDMOS tube to adapt to high-voltage power supply, and solves the voltage withstanding problem of a PTAT reference current source structure formed by a common MOS tube; a noise filtering structure formed by the first capacitor C is designed, and dv/dt noise influence caused by power supply voltage jump can be well resisted; the current of the PTAT reference current generating module is extracted by the current absorbing module, so that the speed of establishing a stable state of the reference current is increased.
Drawings
Fig. 1 is a graph of the temperature characteristic of a conventional PTAT reference current source.
Fig. 2 is a schematic diagram of a specific structure of a high-voltage supply PTAT reference current source circuit according to the present invention.
Fig. 3 is a waveform diagram of an operation of a PTAT reference current source powered by a high voltage according to the present invention when power is down, where (a) in fig. 3 is a waveform diagram when the first capacitor C is not provided for filtering, and (b) in fig. 3 is a waveform diagram when the first capacitor C is provided for filtering.
Fig. 4 is a waveform diagram of an operation of a PTAT reference current source powered by a high voltage according to the present invention, where (a) in fig. 4 is a waveform diagram when no current sink module is provided, and (b) in fig. 4 is a waveform diagram after a current sink module is provided.
Detailed Description
The technical solution of the present invention is described in detail below with reference to the accompanying drawings and specific embodiments.
As shown in fig. 2, the PTAT reference current source circuit with high voltage power supply according to the present invention includes a current absorption module and a PTAT reference current generation module, wherein the PTAT reference current generation module includes a first PNP transistor Q1, a second PNP transistor Q2, a second resistor R2, a first capacitor C, a third PMOS transistor P3, a fourth PMOS transistor P4, a third NMOS transistor N3, a fourth NMOS transistor N4, and a fifth NMOS transistor N5, a base and a collector of the first PNP transistor Q1 are interconnected and connected to a base of the second PNP transistor Q2 and a source of the third PMOS transistor P3, and an emitter thereof is connected to a supply voltage VCC; a collector of the second PNP transistor Q2 is connected to a source of the fourth PMOS transistor P4, and an emitter thereof is connected to the supply voltage VCC through the second resistor R2; the grid electrode of the third NMOS tube N3 is connected with the grid electrode and the drain electrode of the fourth NMOS tube N4, the drain electrode of the fourth PMOS tube P4 and the grid electrode of the fifth NMOS tube N5 and is grounded after passing through the first capacitor C, the drain electrode of the third NMOS tube N3 is connected with the grid electrode and the drain electrode of the third PMOS tube P3 and the grid electrode of the fourth PMOS tube P4, and the source electrode of the third NMOS tube N3 is connected with the source electrodes of the fourth NMOS tube N4 and the fifth NMOS tube N5 and is grounded; the drain of the fifth NMOS transistor N5 outputs a reference current proportional to absolute temperature.
In the PTAT reference current generation module, a third PMOS tube P3, a fourth PMOS tube P4, a third NMOS tube N3, a fourth NMOS tube N4 and a fifth NMOS tube N5 are LDMOS tubes, the LDMOS tubes are used for bearing high-voltage power supply, and temperature signals are converted into reference currents which are in direct proportion to absolute temperature through PNP type triode clamping by combining the characteristic that the voltage of a PNP type triode emitter junction is closely related to the temperature and outputting. The third PMOS tube P3, the fourth PMOS tube P4, the third NMOS tube N3 and the fourth NMOS tube N4 form a bootstrap structure, the size ratio of the third PMOS tube P3 to the fourth PMOS tube P4 is set to be 1:1, the size ratio of the third NMOS tube N3 to the fourth NMOS tube N4 is set to be 1:1, and voltage clamping is achieved.
The current sinking module is used for drawing current from the PTAT reference current generating module to realize accelerated start, as shown in fig. 2, the current sinking module provided by the present invention includes a first PMOS transistor P1, a second PMOS transistor P2, a first NMOS transistor N1, a second NMOS transistor N2, and a first resistor R1, wherein the first PMOS transistor P1, the second PMOS transistor P2, the first NMOS transistor N1, and the second NMOS transistor N2 are LDMOS transistors; the grid electrode of the second PMOS tube P2 is connected with the grid electrode and the drain electrode of the first PMOS tube P1 and the drain electrode of the first NMOS tube N1, the source electrode of the second PMOS tube P3578 is connected with the source electrode of the first PMOS tube P1 and is connected with a power supply voltage VCC, and the drain electrode of the second PMOS tube P2 is connected with the grid electrode and the drain electrode of the second NMOS tube N1, the grid electrode of the first NMOS tube N1 and the collector electrode of a first PNP type triode Q1 in the PTAT reference current generating module; setting the size of the first PMOS transistor P1 to be larger than the size of the second PMOS transistor P2 enables the current sinking module to draw current from the collector of the first PNP transistor Q1 in the PTAT reference current generating module; one end of the first resistor R1 is connected to the sources of the first NMOS transistor N1 and the second NMOS transistor N2, and the other end is grounded.
The working principle and working process of the present invention are described in detail below:
when the power-on is started, the power supply voltage VCC is given by the outside, and rises slowly from zero, and the first PNP transistor Q1 and the second NMOS transistor N2 start to be turned on first and have current flowing through. The current flows from the emitter of the first PNP transistor Q1 to the first resistor R1 through the second NMOS transistor N2. With the second NMOS transistor N2 turned on, the first NMOS transistor N1, the first PMOS transistor P1 and the second PMOS transistor P2 also turn on and establish a bias quickly. According to the invention, the size of the first PMOS tube P1 is slightly larger than that of the second PMOS tube P2, so that the current flowing through the second PMOS tube P2 is slightly smaller than that of the second NMOS tube N2, and the current needs to be extracted from the collector of the first PNP type triode Q1. In the embodiment shown in fig. 2, the ratio of the sizes of the first PMOS transistor P1 and the second PMOS transistor P2 is 1.5:1, but other ratios can be adopted as long as the size of the first PMOS transistor P1 is slightly larger than the size of the second PMOS transistor P2 and is approximately 1: 1. Similarly, the size ratio of the first PNP transistor Q1 to the second PNP transistor Q2 in the embodiment shown in fig. 2 is set to 1:2, and may be different according to practical applications.
Meanwhile, the conduction of the first PNP transistor Q1 turns on the emitter junction of the second PNP transistor Q2, so that a small current flows to the source of the fourth PMOS transistor P4 and the gate of the fourth NMOS transistor N4 to charge the gate node of the fourth NMOS transistor N4. As the gate voltage of the fourth NMOS transistor N4 gradually increases, the fourth NMOS transistor N4 is turned on together with the third NMOS transistor N3 and the fifth NMOS transistor N5. Since the third PMOS transistor P3, the fourth PMOS transistor P4, the third NMOS transistor N3, and the fourth NMOS transistor N4 form a bootstrap structure, the third PMOS transistor P3 and the fourth PMOS transistor P4 are also turned on quickly. To this end, all tubes in fig. 2 have been brought into a conducting state. With the completion of the establishment of the supply voltage VCC, the entire circuit quickly enters a stable operating state.
In steady state, the current I drawn by the current sink module from the PTAT reference current generating module is taken into accountsinkThen, it is known that the emitter junction voltages of the first PNP transistor Q1 and the second PNP transistor Q2 satisfy the following relations:
Figure BDA0002640280770000041
Figure BDA0002640280770000042
VR2+Vbe2＝Vbe1
IQ1≈IQ2+Isink
in the formula Vbe1Representing the emitter junction voltage, V, of the first PNP transistor Q1be2Representing the emitter junction voltage, V, of a second PNP transistor Q2R2Is the voltage across the second resistor R2. I isQ1Is the emitter current of a first PNP transistor Q1Q2Is the emitter current of the second PNP transistor Q2. I issIt is the reverse saturation current of the first PNP transistor Q1. k is boltzmann constant, q is electron charge amount, and T is absolute temperature.
Obviously, the current I flowing through the second resistor R2 can be solved by combining the above equationsR2Is composed of
Figure BDA0002640280770000051
R2Is the resistance of the second resistor R2. It is apparent that the current flowing through the second resistor R2 will be proportional to absolute temperature, satisfying the PTAT relationship. The current flowing through the second resistor R2 is mirrored to the output end through a current mirror formed by a fourth NMOS tube N4 and a fifth NMOS tube N5, and the output reference current signal I is determinedOUT。
Fig. 3 is a waveform diagram illustrating the operation of the PTAT reference current source circuit of the present invention in a power-down state. When power failure occurs, the supply voltage VCC may rapidly drop to a lower level, and corresponding dv/dt noise signals may cross-talk to the gate of the fourth NMOS transistor N4 through parasitic capacitors of the first PNP transistor Q1, the second PNP transistor Q2, the third PMOS transistor P3, the fourth PMOS transistor P4, and the third NMOS transistor N3, and if there is no filter capacitor, i.e., the first capacitor C, the gate voltage V of the fourth NMOS transistor N4 may be causedGToo low, even the fourth NMOS transistor N4 is turned off. Since the third PMOS transistor P3, the fourth PMOS transistor P4, the third NMOS transistor N3 and the fourth NMOS transistor N4 form a bootstrap structure, if the fourth PMOS transistor P4, the fourth NMOS transistor N4 forms a bootstrap structureWhen the NMOS transistor N4 is turned off, it may cause the third PMOS transistor P3, the fourth PMOS transistor P4, and the third NMOS transistor N3 to be turned off at the same time, and the PTAT reference current generating module is locked in a state of zero output current, as shown in fig. 3 (a). In order to solve the problem, the invention provides a first capacitor C to stabilize the gate voltage of the fourth NMOS transistor N4 and filter noise caused by dv/dt. The waveform with the filter capacitor C is shown in FIG. 3(b), and the gate voltage V of the fourth NMOS transistor N4 is due to the filtering effect of the capacitorGHas much smaller voltage fluctuation, and after the supply voltage VCC is stabilized, V isGIt returns to the normal potential again. The value of the first capacitor C can be adjusted by a person skilled in the art according to actual conditions, the transient response speed is influenced if the value is too large, and the filtering effect is not easily achieved if the value is too small.
Fig. 4 shows the operating waveforms with and without the current absorption module. The current sinking module acts to speed up the start of the PTAT power-up. During the power-up process, the level of the supply voltage VCC will rise slowly, and the corresponding dv/dt noise will cause the gate voltage V4 of the fourth NMOS transistor N4GThe node has excess charge compared to the node which is higher in the steady state. When the power-up is finished, the supply voltage VCC is at a stable level, and the voltage at the gate of the fourth NMOS transistor N4 gradually returns to a stable state. If there is no current sinking module, as shown in fig. 4 (a), the excess charge at the gate of the fourth NMOS transistor N4 will slowly bleed through the parasitic path to ground until the gate voltage of the fourth NMOS transistor N4 returns to the normal level, and this bleeding process will be slow, which affects the speed of steady state establishment. After the current sinking module is added, the current sinking module draws a part of current from the PTAT reference current generating module, so that the current flowing through the third NMOS transistor N3 is reduced; the reduction of the current of the third NMOS transistor N3 will cause the feedback loop inside the PTAT to adjust and the gate level of the fourth NMOS transistor N4 will decrease to the normal level more quickly. Therefore, after the current sink module is added, the speed of establishing the steady state is increased, as shown in fig. 4 (b). It can be seen that there is a slight decrease in amplitude at 50us in fig. 4 (a) and (b), but due to V in the figureGThe DC voltage of (A) is 800 mV, while the drop amplitude of (a) in FIG. 4 is about 20 mV and the drop amplitude of (b) in FIG. 4 is about 20 mVThe degree is about 1 millivolt, much smaller relative to the dc voltage, so the magnitude of the drop is less apparent in fig. 4.
Current I drawn by the current sink modulesinkIs determined by the following formula:
Figure BDA0002640280770000061
wherein VccVoltage value, V, representing supply voltageGS,N2Is the gate-source voltage, R, of the second NMOS transistor N21Is the resistance of the first resistor R1. The current I drawn by the current sink module can be controlled by adjusting the resistance value of the first resistor R1sinkThe larger the resistance value of the first resistor R1, the smaller the current drawn, while the first resistor R1 is used to share the voltage drop of the high voltage supply. Since the current draw of the current sink module cannot be too large, otherwise, the power consumption is easily increased significantly, and to reduce the current draw value, the first resistor R1 must be made into a large resistor; in practice, the first resistor R1 shares a large part of the voltage drop, so the first resistor R1 is also required to share the high voltage, and the first resistor R1 can be implemented by using polysilicon resistor process, or by selecting well resistor to implement the first resistor R1. The second resistor R2 is a small and medium resistor, and the first capacitor C is a small filter capacitor, all of which are conventional devices.
Therefore, after the device parameters are reasonably determined, the whole circuit can output PTAT reference current under high-voltage power supply.
In summary, the invention provides a PTAT reference current source circuit, in order to adapt to high voltage power supply, a common MOS transistor in the conventional structure is replaced by an LDMOS transistor, so that the voltage withstand problem of the PTAT reference current source structure formed by the common MOS transistor is solved; and after the common MOS is replaced by the LDMOS, the parasitic capacitance of a tube is increased, dv/dt noise of input voltage is easier to crosstalk to the grid electrode of the fourth NMOS tube N4 to influence output reference current, and the LDMOS grid source capacitance is larger to cause slower starting speed.
Those skilled in the art can make various other specific changes and combinations based on the teachings of the present invention without departing from the spirit of the invention, and these changes and combinations are within the scope of the invention.

Claims (3)

1. A PTAT reference current source circuit with high voltage power supply is characterized by comprising a current absorption module and a PTAT reference current generation module,
the PTAT reference current generation module comprises a first PNP triode, a second resistor, a first capacitor, a third PMOS tube, a fourth PMOS tube, a third NMOS tube, a fourth NMOS tube and a fifth NMOS tube, wherein the third PMOS tube, the fourth PMOS tube, the third NMOS tube, the fourth NMOS tube and the fifth NMOS tube are LDMOS tubes, the size ratio of the third PMOS tube to the fourth PMOS tube is 1:1, and the size ratio of the third NMOS tube to the fourth NMOS tube is 1: 1;
the base electrode and the collector electrode of the first PNP type triode are interconnected and connected with the base electrode of the second PNP type triode and the source electrode of the third PMOS tube, and the emitting electrode of the first PNP type triode is connected with the power supply voltage;
the collector of the second PNP type triode is connected with the source of the fourth PMOS tube, and the emitter of the second PNP type triode is connected with the power supply voltage after passing through the second resistor;
the grid electrode of the third NMOS tube is connected with the grid electrode and the drain electrode of the fourth NMOS tube, the drain electrode of the fourth PMOS tube and the grid electrode of the fifth NMOS tube and is grounded after passing through the first capacitor;
the drain electrode of the fifth NMOS tube outputs a reference current which is in direct proportion to the absolute temperature;
the current absorption module comprises a first PMOS (P-channel metal oxide semiconductor) tube, a second PMOS tube, a first NMOS (N-channel metal oxide semiconductor) tube, a second NMOS tube and a first resistor, wherein the first PMOS tube, the second PMOS tube, the first NMOS tube and the second NMOS tube are LDMOS tubes;
the grid electrode of the second PMOS tube is connected with the grid electrode and the drain electrode of the first PMOS tube and the drain electrode of the first NMOS tube, the source electrode of the second PMOS tube is connected with the source electrode of the first PMOS tube and is connected with a power supply voltage, and the drain electrode of the second PMOS tube is connected with the grid electrode and the drain electrode of the second NMOS tube, the grid electrode of the first NMOS tube and the collector electrode of the first PNP type triode in the PTAT reference current generation module;
the size of the first PMOS tube is larger than that of the second PMOS tube, so that the current absorption module can extract current from a collector electrode of a first PNP type triode in the PTAT reference current generation module;
one end of the first resistor is connected with the source electrodes of the first NMOS tube and the second NMOS tube, and the other end of the first resistor is grounded.
2. The PTAT reference current source circuit powered by high voltage as claimed in claim 1, wherein the current drawn by the current sinking module from the collector of the first PNP type triode can be controlled by adjusting the resistance of the first resistor, the larger the resistance of the first resistor is, the smaller the current is drawn, and meanwhile, the first resistor is used for sharing the voltage drop of the high voltage power supply; the first resistor is realized by selecting a polysilicon resistor or a well resistor.
3. The high-voltage power supply PTAT reference current source circuit as claimed in claim 1 or 2 wherein the first PMOS transistor and the second PMOS transistor are arranged in a size ratio of 1.5: 1.
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CN102385407A (en) * 2011-09-21 2012-03-21 电子科技大学 Bandgap reference voltage source
CN103412605A (en) * 2013-07-17 2013-11-27 电子科技大学 Higher-order temperature compensation non-resistor band-gap reference voltage source
CN107005144A (en) * 2014-12-09 2017-08-01 梅鲁斯音频有限公司 Regulation high side gate drive device circuit for power transistor

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