CN110347203B - Broadband low-power-consumption band-gap reference circuit - Google Patents
Broadband low-power-consumption band-gap reference circuit Download PDFInfo
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- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
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Abstract
The invention discloses a broadband low-power-consumption band-gap reference circuit, which relates to the integrated circuit technology and comprises a band-gap core circuit, a feedback circuit and a starting circuit; the band gap core circuit comprises a current mirror; the feedback circuit comprises a first MOS transistor (MN1), a second MOS transistor (MN2), a third MOS transistor (MN3), a third triode (Q3) and a first capacitor (C1); the starting circuit comprises a fourth MOS tube (MP4), a fifth MOS tube (MP5), a sixth MOS tube (MN4), a seventh MOS tube (MN3) and a fourth triode (Q4); the invention adopts a band gap core structure without operational amplifier, which can effectively reduce power consumption and layout area.
Description
Technical Field
The present invention relates to the field of integrated circuit technology.
Background
Both analog and digital circuits require a reference source, and a bandgap reference voltage source is a widely used reference circuit for providing a dc voltage independent of temperature and supply voltage. In a conventional bandgap reference circuit, as shown in fig. 1, a high-precision operational amplifier performs voltage clamping to enable a bandgap core part to generate a PTAT current, and the PTAT current is mirrored to a resistor and a triode to generate a bandgap reference voltage. The high-precision operational amplifier not only increases the complexity of the design, but also increases the power consumption of the operational amplifier, which is unacceptable for the application of low power consumption, and a new structure and a design idea must be adopted to realize a low-power consumption bandgap reference structure.
FIG. 1 shows a conventional bandgap reference circuit, in which the operational amplifier is used to clamp the potentials of the drain of the NMOS transistor MP6 and the drain of the NMOS transistor MP7, and the bandgap core structure generates a current I proportional to the temperaturePTAT＝ΔVBE/R4, passing I through a current mirrorPTATMirrored onto resistor R5 and transistor Q7 to form a temperature independent voltage VREF＝VBE+IPTAT×R5. The use of the operational amplifier enables the layout area and the power consumption to be increased a lot, on the other hand, the design of the operational amplifier is also very important, and if the offset of the operational amplifier is too large or the bandwidth is very small, the function or the performance of the band-gap reference circuit can be affected.
Disclosure of Invention
The invention aims to solve the technical problem of providing a broadband low-power-consumption band-gap reference circuit aiming at the problem of overlarge power consumption when the band-gap reference circuit works.
The technical scheme adopted for solving the technical problems is that the broadband low-power-consumption band-gap reference circuit is characterized by comprising a band-gap core circuit, a feedback circuit and a starting circuit;
the band-gap core circuit comprises a current mirror, wherein the input end of the current mirror is connected with a VDD end, a first current branch of the current mirror is connected with the first end of a first resistor R1 through a first triode Q1, a second current branch of the current mirror is connected with the first end of a second resistor R2 through a second triode Q2, and the connection point of the second end of the first resistor R1 and the second end of a second resistor R2 is grounded through a third resistor R3: the resistance value of the first resistor R1 is greater than that of the second resistor R2:
the feedback circuit comprises a first MOS tube MN1, a second MOS tube MN2, a third MOS tube MP3, a third triode Q3 and a first capacitor C1; the input end of the first MOS tube MN1 is connected with a VDD end, and the output end of the first MOS tube MN 3578 is connected with the grid electrode of the second MOS tube MN 2; the input end of the second MOS tube MN2 is connected with a VDD end, and the output end is connected with a first reference point; the input end of the third MOS tube MP3 is connected with the VDD end, the output end is connected with the grid electrode of the second MOS tube MN2, and the third MOS tube MP3 is also connected with a second reference point through a third triode Q3; the first reference point is connected with the bases of a first triode Q1, a second triode Q2 and a third triode Q3; the second reference point is connected with the first end of the second resistor R2 and is also grounded through the first capacitor C1;
the starting circuit comprises a fourth MOS tube MP4, a fifth MOS tube MP5, a sixth MOS tube MN4, a seventh MOS tube MN3 and a fourth triode Q4; the grid electrode of the fourth MOS tube MP4 is grounded, the input end is connected with VDD, and the output end is connected with the grid electrode of the first MOS tube MN 1; the input end of the fifth MOS tube is connected with a VDD end, and the grid and the output end of the fifth MOS tube are connected with the input end of a fourth triode Q4; the input end of a sixth MOS tube MN4 is connected with the input end of a fourth triode Q4, the grid electrode of the sixth MOS tube MN4 is connected with the output end of a fourth MOS tube MP4, and the output end of the sixth MOS tube MN4 is connected with a second reference point; the input end of the seventh MOS transistor MN3 is connected with the output end of the fourth MOS transistor MP4, the grid electrode is connected with a first reference point, and the output end is grounded; the output end of the fourth triode is connected with the second reference point, the base electrode of the fourth triode is connected with the first reference point, and the first reference point is connected with the output end VREF of the band-gap reference circuit.
The first MOS tube, the second MOS tube, the sixth MOS tube and the seventh MOS tube are NMOS tubes, and the third MOS tube, the fourth MOS tube and the fifth MOS tube are PMOS tubes.
The invention has the beneficial effects that: the band gap core structure without operational amplifier can effectively reduce power consumption and layout area; a feedback circuit is adopted to form a negative feedback structure, so that the stability of the band gap structure is improved; the current on the feedback circuit and the start-up circuit finally flows through the band gap core circuit, and the current effectively reduces the resistance in the band gap core circuit.
Drawings
FIG. 1 is a diagram of a conventional bandgap reference circuit;
FIG. 2 is a bandgap reference circuit diagram according to the present invention;
FIG. 3 is the bandgap core circuit of FIG. 2;
FIG. 4 is the feedback circuit of FIG. 2;
FIG. 5 is the start-up circuit of FIG. 2;
Detailed Description
The invention provides a broadband low-power-consumption band-gap reference voltage source, which replaces a high-precision operational amplifier with a negative feedback loop on the basis of a traditional band-gap reference circuit, reduces the power consumption of the whole circuit, widens the circuit bandwidth and improves the speed of the band-gap reference circuit.
The invention is described in detail below with reference to the accompanying drawings and specific embodiments.
Referring to fig. 2, the wideband low-power bandgap reference circuit of the present invention is composed of a bandgap core circuit, a feedback circuit and a start circuit.
A band gap core circuit: the core function is realized, and the band-gap reference voltage is generated.
A feedback circuit: and controlling the working point of the loop to maintain the stability of the loop.
The starting circuit: the starting of the bandgap reference circuit prevents the circuit from entering a degenerate state.
The working process of the circuit of the invention is as follows: the start circuit injects circuit into the band gap core circuit to startWorking of a band gap reference; the band-gap core circuit generates the required band-gap reference voltage VREF(ii) a The feedback circuit maintains the stability of the whole loop.
The bandgap core circuit, the feedback circuit and the start-up circuit are described in detail below:
a band gap core circuit:
the band gap core circuit comprises a first PMOS tube MP1, a second PMOS tube MP2, a first triode Q1, a second triode Q2, a first resistor R1, a second resistor R2 and a third resistor R3. Wherein m of Q1 is 10, m of Q2 is 1, and the resistance of the resistor R1 is larger than that of the resistor R2. The connection relationship of the devices is as follows:
the source electrode of the first PMOS tube MP1 is connected with VDD, the grid electrode is connected with the grid electrode of the second PMOS tube MP2, and the drain electrode is connected with the collector electrode of the first triode Q1; the source electrode of the second PMOS pipe MP2 is connected with VDD, and the grid electrode and the drain electrode are interconnected; the collector of the first triode Q1 is connected with the drain of the first PMOS tube MP1, the base is connected with the base of the second triode Q2, and the emitter is sequentially connected with the first resistor R1 and the third resistor R3 to the ground; the collector of the second triode Q2 is connected with the drain of the second PMOS tube MP2, and the emitter is sequentially connected with the second resistor R2 and the third resistor R3 to the ground.
The base electrodes of the transistors Q1, Q2, Q3 and Q4 are connected to form a PTAT current I with the resistors R1 and R2PTAT＝ΔVBE/(R1-3R2). Since MP1 and MP2 form a current mirror structure, the currents on the transistors Q1 and Q2 are both IPTATFinally, a band gap voltage V is formed at the base of the triode Q2REF＝VBE2+IPTAT×(3R2+4R3)。
Compared with the traditional band-gap reference voltage, the band-gap core circuit reduces the use of operational amplifier, provides the bias current of the feedback circuit and the starting circuit, can effectively reduce the power consumption and simplify the circuit structure.
A feedback circuit:
the feedback circuit comprises a third MOS transistor MP3, a first MOS transistor MN1, a second MOS transistor MN2 and a first capacitor C1, wherein m of the transistor Q3 is 1. The connection relationship of the devices is as follows:
the source electrode of the third MOS transistor MP3 is connected with VDD, the grid electrode is connected with the drain electrode of the first PMOS transistor MP1, and the drain electrode is connected with the collector electrode of a third triode Q3; the base electrode of the third triode Q3 is connected with the base electrode of the first triode Q1, and the collector electrode is connected with the collector electrode of the second triode Q2; the drain of the first MOS transistor MN1 is connected with VDD, the grid is connected with the drain of the fourth MOS transistor MP4, and the source is connected with the drain of the third MOS transistor MP 3; the drain electrode of the second MOS transistor MN2 is connected with VDD, the grid electrode is connected with the drain electrode of the third MOS transistor MP3, and the source electrode is connected with the grid electrode of the first triode Q1; one end of the first capacitor C1 is connected to the emitter of the second transistor Q2, and the other end is grounded.
The first MOS transistor MN1 is turned on at startup, and MN1 is in an off state during normal operation. The feedback circuit and the band gap core circuit form negative feedback, the negative feedback structure is favorable for stabilizing the voltage bias of a loop and inhibiting the disturbance of a power supply VDD, and the specific principle is as follows:
when the potential rises due to the disturbance of the band gap voltage VREF, the current increment delta I of the triode Q2 is increased because R1 is larger than R22Greater than the current increment delta I on the transistor Q11This causes the MP1 transistor to pull the potential at point a (gate of MP3) high. In order to maintain the current on the transistor Q3 constant, the potential at point B (gate of MN2) is lowered. Since the NMOS transistor MN2 constitutes a source follower structure, the bandgap reference voltage VREF decreases with the decrease of the point B, and the loop becomes stable by suppressing the change of VREF.
When the power supply voltage VDD is disturbed to generate increment, the grid-source voltage of the PMOS tube MP3 is increased, the potential of a point B is increased, and the bandgap reference voltage VREF is increased along with the increase of the point B because the NMOS tube MN2 forms a source follower structure. As described above, the increase of VREF increases the potential at point a, and suppresses the variation of the gate-source voltage of the PMOS transistor MP3, so that the loop becomes stable.
The frequency compensation of the circuit does not adopt a Miller compensation structure, and is compensated by a capacitor C1 to reach a proper phase margin. The dominant pole of the loop is far from the origin, which results in a loop with a large unity gain bandwidth and a fast response.
The starting circuit:
the starting circuit comprises a fourth MOS transistor MP4, a fifth MOS transistor MP5, a seventh MOS transistor MN3, a sixth MOS transistor MN4 and a fourth triode Q4, wherein the fourth MOS transistor is a PMOS transistor and adopts an inverse ratio transistor. The connection relationship of the devices is as follows:
the source electrode of the fourth MOS tube MP4 is connected with VDD, the grid electrode is grounded, and the drain electrode is connected with the drain electrode of the third NMOS tube MP 3; the source electrode of the fifth MOS tube MP5 is connected with VDD, and the grid electrode and the drain electrode are interconnected; the grid electrode of the seventh MOS transistor MN3 is connected with the base electrode of the first triode Q1, and the source electrode is grounded; the drain electrode of the sixth MOS transistor MN4 is connected with the drain electrode of the fifth PMOS transistor MP5, the grid electrode of the sixth MOS transistor MN4 is connected with the drain electrode of the seventh MOS transistor MN3, and the source electrode of the sixth MOS transistor MN 3578 is connected with the emitter electrode of the second triode Q2; the collector of the fourth triode is connected with the drain of the fifth MOS transistor MP5, the emitter is connected with the emitter of the second triode Q2, and the gate is connected with the base of the first triode Q1 and also connected with the output pin VREF.
The starting circuit is used for starting the band-gap reference circuit at the real stage of the circuit and preventing the circuit from working in a degenerate state.
The power-on process of the starting circuit comprises the following steps: since the gate of the PMOS transistor MP4 is grounded, when the circuit is not in the operating state, the potential of the point C (gate of MN1) is high; at the moment, the NMOS transistor MN4 is conducted, current flows into the band gap core circuit after passing through the PMOS transistor MP5 and the NMOS transistor MN4 and charges the capacitor C1, and meanwhile, the NMOS transistor MN1 is conducted, so that the MN2 transistor is also conducted, and the band gap reference voltage VREF is pulled up; since the PMOS transistor MP2 is in diode connection, current flows through the MP2 and is mirrored to the MP1 transistor, and the band gap core circuit starts to work; when the band gap reference voltage VREF rises above the threshold voltage of the MN3 tube, the potential of the point C becomes low, the MN1 tube and the MN4 tube are switched off, and the MP4 tube of the PMOS tube adopts an inverse ratio tube design, so that the static power consumption can be greatly reduced; the current on the MP5 tube flows through the Q4 tube and finally flows into the band gap core structure, and the size of the resistor R3 is reduced.
In conclusion, the invention simplifies the circuit, has lower power consumption, has smaller size of the band gap core resistor, has larger bandwidth and can stably work under the conditions of temperature, voltage and power supply disturbance.
Claims (2)
1. The broadband low-power-consumption band-gap reference circuit is characterized by comprising a band-gap core circuit, a feedback circuit and a starting circuit;
the band-gap core circuit comprises a current mirror, wherein the input end of the current mirror is connected with a VDD end, a first current branch of the current mirror is connected with the first end of a first resistor (R1) through a first triode (Q1), a second current branch is connected with the first end of a second resistor (R2) through a second triode (Q2), the connection point of the second end of the first resistor (R1) and the second end of the second resistor (R2) is grounded through a third resistor (R3), and the resistance value of the first resistor (R1) is larger than that of the second resistor (R2):
the feedback circuit comprises a first MOS tube (MN1), a second MOS tube (MN2), a third MOS tube (MP3), a third triode (Q3) and a first capacitor (C1); the input end of the first MOS tube (MN1) is connected with a VDD end, and the output end of the first MOS tube (MN 3578) is connected with the grid electrode of the second MOS tube (MN 2); the input end of the second MOS tube (MN2) is connected with a VDD end, and the output end is connected with a first reference point; the input end of the third MOS tube (MP3) is connected with a VDD end, the output end of the third MOS tube (MP3) is connected with the grid electrode of the second MOS tube (MN2), and the third MOS tube (MP3) is also connected with a second reference point through a third triode (Q3); the first reference point is connected with the bases of a first triode (Q1), a second triode (Q2) and a third triode (Q3); the second reference point is connected with the first end of a second resistor (R2) and is also grounded through a first capacitor (C1);
the starting circuit comprises a fourth MOS tube (MP4), a fifth MOS tube (MP5), a sixth MOS tube (MN4), a seventh MOS tube (MN3) and a fourth triode (Q4); the grid electrode of the fourth MOS tube (MP4) is grounded, the input end is connected with VDD, and the output end is connected with the grid electrode of the first MOS tube (MN 1); the input end of the fifth MOS tube is connected with a VDD end, and the grid and the output end of the fifth MOS tube are connected with the input end of a fourth triode (Q4); the input end of the sixth MOS tube (MN4) is connected with the input end of the fourth triode (Q4), the grid electrode of the sixth MOS tube is connected with the output end of the fourth MOS tube (MP4), and the output end of the sixth MOS tube is connected with a second reference point; the input end of the seventh MOS tube (MN3) is connected with the output end of the fourth MOS tube (MP4), the grid electrode is connected with a first reference point, and the output end is grounded; the output end of the fourth triode is connected with the second reference point, the base electrode of the fourth triode is connected with the first reference point, and the first reference point is connected with the output end VREF of the band-gap reference circuit.
2. The broadband low-power-consumption bandgap reference circuit according to claim 1, wherein the first MOS transistor, the second MOS transistor, the sixth MOS transistor and the seventh MOS transistor are NMOS transistors, and the third MOS transistor, the fourth MOS transistor and the fifth MOS transistor are PMOS transistors.
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| CN111381625B (en) * | 2020-03-12 | 2022-05-20 | 上海华虹宏力半导体制造有限公司 | Reference source circuit |
| CN112398080B (en) * | 2020-10-20 | 2022-10-21 | 中国科学院微电子研究所 | Overcurrent protection device |
| CN113485505B (en) * | 2021-07-05 | 2022-07-29 | 成都华微电子科技股份有限公司 | High-voltage low-power-consumption band-gap reference voltage source |
| CN114706442B (en) * | 2022-04-12 | 2023-07-14 | 中国电子科技集团公司第五十八研究所 | Low-power consumption band-gap reference circuit |
| CN115016581B (en) * | 2022-05-31 | 2024-02-02 | 电子科技大学长三角研究院(湖州) | Band-gap reference circuit structure with starting circuit |
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| JP3998487B2 (en) * | 2002-02-14 | 2007-10-24 | ローム株式会社 | Constant voltage generator |
| CN101840240B (en) * | 2010-03-26 | 2012-11-21 | 东莞电子科技大学电子信息工程研究院 | Adjustable multi-value output reference voltage source |
| CN102331811A (en) * | 2011-07-19 | 2012-01-25 | 暨南大学 | Band gap reference voltage source circuit |
| CN103760944B (en) * | 2014-02-10 | 2016-04-06 | 绍兴光大芯业微电子有限公司 | Realize base current compensation without amplifier internal electric source structure |
| CN204808100U (en) * | 2015-07-08 | 2015-11-25 | 北京兆易创新科技股份有限公司 | There is not band gap reference circuit that fortune was lowerd and is lowerd consumption |
| CN105867504B (en) * | 2016-06-13 | 2017-04-12 | 电子科技大学 | Reference voltage source with high power supply rejection ratio (PSRR) |
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