CN111785226B - Signal transmission line structure and display panel - Google Patents
Signal transmission line structure and display panel Download PDFInfo
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- CN111785226B CN111785226B CN202010652208.7A CN202010652208A CN111785226B CN 111785226 B CN111785226 B CN 111785226B CN 202010652208 A CN202010652208 A CN 202010652208A CN 111785226 B CN111785226 B CN 111785226B
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- signal transmission
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
Abstract
The application discloses a signal transmission line structure and a display panel, wherein the signal transmission line structure comprises a first signal transmission line; a second signal transmission line; and a third signal transmission line. The third signal transmission line is connected with the first signal transmission channel in parallel, so that a second signal transmission channel with lower impedance can be formed; the display panel is provided with the signal transmission line structure, so that the impedance of each input signal transmitted in the display panel can be reduced to be balanced.
Description
Technical Field
The application relates to the technical field of display, especially relates to GOA drive technical field, concretely relates to signal transmission line structure and display panel.
Background
Currently, most gate driving circuits of display panels employ a goa (gate on array) circuit. The GOA circuit includes an input signal and a plurality of cascaded GOA unit circuits, wherein the input signal may include square wave signals such as a scan start signal and a clock signal.
The square wave signals are transmitted from the outside of the display panel to the GOA circuit through corresponding wires, and the paths passed by the wires are different, so that the impedance of each wire is different, and the impedance delay of each input signal, especially each clock signal, is different.
The impedance difference of the clock signals easily causes the difference of the rising edge and/or the falling edge of the clock signals, thereby causing the problems of the display panel such as the generation of equidistant horizontal lines.
This differentiation is exacerbated as the resolution and/or refresh frequency of display panels continues to increase.
Disclosure of Invention
The application provides a signal transmission line structure, has solved the great problem of impedance that each input signal received in display panel transmission.
The application provides a display panel, includes foretell signal transmission line structure at least, it can reduce the impedance that input signal transmitted and received in display panel, and then has solved because the impedance that each input signal transmitted and received in display panel is unbalanced, the equidistant horizontal line that leads to shows the problem.
In a first aspect, the present application provides a signal transmission line structure comprising: a first signal transmission line on the first metal layer; a second signal transmission line on the second metal layer; the first via hole is positioned on the first metal layer and the second metal layer and is used for electrically connecting the first signal transmission line and the second signal transmission line so as to form a first signal transmission channel; and a third signal transmission line located on the third metal layer, electrically connected with the first signal transmission line and/or the second signal transmission line, and used for connecting the first signal transmission channel in parallel to form a second signal transmission channel.
Based on the first aspect, in the first implementation manner of the first aspect, the width of the third signal transmission line is not greater than the width of the first signal transmission line or the second signal transmission line.
Based on the first implementation manner of the first aspect, in the second implementation manner of the first aspect, the orthographic projection of the third signal transmission line is located in the area of the first signal transmission line and/or the second signal transmission line.
In a third implementation form of the first aspect as based on the first aspect, the first signal transmission line is arranged along a first direction; the second signal transmission line is arranged along a second direction; the first direction is different from the second direction.
Based on the third implementation manner of the first aspect, in the fourth implementation manner of the first aspect, the first signal transmission line, the second signal transmission line and the third signal transmission line are all located on one side of the GOA circuit.
Based on the fourth implementation manner of the first aspect, in a fifth implementation manner of the first aspect, the at least one first signal transmission channel includes a plurality of first vias arranged along the first direction to increase a conductive area between the first signal transmission line and the second signal transmission line.
In a sixth implementation manner of the first aspect, the third metal layer is an indium tin oxide semiconductor transparent conductive film layer.
In a seventh implementation form of the first aspect, the third metal layer is located between the first metal layer and the second metal layer.
In an eighth implementation form of the first aspect, the second metal layer is located on one side of the first metal layer; the third metal layer is positioned on the other side of the first metal layer or the third metal layer is positioned on one side of the second metal layer and is far away from the first metal layer.
In a second aspect, the present application provides a display panel, comprising: at least one second signal transmission channel according to any one of the above embodiments; at least one third signal transmission channel having the same structure as the first signal transmission channel in any of the above embodiments, and the impedance of the third signal transmission channel is not greater than the impedance of the first signal transmission channel; the GOA circuit is electrically connected with the second signal transmission channel and the third signal transmission channel and is used for receiving the same type of input signals transmitted by the second signal transmission channel and the third signal transmission channel; and the impedance values of the second signal transmission channel and the third signal transmission channel are equal or similar.
According to the signal transmission line structure, the third signal transmission line is connected with the first signal transmission channel in parallel, so that a second signal transmission channel with lower impedance can be formed; the application provides a display panel has this signal transmission line structure, can drop to the equilibrium with the impedance that each input signal transmission received in display panel, has solved equidistant horizontal line class etc. and has shown the problem.
Drawings
The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a signal transmission line structure according to an embodiment of the present disclosure.
Fig. 2 is a schematic structural diagram of a first signal transmission channel of the signal transmission line structure in fig. 1.
Fig. 3 is a schematic structural diagram of a display panel according to an embodiment of the present application.
Fig. 4 is a second schematic structural diagram of a signal transmission line structure according to an embodiment of the present application.
Fig. 5 is a schematic structural diagram of a third signal transmission channel according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
As shown in fig. 1 and 2, the present embodiment provides a signal transmission line structure including: a first signal transmission line L1 on the first metal layer; a second signal transmission line L2 on the second metal layer; a first via V1 located in the first metal layer and the second metal layer for electrically connecting the first signal transmission line L1 and the second signal transmission line L2 to form a first signal transmission channel S10; and a third signal transmission line L3 on the third metal layer electrically connected to the first signal transmission line L1 and/or the second signal transmission line L2 for connecting the first signal transmission channel S10 in parallel to form a second signal transmission channel S20.
It should be noted that the third signal transmission line L3 may be connected in parallel with the first signal transmission line L1, or may be connected in parallel with the second signal transmission line L2, or may be connected in parallel with both the first signal transmission line L1 and the second signal transmission line L2, so as to reduce the impedance of the first signal transmission channel S10.
When the third signal transmission line L3 is connected in parallel to the first signal transmission line L1 or the second signal transmission line L2, one end of the third signal transmission line L3 can be, but is not limited to, electrically connected to the first signal transmission line L1 or the second signal transmission line L2 through the first via V1, and at this time, the first via V1 penetrates through the third metal layer; this may also be achieved by rearranging the second via V2. The other end of the third signal transmission line L3 is electrically connected to the other node of the first signal transmission line L1 or the second signal transmission line L2 through a third via V3, thereby forming a signal transmission line structure disposed in parallel.
As shown in fig. 5, when the third signal transmission line L3 is connected in parallel with the first signal transmission line L1, one end of the third signal transmission line L3 can be, but is not limited to, electrically connected to the first signal transmission line L1 through the second via V2, and the other end of the third signal transmission line L3 can be electrically connected to the first signal transmission line L1 through the third via V3.
When the third signal transmission line L3 is connected in parallel to the first signal transmission line L1 and the second signal transmission line L2, one end of the third signal transmission line L3 may be, but is not limited to, electrically connected to the first signal transmission line L1 through a fourth via, and the other end of the third signal transmission line L3 may be, but is not limited to, electrically connected to the second signal transmission line L2 through a fifth via, thereby forming a signal transmission line structure disposed in parallel.
It can be understood that the present embodiment can adjust the parallel length of the first signal transmission channel S10 and the third signal transmission line L3 according to the requirement of reducing the impedance, so as to adjust the impedance of the second signal transmission channel S20 to the required process.
In this process, when the third signal transmission line L3 is connected in parallel with the first signal transmission line L1, the width of the third signal transmission line L3 is not greater than the width of the first signal transmission line L1; and/or, when the third signal transmission line L3 is connected in parallel with the second signal transmission line L2, the width of the third signal transmission line L3 is not greater than the width of the second signal transmission line L2.
In one embodiment, the width of the third signal transmission line L3 is not greater than the width of the first signal transmission line L1 or the second signal transmission line L2.
In one embodiment, the orthographic projection of the third signal transmission line L3 is located in the region of the first signal transmission line L1 and/or the second signal transmission line L2.
Also, the orthographic projection of the third signal transmission line L3 overlaps, or partially overlaps, the first signal transmission line L1 and/or the second signal transmission line L2.
It can be understood that the first metal layer, the second metal layer and the third metal layer are insulated from each other, and the electrical connection of the corresponding signal transmission lines can be realized only through the corresponding via holes. For example, the first metal layer, the second metal layer and the third metal layer may be isolated by disposing the first insulating layer and the second insulating layer to be insulated from each other. To accommodate the corresponding insulating layer, the corresponding via may be passed through the corresponding insulating layer.
In one embodiment, the third metal layer is located between the first metal layer and the second metal layer.
In one embodiment, the second metal layer is located on one side of the first metal layer; the third metal layer is positioned on the other side of the first metal layer or the third metal layer is positioned on one side of the second metal layer and is far away from the first metal layer.
In one embodiment, the first signal transmission line L1 is disposed in a first direction; the second signal transmission line L2 is disposed in the second direction; the first direction is different from the second direction. It should be noted that the first direction may be, but is not limited to being, perpendicular to the second direction.
In one embodiment, the first signal transmission line L1, the second signal transmission line L2, and the third signal transmission line L3 are all located at one side of the GOA circuit 100.
In one embodiment, the at least one first signal transmission channel S10 includes a plurality of first vias V1 arranged in a first direction to increase a conductive area between the first signal transmission line L1 and the second signal transmission line L2. It is understood that the conductive area between the corresponding signal transmission lines can be increased by increasing the number of the corresponding vias, which is beneficial for reducing the impedance.
In one embodiment, the third metal layer may be, but is not limited to, an indium tin oxide semiconductor transparent conductive film layer. The first metal layer and the second metal layer can also be indium tin oxide semiconductor transparent conductive film layers.
As shown in fig. 3 and 4, in one embodiment, the present application provides a display panel comprising: at least one second signal transmission path S20 in any of the above embodiments; at least one third signal transmission channel S30 having the same structure as the first signal transmission channel S10 in any of the above embodiments, and the impedance of the third signal transmission channel S30 is not greater than the impedance of the first signal transmission channel S10; the GOA circuit 100 is electrically connected to the second signal transmission channel S20 and the third signal transmission channel S30, and configured to receive the same type of input signals transmitted through the second signal transmission channel S20 and the third signal transmission channel S30; the impedance values of the second signal transmission channel S20 and the third signal transmission channel S30 are equal or similar.
It should be noted that the first signal transmission channel S10 has the same structure as the third signal transmission channel S30, which means that the structure of the third signal transmission channel S30 also includes the first signal transmission line L1 located in the first metal layer; a second signal transmission line L2 on the second metal layer; the first via V1 is disposed on the first metal layer and the second metal layer and electrically connected to the first signal transmission line L1 and the second signal transmission line L2 to form a third signal transmission channel S30.
It should be noted that the GOA circuit 100 needs different clock signals transmitted by a plurality of clock signal lines, and when the plurality of clock signal lines are transmitted to the GOA circuit 100, because the transmission paths of each clock signal line are different, the impedance of each clock signal line is inconsistent, and further, the impedance delay caused by the transmission of each corresponding clock signal is also different. In this case, a transmission path of one clock signal line from the display panel to the GOA circuit 100 is the shortest, the impedance is the smallest, and the impedance delay caused to the clock signal is the smallest, at this time, we define the transmission path of the clock signal line as the third signal transmission channel S30, and define the transmission path of the other clock signal line as the second signal transmission channel S20, it can be understood that the second signal transmission channel S20 can be impedance-adjusted in the design process, and especially, the impedance of the second signal transmission channel S20 can be reduced to the impedance equal to or similar to that of the third signal transmission channel S30, so that the impedance delay suffered by each clock signal is the same or similar, and the display problem of the equidistant horizontal lines of the display panel is solved.
It is understood that the display panel in this embodiment may be, but not limited to, a liquid crystal display panel, and may also be other display panels using the GOA circuit 100, and the same group of signals need to be transmitted to the GOA circuit 100, so that the same impedance delay of the same group of signals can be ensured. It will be appreciated that the same set or class of signals may be, but is not limited to, clock signals.
As shown in fig. 3, for example, the GOA circuit 100 located at one side of the display panel needs N clock signals, and correspondingly, N transmission channels are needed in the display panel to transmit different clock signals to the GOA circuit 100. It is understood that each clock signal sequentially passes through at least the first signal transmission line L1 disposed along the first direction, the first via V1, and the second signal transmission line L2 disposed along the second direction to the GOA circuit 100; n-1 third signal transmission lines L3 may also be correspondingly provided to form a parallel circuit with the first signal transmission line L1 and/or the second signal transmission line L2 to reduce the impedance of the corresponding signal transmission lines so that the impedance of the signal transmission lines is equal or similar.
As shown in fig. 3, it can be understood that a first clock signal line CK1, an N-2 clock signal line CKN-2, an N-1 clock signal line CKN-1 and an nth clock signal line CKN are disposed at a side of the GOA circuit 100 and apart from the GOA circuit 100. The impedance of the first clock signal line CK1 is the smallest and is transmitted through the third signal transmission channel S30, while the impedance of the other clock signal lines is larger and is transmitted through the second signal transmission channel S20 to reduce the impedance to the third signal transmission channel S30.
Wherein N is a positive integer and is not less than 2.
Wherein, it can be understood that N transmission channels with different path lengths are located at one side of the GOA circuit 100 and are arranged in sequence, and as the application and development of high resolution and high refresh rate are implemented, the number of N is also increased from 8 to 12, 16, or even higher. Along with the quantity promotion of N, the path difference between first and the nth transmission channel is bigger and bigger, and the impedance difference is also bigger and bigger, therefore, this application is through providing the signal transmission line structure that can reduce impedance, adjust the transmission channel of high impedance to be consistent with the transmission channel of minimum impedance, compare in the method of wire winding benefit, not only can realize the impedance balance of each transmission channel with lower impedance, can also practice thrift GOA's horizontal space, effectively solve the less problem in the frame space of high resolution display product.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The signal transmission line structure and the display panel provided in the embodiments of the present application are described in detail above, and a specific example is applied in the description to explain the principle and the implementation of the present application, and the description of the embodiments above is only used to help understand the technical solution and the core idea of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.
Claims (10)
1. A signal transmission line structure, comprising:
a first signal transmission line on the first metal layer;
a second signal transmission line on the second metal layer;
the first via hole is positioned on the first metal layer and the second metal layer and is used for electrically connecting the first signal transmission line and the second signal transmission line to form a first signal transmission channel; and
and the third signal transmission line is positioned on the third metal layer, is electrically connected with the first signal transmission line and/or the second signal transmission line, and is used for connecting the first signal transmission channel in parallel to form a second signal transmission channel.
2. The signal transmission line structure of claim 1, wherein the width of the third signal transmission line is no greater than the width of the first signal transmission line or the second signal transmission line.
3. The signal transmission line structure according to claim 2, characterized in that an orthographic projection of the third signal transmission line is located in a region where the first signal transmission line and/or the second signal transmission line is located.
4. The signal transmission line structure of claim 1, wherein the first signal transmission line is arranged in a first direction; the second signal transmission line is arranged along a second direction; the first direction is different from the second direction.
5. The signal transmission line structure of claim 4, wherein the first signal transmission line, the second signal transmission line, and the third signal transmission line are all located on one side of a GOA circuit.
6. The signal transmission line structure of claim 5, wherein at least one of the first signal transmission channels includes a plurality of first vias arranged along the first direction to increase a conductive area between the first signal transmission line and the second signal transmission line.
7. The signal transmission line structure of claim 1 wherein the third metal layer is an indium tin oxide semiconductor transparent conductive film layer.
8. The signal transmission line structure of claim 1, wherein the third metal layer is located between the first metal layer and the second metal layer.
9. The signal transmission line structure of claim 1, wherein the second metal layer is located on one side of the first metal layer; the third metal layer is located on the other side of the first metal layer or the third metal layer is located on one side of the second metal layer and is far away from the first metal layer.
10. A display panel, comprising:
at least one second signal transmission channel according to any one of claims 1 to 9;
at least one third signal transmission channel of the same construction as the first signal transmission channel of any of claims 1 to 9, and having an impedance no greater than that of the first signal transmission channel; and
the GOA circuit is electrically connected with the second signal transmission channel and the third signal transmission channel and is used for receiving the same type of input signals transmitted by the second signal transmission channel and the third signal transmission channel;
wherein the impedance values of the second signal transmission channel and the third signal transmission channel are equal or similar.
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| CN202010652208.7A CN111785226B (en) | 2020-07-08 | 2020-07-08 | Signal transmission line structure and display panel |
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| CN202010652208.7A CN111785226B (en) | 2020-07-08 | 2020-07-08 | Signal transmission line structure and display panel |
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| CN111785226B true CN111785226B (en) | 2021-09-24 |
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| CN112558366A (en) * | 2020-12-08 | 2021-03-26 | 南京中电熊猫液晶显示科技有限公司 | Liquid crystal display panel and manufacturing method thereof |
| CN115485756A (en) | 2021-03-11 | 2022-12-16 | 京东方科技集团股份有限公司 | Display substrate and display device |
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| CN105096871B (en) * | 2015-08-11 | 2017-08-08 | 京东方科技集团股份有限公司 | Array base palte drive circuit, array base palte, display panel, display device |
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| CN106444182B (en) * | 2016-10-31 | 2020-06-02 | 厦门天马微电子有限公司 | Array substrate and display panel |
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