CN111740742A - A high-speed, high-precision image signal analog-to-digital conversion circuit - Google Patents
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Abstract
Description
技术领域technical field
本发明属于转换电路技术领域,具体涉及一种高速、高精度图像信号模数转换电路。The invention belongs to the technical field of conversion circuits, in particular to a high-speed and high-precision image signal analog-to-digital conversion circuit.
背景技术Background technique
模数转换器即A/D转换器,或简称ADC,通常是指一个将模拟信号转变为数字信号的电子元件。通常的模数转换器是将一个输入电压信号转换为一个输出的数字信号。由于数字信号本身不具有实际意义,仅仅表示一个相对大小。故任何一个模数转换器都需要一个参考模拟量作为转换的标准,比较常见的参考标准为最大的可转换信号大小。而输出的数字量则表示输入信号相对于参考信号的大小。An analog-to-digital converter, or A/D converter, or ADC for short, usually refers to an electronic component that converts an analog signal into a digital signal. A typical analog-to-digital converter converts an input voltage signal into an output digital signal. Since the digital signal itself has no practical significance, it only represents a relative size. Therefore, any analog-to-digital converter needs a reference analog quantity as the conversion standard. The more common reference standard is the maximum convertible signal size. The output digital quantity represents the magnitude of the input signal relative to the reference signal.
现有技术的存在以下问题:现有的图像信号模数转换电路在使用时存在转换速度慢,影响图像信号的的转换速度,同时结构复杂,造成使用不便。The existing technology has the following problems: the existing image signal analog-to-digital conversion circuit has a slow conversion speed during use, which affects the conversion speed of the image signal, and at the same time, the structure is complicated, which causes inconvenience in use.
发明内容SUMMARY OF THE INVENTION
为解决上述背景技术中提出的问题。本发明提供了一种高速、高精度图像信号模数转换电路,具有结构简单,转换速度快,使用便携的特点。In order to solve the problems raised in the above background art. The invention provides a high-speed and high-precision image signal analog-to-digital conversion circuit, which has the characteristics of simple structure, fast conversion speed and portable use.
为实现上述目的,本发明提供如下技术方案:一种高速、高精度图像信号模数转换电路,所述的高速、高精度图像信号模数转换电路包括多级流水线电路、延时对准寄存器阵列和数字校准电路,每一级流水线电路中包括采样保持模块、两个子ADC模块、子DAC模块、减法电路、余量放大模块和输出寄存器,模拟输入信号一组流水线电路,首先在采样保持模块对信号进行采样保持,之后将信号输入到子ADC模块对信号进行量化,输出数字信号到输出寄存器和子DAC模块,子DAC模块将信号转换为模拟信号后输出到减法电路,模拟信号与采样保持后的信号相减,再经余量放大模块将信号放大一定倍数输出到延时对准寄存器阵列,每一组流水线电路的输出的输出寄存器与延时对准寄存器阵列连接,延时对准寄存器阵列输出与数字校准电路连接,信号经校准后输出。In order to achieve the above purpose, the present invention provides the following technical solutions: a high-speed, high-precision image signal analog-to-digital conversion circuit, the high-speed, high-precision image signal analog-to-digital conversion circuit includes a multi-stage pipeline circuit, a delay alignment register array and digital calibration circuit, each stage of pipeline circuit includes sample and hold module, two sub-ADC modules, sub-DAC module, subtraction circuit, residual amplifier module and output register, a set of pipeline circuits for analog input signal, firstly in the sample-and-hold module pair The signal is sampled and held, and then the signal is input to the sub-ADC module to quantize the signal, and the digital signal is output to the output register and sub-DAC module. The sub-DAC module converts the signal into an analog signal and outputs it to the subtraction circuit. The signal is subtracted, and then the signal is amplified by a certain multiple and output to the delay alignment register array through the margin amplification module. The output register of each group of pipeline circuits is connected to the delay alignment register array, and the delay alignment register array is output. Connected with digital calibration circuit, the signal is output after calibration.
在本发明中进一步的,所述的高速、高精度图像信号模数转换电路包括一个计时器,计时器的输出分别与延时对准寄存器阵列和数字校准电路连接。Further in the present invention, the high-speed, high-precision image signal analog-to-digital conversion circuit includes a timer, and the output of the timer is respectively connected with the delay alignment register array and the digital calibration circuit.
与现有技术相比,本发明的有益效果是:Compared with the prior art, the beneficial effects of the present invention are:
本发明在每一级流水线电路中包括采样保持模块、两个子ADC模块、子DAC模块、减法电路、余量放大模块和输出寄存器,模拟输入信号一组流水线电路,首先在采样保持模块对信号进行采样保持,之后将信号输入到子ADC模块对信号进行量化,输出数字信号到输出寄存器和子DAC模块,子DAC模块将信号转换为模拟信号后输出到减法电路,模拟信号与采样保持后的信号相减,再经余量放大模块将信号放大一定倍数输出到延时对准寄存器阵列,提高转换速度,且通过对比,提高转换质量,避免错误。The present invention includes a sampling and holding module, two sub-ADC modules, sub-DAC modules, a subtraction circuit, a residual amplifying module and an output register in each stage of the pipeline circuit, and a set of pipeline circuits for simulating the input signal. After sampling and holding, the signal is input to the sub-ADC module to quantize the signal, and the digital signal is output to the output register and sub-DAC module. The sub-DAC module converts the signal into an analog signal and outputs it to the subtraction circuit. Then, the signal is amplified by a certain multiple and output to the delay alignment register array through the margin amplifying module, which improves the conversion speed, and through comparison, improves the conversion quality and avoids errors.
附图说明Description of drawings
图1为本发明的结构示意图。FIG. 1 is a schematic structural diagram of the present invention.
具体实施方式Detailed ways
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
请参阅图1,本发明提供以下技术方案:一种高速、高精度图像信号模数转换电路,高速、高精度图像信号模数转换电路包括多级流水线电路、延时对准寄存器阵列和数字校准电路,每一级流水线电路中包括采样保持模块、两个子ADC模块、子DAC模块、减法电路、余量放大模块和输出寄存器,模拟输入信号一组流水线电路,首先在采样保持模块对信号进行采样保持,之后将信号输入到子ADC模块对信号进行量化,输出数字信号到输出寄存器和子DAC模块,子DAC模块将信号转换为模拟信号后输出到减法电路,模拟信号与采样保持后的信号相减,再经余量放大模块将信号放大一定倍数输出到延时对准寄存器阵列,每一组流水线电路的输出的输出寄存器与延时对准寄存器阵列连接,延时对准寄存器阵列输出与数字校准电路连接,信号经校准后输出。Referring to FIG. 1, the present invention provides the following technical solutions: a high-speed, high-precision image signal analog-to-digital conversion circuit, the high-speed, high-precision image signal analog-to-digital conversion circuit includes a multi-stage pipeline circuit, a delay alignment register array and a digital calibration The circuit, each stage of the pipeline circuit includes a sample and hold module, two sub-ADC modules, a sub-DAC module, a subtraction circuit, a residual amplifier module and an output register, a set of pipeline circuits for analog input signals, first in the sample-and-hold module to sample the signal Hold, then input the signal to the sub-ADC module to quantify the signal, and output the digital signal to the output register and sub-DAC module. The sub-DAC module converts the signal into an analog signal and outputs it to the subtraction circuit, and the analog signal is subtracted from the sampled and held signal. Then, the signal is amplified by a certain multiple and output to the delay alignment register array through the margin amplification module. The output register of the output of each group of pipeline circuits is connected with the delay alignment register array, and the delay alignment register array output and digital calibration The circuit is connected, and the signal is output after calibration.
进一步的,高速、高精度图像信号模数转换电路包括一个计时器,计时器的输出分别与延时对准寄存器阵列和数字校准电路连接。Further, the high-speed, high-precision image signal analog-to-digital conversion circuit includes a timer, and the output of the timer is respectively connected with the delay alignment register array and the digital calibration circuit.
本发明的工作原理及使用流程:本发明模数转换电路包括多级流水线电路、延时对准寄存器阵列和数字校准电路,每一级流水线电路中包括采样保持模块、两个子ADC模块、子DAC模块、减法电路、余量放大模块和输出寄存器,模拟输入信号一组流水线电路,首先在采样保持模块对信号进行采样保持,之后将信号输入到子ADC模块对信号进行量化,输出数字信号到输出寄存器和子DAC模块,子DAC模块将信号转换为模拟信号后输出到减法电路,模拟信号与采样保持后的信号相减,再经余量放大模块将信号放大一定倍数输出到延时对准寄存器阵列,每一组流水线电路的输出的输出寄存器与延时对准寄存器阵列连接,延时对准寄存器阵列输出与数字校准电路连接,信号经校准后输出。The working principle and use process of the present invention: the analog-to-digital conversion circuit of the present invention includes a multi-stage pipeline circuit, a delay alignment register array and a digital calibration circuit, and each stage of the pipeline circuit includes a sample and hold module, two sub-ADC modules, and a sub-DAC. Module, subtraction circuit, residual amplifier module and output register, a set of pipeline circuits for analog input signal, firstly, the signal is sampled and held in the sample and hold module, and then the signal is input to the sub-ADC module to quantize the signal, and the digital signal is output to the output Register and sub-DAC module, the sub-DAC module converts the signal into an analog signal and outputs it to the subtraction circuit, the analog signal is subtracted from the signal after sampling and holding, and then the signal is amplified by a certain multiple of the residual amplifier module and output to the delay alignment register array , the output register of each group of pipeline circuits is connected with the delay alignment register array, the output of the delay alignment register array is connected with the digital calibration circuit, and the signal is output after being calibrated.
尽管已经示出和描述了本发明的实施例,对于本领域的普通技术人员而言,可以理解在不脱离本发明的原理和精神的情况下可以对这些实施例进行多种变化、修改、替换和变型,本发明的范围由所附权利要求及其等同物限定。Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, and substitutions can be made in these embodiments without departing from the principle and spirit of the invention and modifications, the scope of the present invention is defined by the appended claims and their equivalents.
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