CN111739964A - Two-dimensional semiconductor photoelectric detector with double-gate structure and preparation method thereof - Google Patents

Two-dimensional semiconductor photoelectric detector with double-gate structure and preparation method thereof Download PDF

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CN111739964A
CN111739964A CN202010605849.7A CN202010605849A CN111739964A CN 111739964 A CN111739964 A CN 111739964A CN 202010605849 A CN202010605849 A CN 202010605849A CN 111739964 A CN111739964 A CN 111739964A
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CN111739964B (en
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罗小光
徐金鹏
程迎春
甘雪涛
黄维
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Northwestern Polytechnical University
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    • HELECTRICITY
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    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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    • H01ELECTRIC ELEMENTS
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    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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    • H01L31/112Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect phototransistor
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Abstract

The invention discloses a two-dimensional semiconductor photoelectric detector with a double-gate structure and a preparation method thereof. The detector structure include from bottom to top: the device comprises a substrate electrode layer, a substrate dielectric layer, a transparent two-dimensional dielectric layer, a two-dimensional semiconductor layer, a transparent two-dimensional dielectric layer and a transparent two-dimensional conductor layer; a first metal electrode layer and a second metal electrode layer are arranged on the two-dimensional dielectric layer, wherein the first metal electrode layer is distributed on two sides of the two-dimensional semiconductor layer and is used as a source electrode and a drain electrode, and the second metal electrode layer is in contact with the transparent two-dimensional conductor layer; the transparent two-dimensional dielectric layer and the transparent two-dimensional conductor layer cover the two-dimensional semiconductor layer; the substrate electrode layer is a P-type silicon substrate; when the substrate electrode layer and the second metal electrode layer have opposite polarities, the two-dimensional semiconductor layer forms a uniform PN junction in the vertical direction. The detector provided by the invention is simple to prepare, and has the characteristics of low dark current, large photocurrent, high detection degree and linear light response.

Description

Two-dimensional semiconductor photoelectric detector with double-gate structure and preparation method thereof
Technical Field
The invention relates to design and preparation of a two-dimensional semiconductor photoelectric detector, in particular to a photoelectric detector which utilizes a double-gate structure to generate PN junctions in the vertical direction of a two-dimensional semiconductor so as to promote separation of photo-generated electron-hole pairs and a preparation method thereof.
Background
The photoelectric detector is a photoelectronic device for converting optical signals into electric signals, and has important application in optical communication, photoelectric display, imaging, environmental monitoring, space exploration, national defense and military and the like. Especially, the high-sensitivity detector aiming at weak light has wide application prospect in the high-precision industry.
Most of the conventional photodetectors are designed by conventional semiconductor materials, including group IV silicon photodetectors, group IV germanium photodetectors, group III-V indium gallium arsenic photodetectors, and the like. The development of information technology requires smaller and smaller device sizes to meet the requirement of high integration. When the thickness of the traditional semiconductor material is reduced, the mobility of the material is rapidly reduced; when the size is reduced, the performance of the device can be seriously influenced by the lattice mismatch between different material interfaces; in addition, the traditional semiconductor material is very fragile and is not suitable for a transparent, flexible and bendable detector. With the increasing demands on the performance of optical detectors, conventional detectors have been inadequate. The two-dimensional layered material has the advantages of being only atomically thin, good in flexibility, light-transmitting, easy to process and the like. The surface of the thin-layer sample has no dangling bond, and the layers are bonded by Van der Waals force, so that the thin-layer sample can be obtained by a mechanical stripping method. Meanwhile, the heterojunction made of the two-dimensional material is not limited by the fact that the conventional heterojunction interface must be matched with a crystal lattice, and can be stacked at any angle. And its mobility is much higher than that of conventional materials of the same thickness. The two-dimensional material doping of the atomic layer thickness can be through gate-voltage electrostatic doping, and the atom replacement doping of the traditional material is not needed. The two-dimensional material provides a new approach for the field of photoelectric detection.
The ordinary two-dimensional material semiconductor photoelectric detector can play a role in detecting by adjusting the carrier concentration and the energy band structure of the two-dimensional material through the grid voltage. The response mechanism mainly comprises a photoelectric conduction effect, a photovoltaic effect, a photo-thermoelectric effect, a radiative heat effect and the like. Photoconductive-based detectors, such as field effect transistors, can produce large gain and high optical responsivity, but generally have long response time and large signal-to-noise ratio, and are difficult to detect weak light. The photovoltaic detector, such as a PN junction, has a relatively fast response speed, but has no additional gain mechanism, and the current is small, resulting in a small optical signal and a low detection degree. In addition, for a photodetector, a linear response is optimal. When the detector is in linear response, the photocurrent can be well corresponded with the light intensity, and the light intensity can be conveniently identified during light detection. The most extensive linear photoelectric detector is a PN junction structure, but the structure has no gain, the light response is too low, the photocurrent generated under certain light intensity is very small, and the signal is small; the field effect transistor has gain but the optical response is not linear. But without gain. Meanwhile, due to the influence of the local state, the noise of the general device is relatively large.
Disclosure of Invention
The invention provides a two-dimensional semiconductor photoelectric detector with a double-gate structure and a preparation method thereof in order to overcome the defects of the conventional photoelectric detector.
In order to solve the technical problems, the invention adopts the technical scheme that:
a two-dimensional semiconductor photoelectric detector with a double-gate structure is characterized in that the structure of the detector is as follows from bottom to top: the device comprises a substrate electrode layer, a substrate dielectric layer, a first transparent two-dimensional dielectric layer, a two-dimensional semiconductor layer, a second transparent two-dimensional dielectric layer and a transparent two-dimensional conductor layer; the substrate electrode layer is used as a bottom gate electrode; the two-dimensional semiconductor layer is used as a current carrier channel for the device to work, and two ends of the two-dimensional semiconductor layer are respectively connected with a first metal electrode layer which is used as a source electrode and a drain electrode; one end of the transparent two-dimensional conductor layer is connected with a second metal electrode layer to serve as a top gate electrode; when the polarities of the voltages applied to the bottom gate and the top gate are opposite, electrons and holes in the two-dimensional semiconductor layer can be respectively gathered to an upper interface and a lower interface under the action of an electrostatic field, so that a vertical PN homojunction is formed in the two-dimensional semiconductor layer.
The substrate electrode layer and the substrate dielectric layer are silicon/silicon dioxide substrates, wherein the thickness of the silicon dioxide is 280-300 nanometers.
The first transparent two-dimensional dielectric layer and the second transparent two-dimensional dielectric layer are both boron nitride thin layers, and the thicknesses of the first transparent two-dimensional dielectric layer and the second transparent two-dimensional dielectric layer are both 15-30 nanometers.
The transparent two-dimensional conductor layer is a graphene thin layer.
The two-dimensional semiconductor layer is a transition metal chalcogenide compound having a bipolar property.
The two-dimensional semiconductor layer is selected from tungsten diselenide or molybdenum ditelluride.
The first metal electrode layer and the second metal electrode layer are selected from gold, silver or palladium.
A preparation method of a two-dimensional semiconductor photoelectric detector with a double-gate structure comprises the following steps:
s1, obtaining a first transparent two-dimensional dielectric layer, a second transparent two-dimensional dielectric layer, a two-dimensional semiconductor layer and a transparent two-dimensional conductor layer by using a mechanical stripping method;
s2, transferring the first transparent two-dimensional dielectric layer to a substrate of a substrate electrode layer and a substrate dielectric layer by using a dry transfer technology, and transferring the two-dimensional semiconductor layer to the two-dimensional dielectric layer at a fixed point to serve as a channel of a device;
s3, transferring the two evaporated metal electrodes to two ends of the two-dimensional semiconductor layer to be used as a source electrode and a drain electrode;
s4, transferring a second transparent two-dimensional dielectric layer on the two-dimensional semiconductor layer to cover the whole channel;
s5, transferring the transparent two-dimensional conductor layer to a second transparent two-dimensional dielectric layer to cover the whole channel but not to be in contact with the metal electrode; finally, transferring the metal electrode to one end of the transparent two-dimensional conductor layer to serve as a top gate electrode without covering a channel to obtain a final device structure;
and S6, putting the device structure into an annealing furnace for annealing, so that the layers are in contact with each other, and finally obtaining the two-dimensional semiconductor photoelectric detector with the double-gate structure.
Optionally, the dry transfer technique refers to: transferring a target material to PDMS and fixing the target material on a glass slide, slowly attaching the target material and a target substrate by using the alignment function of a two-dimensional material transfer platform and a microscope, and slowly lifting the glass slide after auxiliary heating, so that the target material can be transferred to the specified position of the target substrate.
Optionally, the annealing temperature is 120-200 ℃ and the annealing time is 0.5-2 hours.
Compared with the prior art, the invention has the beneficial effects that:
the photoelectric detector with the double-gate structure is constructed by utilizing the substrate conductive material and the transparent two-dimensional layered conductive material to regulate and control the carrier concentration in the two-dimensional semiconductor layer, and has the advantages of a PN junction diode and a field effect transistor. The device is applied in the field of photoelectric detection, solves the problems of large dark current, non-linear responsivity, low detectivity and the like of the conventional two-dimensional semiconductor detector, and has the advantages of linear light response, dark current suppression, gain improvement, high detectivity and the like.
The advantages of the diode and the field effect transistor are combined to manufacture a double-gate photoelectric field effect transistor, and the photoelectric detection performance is adjusted through the cooperative regulation and control of the top gate and the bottom gate. When the top gate and the bottom gate are opposite in nature, electrons and holes in the two-dimensional semiconductor layer can be respectively gathered on the upper surface and the lower surface of the channel, a uniform PN junction is formed in the vertical direction, and a very strong built-in electric field is formed. Therefore, when light is irradiated, photo-generated electrons and holes can be effectively separated and transmitted in the same semiconductor, and the characteristics of a diode and a field effect transistor are presented, so that the detector has the characteristics of low dark current, large photocurrent, high detection degree and linear light response.
In order to overcome the defects of the conventional photoelectric detector, the preparation method comprises the following steps: transferring the transparent two-dimensional dielectric layer to a substrate dielectric layer, transferring a two-dimensional semiconductor layer at a fixed point on the dielectric layer to serve as a channel of a device, covering metal electrodes at two ends of a semiconductor material to serve as source and drain electrodes, covering the whole channel with a top transparent two-dimensional dielectric layer, continuing to transfer the two-dimensional conductor material to serve as a transparent grid, and finally transferring the metal electrodes to be connected with the transparent electrodes. The photoelectric detector with the double-gate structure is manufactured by combining a PN junction diode and a field effect transistor, wherein an upper dielectric layer, a lower dielectric layer and a top gate which are in contact with a channel are made of transparent two-dimensional materials, impurities such as organic matters are not introduced between layers, high-temperature heating in air is not needed, and the upper gate and the lower gate can independently adjust gate voltage and cooperatively adjust carrier concentration of the channel. When the top gate and the bottom gate are opposite in polarity, a uniform PN junction is formed in the vertical direction while exhibiting the characteristics of a diode and a field effect transistor.
Drawings
FIG. 1 is a cross-sectional view of a structure of an embodiment of the present invention;
FIG. 2 is a perspective view of an embodiment of the present invention;
FIG. 3 is a circuit diagram of an embodiment of the present invention;
FIG. 4 is a graph of photocurrent versus incident optical power of a photodetector according to an embodiment of the present invention under illumination;
FIG. 5 is a diagram of a relationship between a detection degree and an incident light power of a photodetector according to an embodiment of the present invention;
fig. 6 is a diagram of a relationship between a detection amount and incident light power of a photodetector according to an embodiment of the present invention.
In the figure: 1-substrate electrode layer, 2-substrate dielectric layer, 3-first transparent two-dimensional dielectric layer, 4-two-dimensional semiconductor layer, 5-first metal electrode layer, 6-second transparent two-dimensional dielectric layer, 7-transparent two-dimensional conductor layer and 8-second metal electrode layer.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the drawings in the embodiment of the present invention, and it is obvious that the described embodiment is only a part of the embodiment of the present invention, and not all embodiments. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, shall fall within the scope of protection of the present invention.
It will be understood that when an element is referred to as being "disposed on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may be present. The terms "vertical," "horizontal," "left," "right," and the like as used herein are for illustrative purposes only and do not represent the only embodiments.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
The drawings are for illustration purposes only and are not to be construed as limiting the invention; for the purpose of better illustrating the embodiments, certain features of the drawings may be omitted, enlarged or reduced, and do not represent the size of an actual product; it will be understood by those skilled in the art that certain well-known structures in the drawings and descriptions thereof may be omitted. The positional relationships depicted in the drawings are for illustrative purposes only and are not to be construed as limiting the invention.
The invention relates to a two-dimensional semiconductor photoelectric detector with a double-grid structure, which is characterized in that the structure of the detector from bottom to top is as follows: a substrate electrode layer 1, a substrate dielectric layer 2, a first transparent two-dimensional dielectric layer 3, a two-dimensional semiconductor layer 4, a second transparent two-dimensional dielectric layer 6 and a transparent two-dimensional conductor layer 7; the substrate electrode layer 1 is used as a bottom gate electrode; the two-dimensional semiconductor layer 4 is used as a carrier channel for the device to work, and two ends of the two-dimensional semiconductor layer are connected with a first metal electrode layer 5 which is used as a source electrode and a drain electrode; a second metal electrode layer 8 is connected as a top gate electrode to one end of the transparent two-dimensional conductor layer 7.
The principle of the invention is as follows: the advantages of the diode and the field effect transistor are combined to manufacture a double-gate field effect transistor, and the top gate and the bottom gate are simultaneously and cooperatively regulated to form a uniform PN junction on the two-dimensional semiconductor layer 4 in the vertical direction, so that photo-generated electrons and holes are effectively separated, and the detection degree of the detector is improved.
Example 1
Referring to fig. 1 and fig. 2, a two-dimensional semiconductor photodetector with a dual-gate structure has the following structures from bottom to top: a substrate electrode layer 1, a substrate dielectric layer 2, a first transparent two-dimensional dielectric layer 3, a two-dimensional semiconductor layer 4, a first metal electrode layer 5, a second transparent two-dimensional dielectric layer 6, a transparent two-dimensional conductor layer 7, and a second metal electrode layer 8.
In a preferred embodiment, the substrate electrode layer 1 is a P-type silicon substrate and the substrate dielectric layer 2 is silicon dioxide. The first transparent two-dimensional dielectric layers 3 and 6 are boron nitride thin layers, the bottom two-dimensional dielectric layer 3 is laid on the substrate dielectric layer 2 and used for shielding organic matters and other defects remained on the surface of the substrate dielectric layer 2 and forms a bottom gate dielectric layer together with the substrate dielectric layer 2. The two-dimensional semiconductor layer 4 is tungsten diselenide. The transparent two-dimensional conductor layer 7 is graphene. The metal electrode 5 and the second metal electrode layer 8 are gold electrodes prepared by thermal evaporation.
As a preferred embodiment, the substrate electrode layer 1 is a P-type silicon substrate, plays a role in mechanical support and electron conduction for the structure, and is used as a bottom gate of a device, and the substrate dielectric layer 2 is a silicon dioxide layer with the thickness of 280-300 nm.
In a preferred embodiment, the first transparent two-dimensional dielectric layers 3 and 6 are boron nitride thin layers with a thickness of 15-30 nm.
As a preferred embodiment, the transparent two-dimensional conductor layer 7 is a transparent graphene thin layer.
The invention also provides a preparation method of the two-dimensional semiconductor photoelectric detector with the double-gate structure, which comprises the following steps:
s1, obtaining required first transparent two-dimensional dielectric layers 3 and 6, a two-dimensional semiconductor layer 4 and a transparent two-dimensional conductor layer 7 by using a mechanical stripping method;
s2, transferring the first transparent two-dimensional dielectric layer 3 to commercial substrates 1 and 2 by using a dry transfer technology, and transferring the two-dimensional semiconductor layer 4 to the two-dimensional dielectric layer 3 at a fixed point to serve as a channel of a device;
s3, transferring the two evaporated metal electrodes 5 to two ends of the two-dimensional semiconductor layer 4 to be used as a source electrode and a drain electrode;
s4, transferring a second transparent two-dimensional dielectric layer 6 on the two-dimensional semiconductor layer 4 to cover the whole channel;
s5, transferring the transparent two-dimensional conductor layer 7 onto the second transparent two-dimensional dielectric layer 6 to cover the whole channel but not to be in contact with the metal electrode 5; finally, transferring the metal electrode 8 to one end of the transparent two-dimensional conductor layer 7 to be used as a top gate electrode without covering a channel to obtain a final device structure;
s6, putting the device into an annealing furnace for annealing, wherein the atmosphere is argon, argon/hydrogen mixed gas or vacuum, the heating temperature is 120-200 ℃, preferably 180 ℃, and the time is 0.5-2 hours, preferably 1 hour, so that materials of all layers are in close contact.
Further, the suitable two-dimensional material described in step 1 has the following characteristics: the first transparent two-dimensional dielectric layer 3 is a thin layer with a large area and a thickness of 15-40 nanometers; the two-dimensional semiconductor layer 4 is a strip-shaped thin layer with the thickness of 30-40 nanometers; the transparent two-dimensional conductor layer 7 is an elongated transparent thin layer.
Further, the dry transfer technology refers to: transferring a target material to PDMS and fixing the target material on a glass slide, slowly attaching the target material and a target substrate by using the alignment function of a two-dimensional material transfer platform and a microscope, and slowly lifting the glass slide after auxiliary heating, so that the target material can be transferred to the specified position of the target substrate.
Further, the substrate electrode layer 1 is a P-type silicon substrate commonly used in the field, and plays a role in mechanical support and electron conduction for the structure, and is used as a bottom gate of the device. The substrate dielectric layer 2 is a silicon dioxide layer with the thickness of 280-300 nanometers and is used as a dielectric layer of a bottom gate.
Furthermore, the first transparent two-dimensional dielectric layer 3 is a boron nitride thin layer with a thickness of 15-30 nanometers, is laid on the substrate dielectric layer 2, and is used for shielding organic matters and other defects remained on the surface of the substrate dielectric layer 2, and forms a bottom gate dielectric layer together with the substrate dielectric layer 2. The top second transparent two-dimensional dielectric layer 6 acts as a transparent top gate dielectric layer.
Further, the transparent two-dimensional conductor layer 7 is a graphene thin layer. The graphene has excellent conductivity and high carrier mobility, is a mature two-dimensional material, has good light transmission, is easy to tear out a large-area thin layer by a mechanical stripping method, is used as a transparent grid, is simple to prepare, and is beneficial to the transmission of detection light. As the top grid needs to be connected in practical test application, the metal electrode is contacted with the two-dimensional conductor material of the transparent top grid to form the transparent top grid which is beneficial to test.
Further, the two-dimensional semiconductor layer 4 refers to a transition metal chalcogenide compound having a bipolar property, such as tungsten diselenide, molybdenum ditelluride, and the like.
Further, the metal electrode refers to a material having a good conductive property (generally, an electrode capable of forming an ohmic contact with the material of the two-dimensional semiconductor layer 4), such as gold, silver, palladium, or the like.
The working principle adopted by the invention is as follows: the double-gate field effect transistor is manufactured by combining the advantages of the diode and the field effect transistor, and through the simultaneous coordinated regulation and control of the top gate and the bottom gate, when the top gate and the bottom gate are opposite in nature, the two-dimensional semiconductor layer 4 forms a uniform PN junction in the vertical direction, so that photo-generated electrons and holes are effectively separated, and the detection degree of the detector is improved.
Example 2
The preparation method of the double-gate-structure two-dimensional semiconductor photoelectric detector specifically comprises the following steps:
s1, obtaining required first transparent two-dimensional dielectric layers 3 and 6, a two-dimensional semiconductor layer 4 and a transparent two-dimensional conductor layer 7 by using a mechanical stripping method;
s6, placing the device into an annealing furnace for annealing, wherein the atmosphere is argon, argon/hydrogen mixed gas or vacuum, the heating temperature is 120-200 ℃, preferably 180 ℃, the time is 0.5-2 h, preferably 1h, and the materials of all layers are in close contact.
S2, transferring the boron nitride of the two-dimensional dielectric layer 3 with the thickness of 30 nanometers prepared in the step 1 to a silicon dioxide substrate dielectric layer 2 with the thickness of 285 nanometers by using a dry transfer technology, and selecting a strip-shaped two-dimensional semiconductor layer 4 with the thickness of 36 nanometers to be transferred to the boron nitride at a fixed point to serve as a channel of a device by using the same method;
s3, transferring two gold electrodes 5 which are evaporated and coated with 50 nanometers in thickness to two ends of tungsten diselenide to be used as a source electrode and a drain electrode;
s4, transferring a boron nitride transparent dielectric material 6 with the thickness of 20 nanometers on the two-dimensional semiconductor layer 4;
s5, transferring the transparent two-dimensional conductor layer 7 onto the second transparent two-dimensional dielectric layer 6 to cover the whole channel but not to be in contact with the metal electrode 5; finally, transferring the metal electrode 8 to one end of the transparent two-dimensional conductor layer 7 to be used as a top gate electrode without covering a channel to obtain a final device structure;
and S6, putting the device obtained in the step S5 into an annealing furnace for annealing, wherein the atmosphere is argon/hydrogen mixed gas, the heating temperature is 180 ℃, and the time is 1 hour, so that the materials of all layers are in close contact.
Referring to fig. 3, a circuit diagram of an embodiment is shown. The substrate electrode layer 1 is a bottom gate, the first metal electrode layer 5 is a source electrode and a drain electrode, the second metal electrode layer 8 is a top gate, and the test source meter is grounded. Referring to fig. 4, a logarithmic graph of photocurrent-incident light intensity of the two-dimensional semiconductor layer 4 tungsten diselenide thin layer double-gate structure photodetector according to the embodiment is shown, in which a source-drain voltage is 0.1V. For the photodetector, a linear optical response is optimized, and the optical response is in a linear relationship by adjusting the voltages of the bottom gate and the top gate. When the bottom gate voltage is-5V and the top gate voltage is 1V, the light response is in a linear relation at the weak light intensity, but the traditional two-dimensional semiconductor detector with a single-gate structure has no linear relation.
Referring to fig. 5, which is a logarithmic graph of the specific detection degree-incident light intensity of the two-dimensional semiconductor layer 4 tungsten diselenide thin-layer double-gate structure photodetector of the embodiment, in the graph, the source-drain voltage is 0.1v, and the specific detection degree of the photodetector of the embodiment under weak light reaches 3.2 × 1014Jones is two orders of magnitude higher than a conventional single-gate structure two-dimensional semiconductor detector.
Referring to fig. 6, a graph of logarithmic relationship of current noise and frequency of the two-dimensional semiconductor layer 4 tungsten diselenide thin layer double-gate structure photodetector in the embodiment is shown, in the graph, source-drain voltage is 0.1v, bottom gate voltage is-60 v, and three curves in the graph correspond to top gate voltage of-3 v, 0 v and 3 v respectively. It can be seen that the current noise is two orders of magnitude lower than a single gate structure two-dimensional semiconductor detector when the bottom and top gate voltages are reversed. The smaller the current noise is, the smaller the local electronic state fluctuation of the device is, the weaker signal can be detected, and the detection capability is stronger. Under the control of the double-gate, when the bottom gate voltage is negative and the top gate voltage is positive, the current noise of the photoelectric detector is obviously lower than that of the photoelectric detector with only the bottom gate, and the semiconductor detector with the double-gate structure has a better noise reduction effect.
All articles and references disclosed, including patent applications and publications, are hereby incorporated by reference for all purposes. The term "consisting essentially of …" describing a combination shall include the identified element, ingredient, component or step as well as other elements, ingredients, components or steps that do not materially affect the basic novel characteristics of the combination. The use of the terms "comprising" or "including" to describe combinations of elements, components, or steps herein also contemplates embodiments that consist essentially of such elements, components, or steps. By using the term "may" herein, it is intended to indicate that any of the described attributes that "may" include are optional.
A plurality of elements, components, parts or steps can be provided by a single integrated element, component, part or step. Alternatively, a single integrated element, component, part or step may be divided into separate plural elements, components, parts or steps. The disclosure of "a" or "an" to describe an element, ingredient, component or step is not intended to foreclose other elements, ingredients, components or steps.
It is to be understood that the above description is intended to be illustrative, and not restrictive. Many embodiments and many applications other than the examples provided would be apparent to those of skill in the art upon reading the above description. The scope of the present teachings should, therefore, be determined not with reference to the above description, but should instead be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled. The disclosures of all articles and references, including patent applications and publications, are hereby incorporated by reference for all purposes. The omission in the foregoing claims of any aspect of subject matter that is disclosed herein is not intended to forego such subject matter, nor should the applicant consider that such subject matter is not considered part of the disclosed subject matter.

Claims (10)

1. The two-dimensional semiconductor photoelectric detector with the double-gate structure is characterized in that the structure of the detector from bottom to top is respectively as follows: the structure comprises a substrate electrode layer (1), a substrate dielectric layer (2), a first transparent two-dimensional dielectric layer (3), a two-dimensional semiconductor layer (4), a second transparent two-dimensional dielectric layer (6) and a transparent two-dimensional conductor layer (7); the substrate electrode layer (1) is used as a bottom gate electrode; the two-dimensional semiconductor layer (4) is used as a current carrier channel for the device to work, and two ends of the two-dimensional semiconductor layer are respectively connected with a first metal electrode layer (5) which is used as a source electrode and a drain electrode; one end of the transparent two-dimensional conductor layer (7) is connected with a second metal electrode layer (8) as a top gate electrode; when the polarities of the voltages applied to the bottom gate and the top gate are opposite, electrons and holes in the two-dimensional semiconductor layer (4) can be respectively gathered to an upper interface and a lower interface under the action of an electrostatic field, so that a vertical PN homojunction is formed in the two-dimensional semiconductor layer (4).
2. The detector according to claim 1, characterized in that the substrate electrode layer (1) and the substrate dielectric layer (2) are selected from a silicon/silicon dioxide substrate, wherein the thickness of silicon dioxide is 280-300 nm.
3. The detector according to claim 1, wherein the first transparent two-dimensional dielectric layer (3) and the second transparent two-dimensional dielectric layer (6) are both thin boron nitride layers, and the thicknesses of the two layers are both 15-30 nanometers.
4. A detector according to claim 1, characterized in that the transparent two-dimensional conductor layer (7) is a thin layer of graphene.
5. The detector according to claim 1, characterized in that said two-dimensional semiconductor layer (4) is a transition metal chalcogenide with bipolar properties.
6. The detector according to claim 5, wherein the two-dimensional semiconductor layer (4) is selected from tungsten diselenide or molybdenum ditelluride.
7. A detector according to claim 1, characterized in that said first metal electrode layer (5) and said second metal electrode layer (8) are selected from gold, silver or palladium.
8. A preparation method of a two-dimensional semiconductor photoelectric detector with a double-gate structure is characterized by comprising the following steps:
s1, obtaining a first transparent two-dimensional dielectric layer (3), a second transparent two-dimensional dielectric layer (6), a two-dimensional semiconductor layer (4) and a transparent two-dimensional conductor layer (7) by using a mechanical stripping method;
s2, transferring the first transparent two-dimensional dielectric layer (3) to the substrate of the substrate electrode layer (1) and the substrate dielectric layer (2) by using a dry transfer technology, and transferring the two-dimensional semiconductor layer (4) to the two-dimensional dielectric layer (3) at a fixed point to serve as a channel of a device;
s3, transferring the two evaporated metal electrodes (5) to two ends of the two-dimensional semiconductor layer (4) to be used as a source electrode and a drain electrode;
s4, transferring a second transparent two-dimensional dielectric layer (6) on the two-dimensional semiconductor layer (4) to cover the whole channel;
s5, transferring the transparent two-dimensional conductor layer (7) to the second transparent two-dimensional dielectric layer (6) to cover the whole channel but not to be in contact with the metal electrode (5); finally, transferring the metal electrode (8) to one end of the transparent two-dimensional conductor layer (7) to be used as a top gate electrode without covering a channel to obtain a final device structure;
and S6, putting the device structure into an annealing furnace for annealing, so that the layers are in contact with each other, and finally obtaining the two-dimensional semiconductor photoelectric detector with the double-gate structure.
9. The preparation method according to claim 8, characterized in that the dry transfer technique refers to: transferring a target material to PDMS and fixing the target material on a glass slide, slowly attaching the target material and a target substrate by using the alignment function of a two-dimensional material transfer platform and a microscope, and slowly lifting the glass slide after auxiliary heating, so that the target material can be transferred to the specified position of the target substrate.
10. The method according to claim 8, wherein the annealing temperature is 120 to 200 ℃ and the annealing time is 0.5 to 2 hours.
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