CN1117394C - 半导体插件 - Google Patents

半导体插件 Download PDF

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CN1117394C
CN1117394C CN97125471A CN97125471A CN1117394C CN 1117394 C CN1117394 C CN 1117394C CN 97125471 A CN97125471 A CN 97125471A CN 97125471 A CN97125471 A CN 97125471A CN 1117394 C CN1117394 C CN 1117394C
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semiconductor package
connecting elements
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尹锡俊
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SK Hynix Inc
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Hyundai Electronics Industries Co Ltd
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Abstract

一种半导体插件，包括：上部具有多个焊接点的半导体基片；插件基板，中央具有开口区，所述开口区的面积随着向下而变窄的阶梯式，所述插件基板包括开口区的底面、在所述底面的上部形成的阶梯面、以及外部导线；连接构件，设置在所述插件基板的阶梯面上，并在其周边上具有多根第二配线，在所述连接构件的中央设有贯通孔；多根金属线，使所述连接构件的第二配线与所述半导体基片的焊接点电气连接。此外，在最上部面上还设有密封盖。

Description

半导体插件
技术领域
本发明涉及一种半导体插件，特别涉及一种具有引线接合结构的半导体插件。
背景技术
在电子产业里，集成电路等是被密封在由塑料或陶瓷制成的插件内。陶瓷集成电路插件包括多个接触管脚，该接触管脚用于将密封在插件内的集成电路与外部电路连接起来。这种插件是用陶瓷盖密封的。制造陶瓷集成电路插件时，为了将具有导电性能的金属模板和接触管脚恰当地附着在陶瓷插件上，需要经过多道工序。这种金属模板和接触管脚，用于在外部电路与密封在陶瓷插件内的集成电路之间提供电气通路。典型例子，例如钨之类的金属，是为了在陶瓷上形成金属线焊接区、基片附着区、以及外部焊接点而使用的。众所周知，钨是能直接附着在陶瓷上的物质。为了提高其耐腐蚀性，最好在上述金属线焊接区、基片附着区、以及外部焊接区，使用金(Au)之类的惰性金属进行镀覆。但是，金的附着性能不如钨。因此，一般是在钨焊接区上先用镍之类的中间金属物质进行镀覆，然后在其上再镀一层金。
图1是利用现有技术制造的半导体插件的轴测图。
参照图1，现有的陶瓷插件，具有从半导体基片1到外部电路(未图示)的传送信息的信号传送通路，该通路由焊接点1a、多根金属线2、内部导线3及外部导线4构成。利用金属线，分别将在陶瓷基板上形成的金属线焊接区与设置在上述陶瓷基板上的半导体焊接点焊接起来，从而形成与外部电路之间的信号传递通路。
但是，在现有的半导体插件中，形成内部导线3的面和焊接点的形成面几乎位于同一水平面上，焊接了上述金属线时，便形成半球形状。因此，如果由集成度的提高而使半导体基片的尺寸增大，则金属线的焊接距离变长，这会引起金属线下垂现象。由于下垂的金属线能相互接触，会产生信号传送通路混乱的问题。
发明内容
为此，本发明的目的在于提供一种半导体插件，这种半导体插件与基片的尺寸无关，可防止由于金属线之间的接触而产生信号传送通路混乱的问题。
为了解决上述课题，本发明半导体插件包括：上部具有多个焊接点的半导体基片；插件基板，它的结构形式是中央具有开口区、且所述开口区的面积随着向下而变窄的阶梯式，所述插件基板包括用于附着所述半导体基片的开口区底面、在所述底面的上部形成并印刷有传送信号用的多根第一配线的阶梯面、以及与所述阶梯面的第一配线进行电气连接并用于与外部电路连通的向外侧突出的外部导线；连接构件，设置在所述插件基板的阶梯面上，并在其周边上具有与所述阶梯面上的第一配线分别电气连接的多根第二配线，在所述连接构件的中央设有贯通孔；多根金属线，所述金属线从所述连接构件的中部通过，使所述连接构件的第二配线与所述半导体基片的焊接点电气连接。此外，半导体插件还设有盖子，用于覆盖和密封上述陶瓷基板的开口，以防止外部异物进入。
附图说明
附图的简要说明：
图1是现有技术的半导体插件的轴测图；
图2是本发明实施例的半导体插件的分解轴测图；
图3是图2的半导体插件中的陶瓷插件基板的剖面图；
图4是本发明实施例的半导体插件的剖面图。
具体实施方式
下面参照附图对本发明的优选实施例进行说明。
图2是本发明实施例的半导体插件的分解轴测图，图3是图2的陶瓷基板的剖面图。图4是本发明的一个实施例的半导体插件的剖面图。
参照图2和图3，提供了上部具有焊接点20a的半导体基片20。在陶瓷基板12的中央形成有阶梯形状的开口，该开口的宽度随着向下部深入而变窄。半导体基片20附着在陶瓷板12的最下部面(下面称作基片附着区)上。在所述基片附着区12a正上侧的阶梯面12b的表面上，形成有许多阴刻或阳刻的配线12c，所述配线12c与突出在基板12外部的外部导线12d电气连接着。在所述阶梯面12b上设置有连接构件14，该连接构件14的周边上具有配线14a，构件中央设有贯通孔，所述配线14a用于分别与阶梯面12b上的配线12c电气连接。所述连接构件14设置并固定在所述阶梯面12b上，设在所述阶梯面12b上的连接构件14的配线14a，通过许多金属线与半导体基片20的焊接点20a一对一地电气连接。
通过引线结合工序，用导线18将半导体基片20上的焊接点20a与连接构件14的配线14a连接起来。并且，陶瓷基板12的开口由盖16密封着。该密封用盖最好是由透明物质构成，以便可在外部确认焊接后的状态。作为变形实施例，陶瓷基板12的开口密封也可将密封材料埋入。
所述连接构件14也可在陶瓷的外面用FR4材料制作。另外，所述连接构件14的配线14a与阶梯面12b上形成的配线12c之间的电气连接，是通过阴刻或阳刻方式实现的。在这种情况下，所形成的配线14a也可只用铜(Cu)做成，但最好是在铜上面镀一层金(Au)或镀一层银(Ag)的复层结构。此外，在上述结构的半导体插件上，连接构件14的附着面与半导体基片的附着面12a之间的间隔必须考虑连接构件14的厚度，使半导体基片20的上表面与连接构件的底面不相互接触。如果该间隔太小，则基片20的上表面会与连接构件14相互接触，如果间隔太大，则插件本身的高度太高，外观不美。
在图2所示的准备有连接构件14的状态下，半导体基片20附着在基片附着面12a上，连接构件14配置在阶梯面12b上。并以对准的状态被固定。为了将所述连接构件14固定在所述阶梯面12b上，所述陶瓷插件的连接构件14与基板12通过机械方式或化学方式(热熔焊)而固定住。
其后，如图4所示，半导体基片20的焊接点与连接构件14的配线14a，通过导线18电气连接。导线18的一侧端子被连接在连接构件14的配线14a上，另一侧端子通过连接构件14的贯通孔后与半导体基片20的焊接点焊接起来。金属线焊接作业完成后，用密封盖16将陶瓷基板12的开口盖住，以防止外部异物进入。
如上所述，由于本发明的半导体插件是阶梯式的，且具有随着其宽度的缩小而向下深入的结构，故即使1千兆级以上的半导体插件的基片尺寸增大，且位于焊接点中央，也能够解决金属线下垂而相互接触的问题，还可解决组装上的难点。
这里只对本发明的特定实施例进行了说明和图示，但制造者可对它进行修改或改变它的形态。因此，可理解为只要是符合本发明宗旨及范围的一切修改和变形均包括在权利要求范围内。

Claims (6)

1.一种半导体插件，其特征在于，它包括：上部具有多个焊接点的半导体基片；插件基板，它的结构形式是中央具有开口区、且所述开口区的面积随着向下而变窄的阶梯式，所述插件基板包括用于附着所述半导体基片的开口区底面、在所述底面的上部形成并印刷有传送信号用的多根第一配线的阶梯面、以及与所述阶梯面的第一配线进行电气连接并用于与外部电路连通的向外侧突出的外部导线；连接构件，设置在所述插件基板的阶梯面上，并在其周边上具有与所述阶梯面上的第一配线分别电气连接的多根第二配线，在所述连接构件的中央设有贯通孔；多根金属线，所述金属线从所述连接构件的中部通过，使所述连接构件的第二配线与所述半导体基片的焊接点电气连接。
2.如权利要求1所述的半导体插件，其特征在于，还包括盖子，用于覆盖并密封所述陶瓷基板的开口区。
3.如权利要求1或2所述的半导体插件，其特征在于，所述连接构件是用陶瓷制成的。
4.如权利要求1所述的半导体插件，其特征在于，所述插件基板的第一配线是阴刻或阳刻成的。
5.如权利要求1所述的半导体插件，其特征在于，所述连接构件的第二配线是阳刻或阴刻成的。
6.如权利要求5所述的半导体插件，其特征在于，所述第二配线是由下层和上层构成的复层结构，下层由铜(Cu)构成，上层由金(Au)或银(Ag)构成。
CN97125471A 1996-12-10 1997-12-09 半导体插件 Expired - Fee Related CN1117394C (zh)

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KR1019960063508A KR100244708B1 (ko) 1996-12-10 1996-12-10 반도체 패키지
KR63508/1996 1996-12-10
KR63508/96 1996-12-10

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US6594153B1 (en) 2000-06-27 2003-07-15 Intel Corporation Circuit package for electronic systems
JP2005093494A (ja) * 2003-09-12 2005-04-07 Sanyo Electric Co Ltd 半導体装置およびその製造方法
FR2913529B1 (fr) * 2007-03-09 2009-04-24 E2V Semiconductors Soc Par Act Boitier de circuit integre,notamment pour capteur d'image, et procede de positionnement
TWM440524U (en) * 2012-02-21 2012-11-01 Domintech Co Ltd Semiconductor package with a base
US10028411B2 (en) * 2016-07-26 2018-07-17 Continental Automotive Systems, Inc. Electronic controller with laser weld sealed housing

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US4814943A (en) * 1986-06-04 1989-03-21 Oki Electric Industry Co., Ltd. Printed circuit devices using thermoplastic resin cover plate
US4833102A (en) * 1987-03-17 1989-05-23 National Semiconductor Corporation Process of making a ceramic lid for use in a hermetic seal package
JPH04239157A (ja) * 1991-01-11 1992-08-27 Nec Corp 半導体装置
US5317196A (en) * 1992-08-28 1994-05-31 At&T Bell Laboratories Encapsulant method and apparatus
JP2671827B2 (ja) * 1994-10-28 1997-11-05 日本電気株式会社 気密封止型半導体装置
US5689089A (en) * 1996-09-20 1997-11-18 Motorola, Inc. Electronic control module having fluid-tight seals of a polymer material which expands when wet

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US6051784A (en) 2000-04-18
CN1188983A (zh) 1998-07-29
KR19980045326A (ko) 1998-09-15
JP2873685B2 (ja) 1999-03-24
KR100244708B1 (ko) 2000-02-15
JPH10294405A (ja) 1998-11-04

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