CN111737064A - BMC system control method and device, storage medium and computer equipment - Google Patents
BMC system control method and device, storage medium and computer equipment Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
- G06F11/2023—Failover techniques
- G06F11/2028—Failover techniques eliminating a faulty processor or activating a spare
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3013—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system is an embedded system, i.e. a combination of hardware and software dedicated to perform a certain function in mobile devices, printers, automotive or aircraft systems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3055—Monitoring arrangements for monitoring the status of the computing system or of the computing system component, e.g. monitoring if the computing system is on, off, available, not available
Abstract
The invention discloses a BMC system control method, a device, a storage medium and a computer device, wherein the method is applied to the control device of the BMC system and comprises the following steps: judging whether the uboot stage of the BMC is abnormal or not; if not, judging whether the kernel loading stage of the BMC is abnormal; if yes, the BMC is judged to be abnormal, and the standby BMC is started and switched to maintain normal work of the server. Compared with the prior art, when the BMC crashes, the server can automatically run the system in the standby BMC so as to protect the service of the server to automatically recover to normal in the shortest time and avoid economic loss. In addition, when the BMC system is hung dead, the work can be recovered in the shortest time to guarantee the service of the server, manual operation is not needed, and the problem can be conveniently analyzed by follow-up research and development personnel through abnormal log records.
Description
Technical Field
The present invention relates to the field of servers, and in particular, to a BMC system control method, apparatus, storage medium, and computer device.
Background
The BMC (Baseboard Management Controller) is a manager of the server, and is mainly used for monitoring and adjusting the health states of the components (CPU, memory, hard disk, fan, frame, etc.) of the server, such as temperature, voltage, etc., and adjusting the fan speed in real time according to the conditions of each temperature collection point to ensure that the server works in a proper temperature range, and controlling the total power consumption of the server in a reasonable range. If the server part is abnormal, the BMC reports and records abnormal logs in time through channels such as an SNMP protocol, an SMTP protocol, a Redfish protocol and the like so that operation and maintenance personnel can process and research and develop the analysis and study conveniently, the abnormal problem is solved in time, and the server can work normally. The BMC also has the functions of viewing the equipment information accessed by the server, upgrading the BIOS, restarting the service, reinstalling the system and the like, so that the BMC system is very important for the server.
At present, various problems such as breakdown and downtime of the BMC system still have a certain probability in the starting and running processes, once the BMC system cannot work normally, the server cannot be monitored, and at this time, the server is very easy to have the problems of high temperature, high power consumption and the like, so that the function cannot be normally used, the service loss is caused, and the problem is serious. At this time, the BMC system needs to be restored to normal, and the normal method is to restart and refresh the BMC system through power failure. Once the restart is invalid and the network of the BMC system is also not available, the sold server can only be returned to the factory for maintenance, which is very troublesome for both customers and manufacturers, and therefore, it is very important to improve the reliability of the BMC system.
Disclosure of Invention
The invention mainly aims to provide a BMC control system and aims to solve the technical problem of improving the reliability of a BMC system.
The invention provides a control method of a BMC (baseboard management controller) system, which is applied to a control device of the BMC system and comprises the following steps:
judging whether the uboot stage of the BMC is abnormal or not;
if not, judging whether the kernel loading stage of the BMC is abnormal;
if yes, the BMC is judged to be abnormal, and the standby BMC is started and switched to maintain normal work of the server.
Preferably, the step of determining whether the uboot stage of the BMC is abnormal includes:
and taking the power-on time of the server as the starting time, and judging whether the single chip microcomputer receives first preset instruction information within a first preset time period, wherein the single chip microcomputer is contained in a control device of the BMC system, and the content of the first preset instruction information is that the BMC successfully completes uboot guidance.
Preferably, after the step of determining whether the uboot phase of the BMC is abnormal, the method includes:
if yes, the BMC is judged to be abnormal, the standby BMC is started and switched, and relevant abnormal logs are recorded.
Preferably, the step of determining whether the loading kernel phase of the BMC is abnormal includes:
and taking the moment of judging the normal uboot stage of the BMC as a starting moment, and judging whether second preset instruction information is received or not by the single chip microcomputer within a second preset time period, wherein the single chip microcomputer is contained in a control device of the BMC system, and the content of the second preset instruction information is finished by loading the kernel to the BMC and normally running.
Preferably, if yes, after the step of determining that the BMC is abnormal, starting and switching the standby BMC to maintain normal operation of the server, the method includes:
the single chip microcomputer judges whether the standby BMC works normally in real time;
if not, the single chip microcomputer records the related log.
Preferably, if not, after the step of determining whether the kernel loading stage of the BMC is abnormal, the method includes:
if not, judging whether the heartbeat information is received in a third preset time period by taking the previous heartbeat information receiving time of the single chip microcomputer as a starting time;
if not, the BMC is judged to be abnormal, and the standby BMC is started and switched to maintain the normal work of the server.
Preferably, if not, after the step of determining that the BMC is abnormal and starting and switching the standby BMC to maintain the normal operation of the server, the method includes:
the previous moment when the single chip microcomputer receives the heartbeat information is taken as a starting moment, and whether the heartbeat information is received in a fourth preset time period is judged;
if not, the standby BMC is judged to be abnormal, and the single chip microcomputer records related logs.
The present invention also provides a control device for a BMC system, including:
the BMC is used for controlling the work of each part in the server;
the standby BMC is used for replacing the BMC when the BMC is abnormal;
the singlechip is used for monitoring the working state of the BMC, switching the standby BMC, and controlling power supply reset and a dial switch;
the dial switch is used for switching the standby BMC;
the power supply is used for supplying power to all parts in the service;
and the power supply resetting device is used for resetting the power supply.
The present invention provides a storage medium, which is a computer-readable storage medium, on which a computer program is stored, which when executed implements a control method of a BMC system as described above.
The invention provides a computer device, which comprises a processor, a memory and a computer program stored on the memory and capable of running on the processor, wherein the control method of the BMC system is realized when the processor executes the computer program.
The invention has the beneficial effects that: when the BMC crashes, the server can automatically run the system in the standby BMC so as to protect the service of the server to automatically recover to normal in the shortest time and avoid economic loss. In addition, when the BMC system is hung dead, the work can be recovered in the shortest time to guarantee the service of the server, manual operation is not needed, and the problem can be conveniently analyzed by follow-up research and development personnel through abnormal log records.
Drawings
FIG. 1 is a flowchart illustrating a control method of a BMC system according to a first embodiment of the invention;
FIG. 2 is a schematic structural diagram of a control device of a BMC system according to a first embodiment of the invention;
FIG. 3 is a block diagram of an embodiment of a storage medium provided in the present application;
FIG. 4 is a block diagram of an embodiment of a computer device provided herein;
fig. 5 is a flowchart illustrating a control method of a BMC system according to a second embodiment of the present invention.
Description of reference numerals:
1. BMC; 2. standby BMC; 3. a single chip microcomputer; 4. a dial switch; 5. a power source; 6. a power supply reset device;
100. a storage medium; 200. a computer program; 300. a computer device; 400. a processor.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Referring to fig. 1, the present invention provides a method for controlling a BMC system, where the method is applied to a control device of the BMC system, and includes:
s1: judging whether the uboot stage of the BMC1 is abnormal or not;
s2: if not, judging whether the kernel loading stage of the BMC1 is abnormal;
s3: if yes, the BMC1 is judged to be abnormal, and the standby BMC2 is started and switched to maintain the normal work of the server.
In the embodiment of the invention, whether the uboot stage of the BMC1 is abnormal is judged. uboot belongs to a bootloader, and is used for booting a kernel, and the final purpose of the uboot is to read the kernel from a flash, place the kernel into a memory, and boot the kernel. If the uboot stage of the BMC1 is normal, the single chip microcomputer 3 continues to read the information of the kernel loading stage of the BMC1, and determines whether the kernel loading stage of the BMC1 is abnormal. If the loading kernel phase of the BMC1 is judged to be abnormal, the standby BMC2 is started and switched to maintain the normal operation of the server. Specifically, the dial switch 4 is controlled by setting a General Purpose Input/Output (GPIO) interface, then the GPIO pin of the power reset device 6 is pulled down to power up the server again, the standby BMC2 is started, the standby BMC is communicated with the single chip microcomputer 3 as usual in the starting process, and the single chip microcomputer 1 records the relevant logs. The communication between the single chip microcomputer 3 and the BMC1 is realized by transmitting a group of character strings through a UART (Universal Asynchronous Receiver/Transmitter, Universal serial data bus) interface, the character strings of the character strings are defined according to a certain format and include a message type, a message data length, message data and a CRC (Cyclic Redundancy Check code) Check value, and the byte lengths are 1 byte, 4 bytes and 1 byte respectively. The single chip microcomputer 3 and the BMC1 analyze the received message according to the designated format, and the sent message follows the designated format, so that the message instruction that the other party receives the error can be avoided, wherein CRC is a channel coding technology for generating a short fixed digit check code according to communication data, and is mainly used for detecting or checking the error which may occur after data transmission or storage. Through the arrangement, when the BMC1 crashes, the server can automatically run the system in the standby BMC2, so that the service of the server can be protected to be automatically recovered to be normal in the shortest time, and economic loss is avoided. In addition, when the BMC system is hung dead, the work can be recovered in the shortest time to guarantee the service of the server, manual operation is not needed, and the problem can be conveniently analyzed by follow-up research and development personnel through abnormal log records.
In other embodiments of the present invention, after the standby BMC2 normally operates, the single-chip microcomputer 3 sends the previously recorded log to the standby BMC2 through the UART interface, and the standby BMC2 stores the log and maintains communication with the single-chip microcomputer 3, that is, sends heartbeat information to the single-chip microcomputer 3 at regular time.
In another embodiment of the present invention, when the single chip microcomputer 3 does not receive the heartbeat message sent by the BMC1 within the preset time, it is determined that the BMC1 is abnormal, and the standby BMC2 is started and switched.
Further, the step S1 of determining whether the uboot phase of the BMC1 is abnormal includes:
s11: and taking the power-on time of the server as the starting time, the single chip microcomputer 3 judges whether first preset instruction information is received in a first preset time period, wherein the single chip microcomputer 3 is contained in a control device of the BMC system, and the content of the first preset instruction information is that the BMC1 successfully completes the uboot guidance.
In the embodiment of the present invention, with the power-on time of the server as the starting time, the single chip microcomputer 3 waits for the BMC1 to send a uboot guidance completion message, that is, determines whether a first preset instruction message is received within a first preset time period. In an embodiment of the present invention, the first preset time period is 60 seconds.
Further, after the step S11 of determining whether the uboot phase of the BMC1 is abnormal, the method includes:
s12: if yes, the BMC1 is judged to be abnormal, the standby BMC2 is started and switched, and relevant abnormal logs are recorded.
In the embodiment of the invention, when the BMC1 is abnormal in the uboot stage, the standby BMC2 can be immediately switched. Specifically, the single chip microcomputer 3 records the condition of uboot boot failure, controls the dial switch 4 by setting a GPIO interface, then pulls down the GPIO pin of the power reset device 6, re-powers the server, starts the standby BMC2, communicates with the single chip microcomputer 3 as usual in the starting process, and records the related log by the single chip microcomputer 3.
Further, the step S3 of determining whether the kernel loading phase of the BMC1 is abnormal includes:
s31: and taking the time of judging the normal uboot stage of the BMC1 as a starting time, the single chip microcomputer 3 judges whether second preset instruction information is received within a second preset time period, wherein the single chip microcomputer 3 is contained in a control device of the BMC system, and the content of the second preset instruction information is that the loading of the kernel of the BMC1 is completed and the normal operation is performed.
In the embodiment of the invention, the singlechip 3 monitors the working state of the BMC 1. With the time of judging the normal uboot stage of the BMC1 as the starting time, the single chip microcomputer 3 judges whether second preset instruction information is received within a second preset time period, wherein the second preset time period includes 180 seconds.
Further, if yes, after step S4 of determining that the BMC1 is abnormal, starting and switching the standby BMC2 to maintain normal operation of the server, the method includes:
s5: the single chip microcomputer 3 judges whether the standby BMC2 works normally in real time;
s6: if not, the singlechip 3 records the relevant log.
In the embodiment of the invention, when the standby BMC2 works abnormally, the single chip microcomputer 3 does not process the abnormal operation except for recording related logs. And the idle running of the program is avoided.
Referring to fig. 5, if not, after the step S2 of determining whether the kernel loading phase of the BMC1 is abnormal, the method includes:
S2A: if not, the previous heartbeat information receiving time of the singlechip 3 is taken as the starting time, and whether the heartbeat information is received in a third preset time period is judged;
S2B: if not, the BMC1 is judged to be abnormal, and the standby BMC2 is started and switched to maintain the normal work of the server.
In the embodiment of the invention, the BMC1 is also monitored by the single chip microcomputer 3 in the working process, and the single chip microcomputer 3 records related logs. When the BMC1 enters a normal operation state through the uboot stage and the kernel loading stage, the single chip microcomputer 3 sends a log recorded before to the BMC1 through the UART, and the BMC1 stores the log and keeps communication with the single chip microcomputer 3, that is, sends heartbeat information to the single chip microcomputer 3 at regular time. If the single chip microcomputer 3 does not receive the heartbeat information after timeout (such as 120 seconds), the single chip microcomputer 3 judges that the BMC1 crashes in normal operation, and then the standby BMC2 is started. In conclusion, the single chip microcomputer 3 is also used for monitoring in the starting process, and the single chip microcomputer 3 records relevant logs, so that the reliability of the BMC system is further ensured.
Further, if not, after the step S2B of determining that the BMC1 is abnormal and starting and switching the standby BMC2 to maintain the normal operation of the server, the method includes:
S2C: judging whether the heartbeat information is received in a fourth preset time period by taking the previous heartbeat information receiving time of the singlechip 3 as a starting time;
S2D: if not, the standby BMC2 is judged to be abnormal, and the single chip microcomputer 3 records a relevant log.
In the embodiment of the invention, after the standby BMC2 is started, the standby BMC2 is monitored by the single chip microcomputer 3 in the working process. If the single chip microcomputer 3 does not receive the heartbeat information after timeout (such as 120 seconds), the single chip microcomputer 3 judges that the standby BMC2 crashes in normal operation. At this time, the single chip microcomputer 3 only records the log and does not do other actions.
Referring to fig. 2, the present invention provides a control device of a BMC system, and the control method of the BMC system includes:
the BMC1 is used for controlling the work of each component in the server;
a standby BMC2 for replacing BMC1 when BMC1 is abnormal;
the singlechip 3 is used for monitoring the working state of the BMC1, switching the standby BMC2 and controlling power supply reset and the dial switch 4;
a dial switch 4 for switching the standby BMC 2;
a power supply 5 for supplying power to each component inside the service;
and the power supply resetting device 6 is used for resetting the power supply.
In the embodiment of the invention, the singlechip 3 and the dial switch 4 are added on the server mainboard, and the singlechip 3 is connected with the BMC1 and the standby BMC2 through the UART interface. The singlechip 3 is respectively connected with the dial switch 4 and the power supply resetting device 6 through GPIO interfaces. The dial SWITCH 4 is connected to the BMC1 and the standby BMC2 via switches, respectively. The standby BMC2 is run by setting the dip switch 4 and resetting the power supply to power up again when a problem occurs with the BMC system and the associated log is logged. Specifically, a dial switch 4, a standby BMC2 and a single chip microcomputer 3 are added in the hardware design. Before the power supply 5 is powered on, the dial switch 4 can be manually set, and when the power supply 5 is powered on, the circuit connected with the BMC1 is switched according to different codes, so that the BMC1 or the standby BMC2 can be selected to be started. In another embodiment of the present invention, the single chip microcomputer 3 may reset the power supply by setting the GPIO interface, and may select whether to start the BMC1 or the standby BMC2 by setting the GPIO interface to control the dial switch 4.
Referring to fig. 3, the present application further provides a storage medium 100, in which a computer program 200 is stored in the storage medium 100, and when the computer program runs on a computer, the computer is enabled to execute the control method of the BMC system described in the above embodiment.
Referring to fig. 4, the present application further provides a computer device 300 containing instructions, which when run on the computer device 300, causes the computer device 300 to execute the control method of the BMC system described in the above embodiments through a processor 400 disposed therein.
It will be appreciated by those skilled in the art that the control means of the BMC system of the present invention and the devices referred to above for performing one or more of the methods described in the present application. These devices may be specially designed and manufactured for the required purposes, or they may comprise known devices in general-purpose computers. These devices have stored therein computer programs or applications that are selectively activated or reconfigured. Such a computer program may be stored in a device (e.g., computer) readable medium, including, but not limited to, any type of disk including floppy disks, hard disks, optical disks, CD-ROMs, and magnetic-optical disks, ROMs (Read-Only memories), RAMs (Random Access memories), EPROMs (Erasable Programmable Read-Only memories), EEPROMs (Electrically Erasable Programmable Read-Only memories), flash memories, magnetic cards, or optical cards, or any type of media suitable for storing electronic instructions, and each coupled to a bus. That is, a readable medium includes any medium that stores or transmits information in a form readable by a device (e.g., a computer).
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A control method of a BMC system is characterized in that the method is applied to a control device of the BMC system and comprises the following steps:
judging whether the uboot stage of the BMC is abnormal or not;
if not, judging whether the loading kernel stage of the BMC is abnormal;
if yes, judging that the BMC is abnormal, and starting and switching the standby BMC to maintain the normal work of the server.
2. The method of claim 1, wherein the step of determining whether the uboot phase of the BMC is abnormal includes:
and taking the power-on time of the server as the starting time, and judging whether a first preset instruction message is received by the singlechip within a first preset time period, wherein the singlechip is contained in a control device of the BMC system, and the content of the first preset instruction message is that the BMC successfully completes uboot guidance.
3. The method of claim 2, wherein the step of determining whether the uboot phase of the BMC is abnormal is followed by the step of:
if yes, judging that the BMC is abnormal, starting and switching the standby BMC, and recording related abnormal logs.
4. The method of claim 1, wherein the step of determining whether the loading kernel phase of the BMC is abnormal comprises:
and taking the moment of judging the normal uboot stage of the BMC as a starting moment, and judging whether second preset instruction information is received or not by the single chip microcomputer within a second preset time period, wherein the single chip microcomputer is contained in a control device of the BMC system, and the content of the second preset instruction information is that the BMC loads a kernel to complete and normally operate.
5. The method of claim 1, wherein if the BMC is determined to be abnormal, and the step of starting and switching the standby BMC to maintain normal operation of the server is followed by the steps of:
the single chip microcomputer judges whether the standby BMC works normally in real time;
if not, the single chip microcomputer records the related logs.
6. The method of claim 1, wherein after the step of determining whether the loading kernel phase of the BMC is abnormal if not, the method comprises:
if not, judging whether the heartbeat information is received in a third preset time period by taking the previous heartbeat information receiving time of the single chip microcomputer as a starting time;
if not, judging that the BMC is abnormal, and starting and switching the standby BMC to maintain the normal work of the server.
7. The method of claim 6, wherein if the BMC system is not determined to be abnormal, and the step of starting and switching the standby BMC to maintain normal operation of the server is followed by the step of:
judging whether the heartbeat information is received in a fourth preset time period by taking the previous heartbeat information receiving time of the single chip microcomputer as a starting time;
if not, the standby BMC is judged to be abnormal, and the single chip microcomputer records relevant logs.
8. A control device for a BMC system to which the control method for a BMC system according to any one of claims 1 to 7 is applied, comprising:
the BMC is used for controlling the work of each part in the server;
the standby BMC is used for replacing the BMC when the BMC is abnormal;
the singlechip is used for monitoring the working state of the BMC, switching the standby BMC, and controlling power supply reset and a dial switch;
the dial switch is used for switching the standby BMC;
the power supply is used for supplying power to all parts in the service;
and the power supply resetting device is used for resetting the power supply.
9. A storage medium, which is a computer-readable storage medium having a computer program stored thereon, the computer program, when executed, implementing the method for controlling a BMC system according to any one of claims 1 to 7.
10. A computer device comprising a processor, a memory, and a computer program stored on the memory and executable on the processor, wherein the processor implements the method for controlling a BMC system according to any one of claims 1 to 7 when executing the computer program.
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| CN112905377A (en) * | 2021-02-10 | 2021-06-04 | 山东英信计算机技术有限公司 | Method, system and medium for avoiding BMC breakdown |
| CN115858251A (en) * | 2023-01-18 | 2023-03-28 | 苏州浪潮智能科技有限公司 | Control method and device for substrate control unit, electronic equipment and storage medium |
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