CN114860322A - Substrate management controller, control method and electronic equipment - Google Patents
Substrate management controller, control method and electronic equipment Download PDFInfo
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Abstract
The application provides a substrate management controller, a control method and an electronic device, wherein the method comprises the following steps: in the starting process of a baseboard management controller, the baseboard management controller is guided to start based on a first storage chip; under the condition that the abnormality of the first storage chip is detected, starting a second storage chip to guide the starting of the substrate management controller; and forcibly refreshing the first memory chip under the condition that the second memory chip completes the starting of the substrate management controller, and the normal operation of the substrate management controller can be ensured by applying the method.
Description
Technical Field
The present disclosure relates to the field of communications technologies, and in particular, to a substrate management controller, a control method, and an electronic device.
Background
A Baseboard Management Controller (BMC) is also called a Baseboard Management Controller. The machine can be subjected to operations such as firmware upgrading, machine equipment checking and the like in a state that the machine is not started, so that the machine can be widely applied to large or super-large-scale machine room centers and used as a management core of electronic equipment. In the starting and running processes of the baseboard management controller, when the memory chip is damaged or partially damaged, the baseboard management controller cannot run normally and cannot be recovered.
Disclosure of Invention
The application provides a substrate management controller, a control method and an electronic device, which are used for at least solving the technical problems in the prior art.
According to a first aspect of embodiments of the present application, there is provided a control method of a baseboard management controller, the method including: in the starting process of a substrate management controller, the substrate management controller is guided to start based on a first storage chip; under the condition that the abnormality of the first storage chip is detected, starting a second storage chip to guide the starting of the substrate management controller; and under the condition that the second storage chip completes the starting of the baseboard management controller, the first storage chip is forcibly refreshed.
In an embodiment, the method further comprises: determining first configuration data corresponding to the first memory chip under the condition that the first memory chip completes the startup of the baseboard management controller; and synchronously configuring the second memory chip according to the first configuration data.
In an embodiment, the method further comprises: under the condition that the first storage chip finishes the starting of the baseboard management controller, performing version check on the second storage chip to obtain version information; and determining whether to update the second memory chip according to the version information.
In an embodiment, the method further comprises: and determining log information corresponding to the first storage chip under the condition that the second storage chip completes the starting of the baseboard management controller.
In an embodiment, the method further comprises: and when the substrate management controller is powered on, if the first storage chip is abnormal, starting the second storage chip to guide the substrate management controller to start.
In an embodiment, in the case that the abnormality of the first memory chip is detected, starting a second memory chip to guide the baseboard management controller to start up includes: detecting whether the first storage chip is abnormal or not under the condition that the baseboard management controller starts any program; and in the case of detecting the abnormality of the first memory chip, starting the second memory chip to guide the substrate management controller to start.
In an embodiment, the detecting whether the first memory chip is abnormal includes: detecting the first storage chip, and recording the starting time and the starting times of the first storage chip to the specified program; and comparing the starting time and the starting times with a preset abnormal threshold value to determine whether the first memory chip is abnormal.
In an embodiment, the method further comprises: and under the condition that the first storage chip or the second storage chip does not normally start any program, the substrate management controller is guided to restart based on the first storage chip or the second storage chip.
According to a second aspect of embodiments of the present application, there is provided an electronic apparatus, including: the guide module is used for guiding the substrate management controller to start based on the first storage chip in the starting process of the substrate management controller; the starting module is used for starting the second storage chip to guide the substrate management controller to start under the condition that the abnormality of the first storage chip is detected; and the refreshing module is used for forcibly refreshing the first memory chip under the condition that the second memory chip completes the starting of the baseboard management controller.
In one embodiment, the apparatus further comprises: the determining module is used for determining first configuration data corresponding to the first storage chip under the condition that the first storage chip completes the starting of the baseboard management controller; and the synchronization module is used for performing synchronization configuration on the second memory chip according to the first configuration data.
In one embodiment, the apparatus further comprises: the checking module is used for checking the version of the second storage chip to obtain version information under the condition that the first storage chip completes the starting of the baseboard management controller; the determining module is further configured to determine whether to update the second memory chip according to the version information.
In an implementation manner, the determining module is further configured to determine log information corresponding to the first memory chip when the second memory chip completes the startup of the baseboard management controller.
In an implementation manner, the starting module is further configured to start the second memory chip to guide the baseboard management controller to start up if the first memory chip is abnormal when the baseboard management controller is powered on.
In one embodiment, the starting module includes: the detection submodule is used for detecting whether the first storage chip is abnormal or not under the condition that the baseboard management controller starts any program; and the starting submodule is used for starting the second memory chip to guide the substrate management controller to start under the condition that the abnormality of the first memory chip is detected.
In one embodiment, the detection sub-module includes: detecting the first storage chip, and recording the starting time and the starting times of the first storage chip to the specified program; and comparing the starting time and the starting times with a preset abnormal threshold value to determine whether the first memory chip is abnormal.
In one embodiment, the apparatus further comprises: and the restarting module is used for guiding the substrate management controller to restart based on the first storage chip or the second storage chip under the condition that the first storage chip or the second storage chip does not normally start any program.
According to a third aspect of embodiments of the present application, there is provided a baseboard management controller, the baseboard management controller including a baseboard management chip, a first memory chip, and a second memory chip; the first storage chip is used for guiding the substrate management controller to start in the starting process of the substrate management controller; the second storage chip is used for starting the second storage chip to guide the substrate management controller to start under the condition that the abnormality of the first storage chip is detected; and the baseboard management chip is used for forcibly refreshing the first storage chip under the condition that the second storage chip completes the starting of the baseboard management controller.
According to the control method of the baseboard management controller, provided by the embodiment of the application, through the arrangement of the first storage chip and the second storage chip, under the condition that any storage chip is abnormal, the other storage chip can be switched to achieve the purpose of guiding the baseboard management controller to be started, and after the starting is completed, the abnormal first storage chip is forcedly refreshed, so that the abnormal processing is achieved, and the normal use of the storage chip is guaranteed.
It should be understood that the statements in this section do not necessarily identify key or critical features of the embodiments of the present application, nor do they limit the scope of the present application. Other features of the present application will become apparent from the following description.
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The above and other objects, features and advantages of exemplary embodiments of the present application will become readily apparent from the following detailed description read in conjunction with the accompanying drawings. Several embodiments of the present application are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which:
in the drawings, the same or corresponding reference numerals indicate the same or corresponding parts.
Fig. 1 is a schematic flow chart illustrating an implementation of a control method of a baseboard management controller according to an embodiment of the present application;
fig. 2 is a schematic diagram illustrating a specific scenario of a control method of a baseboard management controller according to an embodiment of the present application;
FIG. 3 is a schematic structural diagram of a baseboard management controller according to an embodiment of the present application;
FIG. 4 is a schematic diagram illustrating an implementation module of an electronic device according to an embodiment of the present application;
fig. 5 is a schematic diagram illustrating a structure of an electronic device according to another embodiment of the present application.
Detailed Description
In order to make the objects, features and advantages of the present application more obvious and understandable, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are only a part of the embodiments of the present application, and not all the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Fig. 1 shows a schematic implementation flow diagram of a control method of a baseboard management controller according to an embodiment of the present application.
Referring to fig. 1, according to a first aspect of embodiments of the present application, there is provided a control method of a baseboard management controller, the method including: an operation 101 of guiding a baseboard management controller to start based on a first memory chip in a starting process of the baseboard management controller; an operation 102 of starting a second memory chip to guide the substrate management controller to start up in case of detecting the abnormality of the first memory chip; in operation 103, in case that the booting of the baseboard management controller is completed through the second memory chip, the first memory chip is forcibly refreshed.
According to the control method of the baseboard management controller, the first storage chip and the second storage chip which are connected with the BMC main control chip are arranged, under the condition that any storage chip is abnormal, the purpose of guiding the baseboard management controller to be started can be achieved through the other storage chip, and after the starting is completed, the abnormal first storage chip is forcibly refreshed, so that the abnormal processing is achieved, the normal use of the storage chip is guaranteed, and the stable starting and the stable operation of the baseboard management controller are achieved.
In the method operation 101, the first storage chip is used to represent a main storage chip (Flash) of a Baseboard Management Controller (BMC), and when the baseboard management controller is started, the first storage chip needs to be used to guide the starting of the baseboard management controller, which specifically includes that when the baseboard management controller is powered on and started, and under the condition that hardware of the first storage chip is not damaged, the first storage chip needs to sequentially guide a BMC firmware to start a Uboot program, a Kernel program, and a Software program.
In operation 102 of the method, in any step of starting the baseboard management controller, if the first storage chip is abnormal, the starting may be failed, and based on this, the method needs to perform abnormality detection on the first storage chip in each step of starting the baseboard management controller, and when the abnormality of the first storage chip is detected, switch to the second storage chip, and guide the baseboard management controller to start through the second storage chip. The second memory chip is used for representing a spare memory chip (Flash) of a Baseboard Management Controller (BMC).
Specifically, the reasons for the abnormality of the first memory chip in the method include two situations, namely, a BMC start failure caused by hardware damage of the first memory chip and a BMC start failure caused by software abnormality of the first memory chip. If the first memory chip is detected to be incapable of being powered on when the baseboard management controller is powered on and started, under the condition, the hardware of the first memory chip is determined to be damaged, and the baseboard management controller is directly started through the second memory chip. If the first storage chip can be powered on, it is indicated that the hardware of the first storage chip is normal, when the first storage chip boots and starts any one of the Uboot program, the Kernel program and the Software program, a start failure occurs, and it can be determined that the first storage chip has a Software exception.
After the second memory chip completes the starting of the substrate management controller, the method carries out forced refreshing on the first memory chip so as to reset the first memory chip. In the case of starting the baseboard management controller next time, the first memory chip can be reused to guide the baseboard management controller to start.
In an embodiment, the method further comprises: firstly, under the condition that the starting of a baseboard management controller is completed through a first storage chip, first configuration data corresponding to the first storage chip is determined; then, the second memory chip is synchronously configured according to the first configuration data.
In an implementation scenario, if the first storage chip has no hardware damage or software exception problem, that is, the first storage chip can normally guide to start the baseboard management controller, in the method, under the condition that the first storage chip completes the start of the baseboard management controller, the second storage chip can be synchronously configured through the first configuration data corresponding to the first storage chip, so that the first storage chip and the second storage chip have the same configuration, in the subsequent process of executing a specified task by using the baseboard management controller, if the first storage chip has a software exception, the method can be timely switched to the second storage chip, and because the first storage chip and the second storage chip are configured identically, the operation does not affect the operation of a user, and the user experience is improved. Specifically, the first configuration data may be used to refer to specific configuration data determined for user configuration, and the first configuration data is stored in the first memory chip. Namely, the method can only synchronize the specific configuration data configured by the user under the condition of data synchronization, does not need to synchronize all the configuration data, and can reduce the data quantity of configuration synchronization under the condition of meeting the configuration requirements of the user.
In an embodiment, the method further comprises: firstly, under the condition that the first storage chip finishes the starting of the substrate management controller, carrying out version check on a second storage chip to obtain version information; then, whether to update the second memory chip is determined according to the version information.
The method can also carry out version check on the second memory chip under the condition that the first memory chip finishes the starting of the baseboard management controller. Specifically, the method may preset a version condition, and compare the version check result with the preset version condition to determine whether the second memory chip needs to be version-updated. The preset version condition may be that whether the version of the second memory chip is the latest version is determined, and if the version check result indicates that the version of the second memory chip is not the latest version, the version of the second memory chip is updated. By doing so, the second memory chip can have better performance. The preset version condition may also be to determine whether the version of the second memory chip is consistent with the first memory chip. And if the version check result shows that the versions of the second memory chip and the first memory chip are not consistent, updating the second memory chip to enable the versions of the second memory chip and the first memory chip to be consistent. By the operation, the first storage chip and the second storage chip can have consistency in the using process, synchronous configuration of specific configuration data is facilitated, and further the using experience of a user is not influenced in the process of switching the storage chips.
In an embodiment, the method further comprises: and determining the log information corresponding to the first storage chip under the condition that the second storage chip completes the startup of the baseboard management controller.
When the first storage chip of the method is abnormal and the second storage chip is adopted to complete the boot startup of the baseboard management controller, the method can generate log information corresponding to the first storage chip, wherein the log information records the abnormal reasons of the first storage chip, such as hardware faults, Software abnormity aiming at any program of a Uboot program, a Kernel program and a Software program, and the like. The method can prompt the user through the log information so that the user can carry out timely maintenance processing under the condition that the first storage chip has hardware damage; or according to the user requirement, the first memory chip and the second memory chip can be switched under the condition that the first memory chip eliminates the software exception.
In an embodiment, the method further comprises: when the baseboard management controller is powered on, if the first storage chip is abnormal, the second storage chip is started to guide the baseboard management controller to start.
In an implementation scenario, if the first memory chip has a hardware damage problem, when the baseboard management controller is powered on, the first memory chip may be started and determined by detecting whether the first memory chip is powered on normally. The monitoring mode can be detected through built-in firmware, if the power-on starting time is overtime correspondingly, the problem that hardware is damaged exists in the first storage chip can be determined, at the moment, the second storage chip can be directly started, and the second storage chip is used for guiding the substrate management controller to start.
In one embodiment, in the case that the abnormality of the first memory chip is detected, the starting of the second memory chip to guide the starting of the baseboard management controller includes: firstly, detecting whether a first storage chip is abnormal or not under the condition that a substrate management controller starts any program; then, in the case where abnormality of the first memory chip is detected, the second memory chip is activated to guide the board management controller to be activated.
In another implementation scenario, if the first memory chip has a Software exception problem, that is, the first memory chip is powered on and started, and the Uboot program, the Kernel program, and the Software program are sequentially started by using the first memory chip, when any one of the Uboot program, the Kernel program, and the Software program is started by using the first memory chip, the method also performs a dog feeding operation on the WDT and sets a corresponding start time to detect whether the powered on and the start are normal. It is to be added that the start-up times for starting up the different program settings may be the same or different. As in one implementation, the boot time of the Uboot program is 22 seconds, and the boot time of the first memory chip boot-up each of the Kernel program and the Software program is set to 60 seconds. And determining whether the first memory chip has abnormity according to whether the response is overtime. According to actual operation, the method can only judge the abnormality according to the starting time, and in another implementation situation, the method can also detect and judge whether the first memory chip is abnormal or not according to the combination of the starting time and the starting times.
For example, the detecting whether the first memory chip is abnormal includes: firstly, detecting a first storage chip, and recording the starting time and the starting times of the first storage chip to a specified program; and then, comparing the starting time and the starting times with a preset abnormal threshold value to determine whether the first memory chip is abnormal.
In the method, the designated program refers to a Uboot program, a Kernel program, a Software program and Software corresponding to the target task. In a specific implementation scenario, the boot time of the first memory chip to boot each of the Uboot program, the Kernel program, and the Software program is set to 60 seconds, and a corresponding preset exception threshold is preset, where the preset exception threshold may be the maximum number of boot times, and the preset exception threshold is 3 times. In the case that the first memory chip boots and starts any one of the Uboot program, the Kernel program and the Software program, a watchdog feeding operation is executed by using the WDT to detect whether the starting of the corresponding program is normal. If the response is not performed within the starting time, the current starting frequency is increased by 1, the first storage chip is used for restarting, the first storage chip is determined to be abnormal under the condition that the current starting frequency meets a preset abnormal threshold value, namely the current starting frequency reaches 3 times, and at the moment, the second storage chip is switched to guide the substrate control manager to start. After the starting is finished, the method further comprises loading the target task by using the baseboard control manager, and it can be understood that, when the target task is loaded by using the baseboard control manager, the WDT is also used for executing the dog feeding operation to detect whether the starting of the program corresponding to the first memory chip is normal. And if the abnormal condition exists, the substrate management controller is guided to restart based on the first storage chip.
In an embodiment, the method further comprises: and under the condition that the first storage chip or the second storage chip does not normally start any program, the substrate management controller is guided to restart based on the first storage chip or the second storage chip.
The method is characterized in that under the condition that the memory chip is used for sequentially guiding and starting the Uboot program, the Kernel program and the Software program, the Uboot program, the Kernel program and the Software program are all restarted under the condition that any program is abnormal in current starting. For example, in an implementation scenario, the first memory chip of the method has already started the complete Uboot program and the Kernel program, and in a case of starting the Software program, a start exception occurs, and the current start number is lower than a preset exception threshold. At the moment, the first storage chip is controlled to restart the Uboot program, the Kernel program and the Software program in sequence. It should be added that, when the first memory chip is abnormally booted by the second memory chip to the baseboard management controller, the detection of the second memory chip is consistent with the detection of the first memory chip, that is, when the second memory chip is booted by the baseboard management controller to boot any program, whether the second memory chip is abnormal or not is detected.
Fig. 2 is a schematic diagram illustrating a specific scenario of a control method of a baseboard management controller according to an embodiment of the present application. Fig. 3 shows a schematic structural diagram of a baseboard management controller according to an embodiment of the present application.
Referring to fig. 2 and 3, to facilitate the overall understanding of the above embodiments, a specific implementation scenario is provided below, in which a baseboard management controller includes a baseboard management chip 301 and a first memory chip 303 and a second memory chip 302 connected to the baseboard management chip 301. The substrate management chip 301 is a BMC main control chip, wherein the first storage chip 303 is a main Flash chip, and the second storage chip 302 is a standby Flash chip.
And when the substrate management controller needs to be started, the substrate management controller is powered on, the built-in detection chip detects whether the main Flash chip is normally powered on, and if the main Flash chip is not normally powered on, the standby Flash chip guides the substrate management controller to be started.
And if the main Flash chip is normally powered on, the main Flash chip is utilized to guide and start the Uboot program. Meanwhile, setting the starting time and the preset abnormal time threshold value of the corresponding Uboot program, and executing a dog feeding operation by using WDT to detect whether the main Flash chip guides to start the Uboot program normally. If the situation that no response is received within the starting time and the number of times of non-response does not exceed a preset abnormal number threshold value is detected, a main Flash chip is used for guiding and restarting the Uboot program; if the responses are not received within the starting time and the number of times of non-response exceeds a preset abnormal number threshold value, the main Flash chip is judged to boot the Uboot program to be abnormal, and the spare Flash chip is used for booting the substrate management controller to start the Uboot program.
And if the boot starting Uboot program of the main Flash chip is normal, the Kernel program is booted and started by using the main Flash chip. Meanwhile, setting the starting time of the corresponding Kernel program and a preset abnormal time threshold value, and executing a dog feeding operation by using WDT (distributed data set) to detect whether the main Flash chip is normal or not for guiding the starting of the Kernel program. If the situation that no response is received within the starting time and the number of times of non-response does not exceed a preset abnormal number threshold value is detected, a main Flash chip is used for guiding and restarting the Uboot program; and detecting the operation of restarting the Uboot program according to the operation again. If the responses are not received within the starting time and the number of times of non-response exceeds a preset abnormal number threshold value, the main Flash chip is judged to boot the Kernel program to be abnormal, and the spare Flash chip is used for booting the substrate management controller to start the Uboot program.
And if the Kernel program is normally booted and started by the main Flash chip, booting and starting the Software program by using the main Flash chip. Meanwhile, setting the starting time and the preset abnormal time threshold value of the corresponding Software program, and executing a dog feeding operation by using WDT (hardware-in-the-loop test) to detect whether the Software program is started normally under the guidance of a main Flash chip. If the situation that no response is received within the starting time and the number of times of non-response does not exceed a preset abnormal number threshold value is detected, a main Flash chip is used for guiding and restarting the Uboot program; and detecting the operation of restarting the Uboot program according to the operation again. If the responses are not received within the starting time and the number of times of non-response exceeds a preset abnormal number threshold value, the main Flash chip is judged to guide and start the Software program abnormally, and the standby Flash chip is used for guiding the substrate management controller to start the Uboot program.
And if the Software program started by the main Flash chip is normal, the base plate management controller executes the target task by using the main Flash chip, meanwhile, checks the version of the standby Flash chip to obtain corresponding version information, and updates the version information under the condition that the version information does not meet the specified version requirement.
In the process of executing the target task, the WDT can also be used for executing the dog feeding operation to detect whether the main Flash chip normally operates or not, and in the process of operating the substrate management controller, the configuration information of the main Flash chip is synchronized to the standby Flash chip at regular time or when the configuration information of the main Flash chip changes.
In any operation of the preorder operation, if the main Flash chip is judged to guide any program to be abnormal, the standby Flash chip is used for guiding the substrate management controller to start the Uboot program, and the standby Flash chip is monitored according to the method until the substrate management controller finishes starting by using the standby Flash chip. After the substrate management controller is started, the main Flash chip is forcibly refreshed, and a corresponding prompt log is generated to prompt a user.
Referring to fig. 3, according to a second aspect of the embodiments of the present application, there is provided a baseboard management controller including a baseboard management chip 301, a first memory chip 303, and a second memory chip 302; the first memory chip 303 is used for guiding the baseboard management controller to start up in the starting process of the baseboard management controller; the second memory chip 302 is used for starting the second memory chip to guide the substrate management controller to start under the condition that the abnormality of the first memory chip is detected; and the baseboard management chip 301 is used for performing forced refreshing on the first memory chip when the second memory chip completes the starting of the baseboard management controller.
Fig. 4 shows a schematic diagram of an implementation module of an electronic device according to an embodiment of the present application.
Referring to fig. 4, according to a third aspect of embodiments of the present application, there is provided an electronic apparatus including: the boot module 401 is configured to boot the baseboard management controller based on the first memory chip in a boot process of the baseboard management controller; a starting module 402, configured to, when an abnormality of the first memory chip is detected, start the second memory chip to guide the substrate management controller to start; and a refresh module 403, configured to perform forced refresh on the first memory chip when the second memory chip completes the startup of the baseboard management controller.
In one embodiment, the apparatus further comprises: a determining module 404, configured to determine first configuration data corresponding to a first memory chip when the first memory chip completes starting of the baseboard management controller; the synchronization module 405 is configured to perform synchronization configuration on the second memory chip according to the first configuration data.
In one embodiment, the apparatus further comprises: the checking module 406 is configured to perform version checking on the second memory chip to obtain version information when the first memory chip completes the startup of the baseboard management controller; the determining module 404 is further configured to determine whether to update the second memory chip according to the version information.
In an implementation manner, the determining module 404 is further configured to determine log information corresponding to the first memory chip in a case that the second memory chip completes the startup of the bmc.
In an implementation manner, the starting module 402 is further configured to start the second memory chip to guide the baseboard management controller to start if the first memory chip is abnormal when the baseboard management controller is powered on.
In one embodiment, the starting module 402 includes: the detection submodule 4021 is configured to detect whether the first storage chip is abnormal or not when the baseboard management controller starts any program; the promoter module 4022 is configured to boot the second memory chip to direct the substrate management controller to boot up when the abnormality of the first memory chip is detected.
In an embodiment, the detection sub-module 4021 includes: detecting a first storage chip, and recording the starting time and starting times of the first storage chip to the specified program; and comparing the starting time and the starting times with a preset abnormal threshold value to determine whether the first storage chip is abnormal.
In one embodiment, the apparatus further comprises: the restart module 407 is configured to, when the first memory chip or the second memory chip does not normally start any program, boot the substrate management controller to restart based on the first memory chip or the second memory chip.
According to an embodiment of the present application, an electronic device and a readable storage medium are also provided.
FIG. 5 shows a schematic block diagram of an example electronic device that may be used to implement another embodiment of the present application.
Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be examples only, and are not meant to limit implementations of the present application that are described and/or claimed herein.
As shown in fig. 5, the apparatus 500 comprises a computing unit 501 which may perform various appropriate actions and processes in accordance with a computer program stored in a Read Only Memory (ROM)502 or a computer program loaded from a storage unit 508 into a Random Access Memory (RAM) 503. In the RAM 503, various programs and data required for the operation of the device 500 can also be stored. The calculation unit 501, the ROM 502, and the RAM 503 are connected to each other by a bus 504. An input/output (I/O) interface 505 is also connected to bus 504.
A number of components in the device 500 are connected to the I/O interface 505, including: an input unit 506 such as a keyboard, a mouse, or the like; an output unit 507 such as various types of displays, speakers, and the like; a storage unit 508, such as a magnetic disk, optical disk, or the like; and a communication unit 509 such as a network card, modem, wireless communication transceiver, etc. The communication unit 509 allows the device 500 to exchange information/data with other devices through a computer network such as the internet and/or various telecommunication networks.
The computing unit 501 may be a variety of general-purpose and/or special-purpose processing components having processing and computing capabilities. Some examples of the computing unit 501 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various dedicated Artificial Intelligence (AI) computing chips, various computing units running machine learning model algorithms, a Digital Signal Processor (DSP), and any suitable processor, controller, microcontroller, and so forth. The calculation unit 501 executes the respective methods and processes described above, such as a control method of a baseboard management controller. For example, in some embodiments, a control method of a baseboard management controller can be implemented as a computer software program tangibly embodied in a machine-readable medium, such as storage unit 508. In some embodiments, part or all of the computer program may be loaded and/or installed onto the device 500 via the ROM 502 and/or the communication unit 509. When the computer program is loaded into the RAM 503 and executed by the computing unit 501, one or more steps of a control method of a baseboard management controller described above may be performed. Alternatively, in other embodiments, the computing unit 501 may be configured to perform a control method of a baseboard management controller by any other suitable means (e.g., by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuitry, Field Programmable Gate Arrays (FPGAs), Application Specific Integrated Circuits (ASICs), Application Specific Standard Products (ASSPs), system on a chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs that are executable and/or interpretable on a programmable system including at least one programmable processor, which may be special or general purpose, receiving data and instructions from, and transmitting data and instructions to, a storage system, at least one input device, and at least one output device.
Program code for implementing the methods of the present application may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the program codes, when executed by the processor or controller, cause the functions/operations specified in the flowchart and/or block diagram to be performed. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of this application, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which a user can provide input to the computer. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic, speech, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a back-end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back-end, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), Wide Area Networks (WANs), and the Internet.
The computer system may include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server may be a cloud server, a server of a distributed system, or a server with a combined blockchain.
It should be understood that various forms of the flows shown above may be used, with steps reordered, added, or deleted. For example, the steps described in the present disclosure may be executed in parallel, sequentially, or in different orders, and are not limited herein as long as the desired results of the technical solutions disclosed in the present disclosure can be achieved.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (10)
1. A method of controlling a baseboard management controller, the method comprising:
in the starting process of a substrate management controller, the substrate management controller is guided to start based on a first storage chip;
under the condition that the abnormality of the first storage chip is detected, starting a second storage chip to guide the starting of the substrate management controller;
and under the condition that the second storage chip completes the starting of the baseboard management controller, the first storage chip is forcibly refreshed.
2. The method of claim 1, further comprising:
determining first configuration data corresponding to the first memory chip under the condition that the first memory chip completes the startup of the baseboard management controller;
and synchronously configuring the second memory chip according to the first configuration data.
3. The method of claim 1, further comprising:
under the condition that the first storage chip finishes the starting of the baseboard management controller, performing version check on the second storage chip to obtain version information;
and determining whether to update the second memory chip according to the version information.
4. The method of claim 1, further comprising:
and determining log information corresponding to the first storage chip under the condition that the second storage chip completes the starting of the baseboard management controller.
5. The method of claim 1, further comprising:
and when the substrate management controller is powered on, if the first storage chip is abnormal, starting the second storage chip to guide the substrate management controller to start.
6. The method of claim 1, in the event that the first memory chip is detected to be abnormal, booting a second memory chip to direct the baseboard management controller to boot up, comprising:
detecting whether the first storage chip is abnormal or not under the condition that the baseboard management controller starts any program;
and in the case of detecting the abnormality of the first memory chip, starting the second memory chip to guide the substrate management controller to start.
7. The method of claim 6, wherein the detecting whether the first memory chip is abnormal comprises:
detecting the first storage chip, and recording the starting time and starting times of the first storage chip to a specified program;
and comparing the starting time and the starting times with a preset abnormal threshold value to determine whether the first memory chip is abnormal.
8. The method of claim 6, further comprising:
and under the condition that the first storage chip or the second storage chip does not normally start any program, the substrate management controller is guided to restart based on the first storage chip or the second storage chip.
9. An electronic device, the electronic device comprising:
the guide module is used for guiding the substrate management controller to start based on the first storage chip in the starting process of the substrate management controller;
the starting module is used for starting a second storage chip to guide the substrate management controller to start under the condition that the first storage chip is detected to be abnormal;
and the refreshing module is used for forcibly refreshing the first memory chip under the condition that the second memory chip completes the starting of the baseboard management controller.
10. A baseboard management controller comprises a baseboard management chip, a first storage chip and a second storage chip;
the first storage chip is used for guiding the baseboard management controller to start in the starting process of the baseboard management controller;
the second memory chip is used for starting the second memory chip to guide the substrate management controller to start under the condition that the first memory chip is detected to be abnormal;
and the baseboard management chip is used for forcibly refreshing the first storage chip under the condition that the second storage chip completes the starting of the baseboard management controller.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN115576747A (en) * | 2022-11-21 | 2023-01-06 | 苏州浪潮智能科技有限公司 | Method, system, device and medium for recovering firmware fault of baseboard management controller |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114047958A (en) * | 2021-10-31 | 2022-02-15 | 山东云海国创云计算装备产业创新中心有限公司 | Starting method, equipment and medium for baseboard management controller of server |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114047958A (en) * | 2021-10-31 | 2022-02-15 | 山东云海国创云计算装备产业创新中心有限公司 | Starting method, equipment and medium for baseboard management controller of server |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115576747A (en) * | 2022-11-21 | 2023-01-06 | 苏州浪潮智能科技有限公司 | Method, system, device and medium for recovering firmware fault of baseboard management controller |
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