CN111697666A - Equalizing charging circuit and equalizing method - Google Patents
Equalizing charging circuit and equalizing method Download PDFInfo
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- CN111697666A CN111697666A CN202010634358.5A CN202010634358A CN111697666A CN 111697666 A CN111697666 A CN 111697666A CN 202010634358 A CN202010634358 A CN 202010634358A CN 111697666 A CN111697666 A CN 111697666A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0013—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries acting upon several batteries simultaneously or sequentially
- H02J7/0014—Circuits for equalisation of charge between batteries
- H02J7/0016—Circuits for equalisation of charge between batteries using shunting, discharge or bypass circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/44—Methods for charging or discharging
- H01M10/441—Methods for charging or discharging for several batteries or cells simultaneously or sequentially
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/00302—Overcharge protection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/00304—Overcurrent protection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/007—Regulation of charging or discharging current or voltage
- H02J7/00712—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters
- H02J7/007182—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters in response to battery voltage
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
The invention provides an equalizing charge circuit and an equalizing method, wherein the device comprises current-limiting charge circuits connected in parallel at two ends of a charge-discharge protection circuit, and a main processor controls the current-limiting charge circuit to work when the charge-discharge protection circuit is over-charged, so that the charge current is lower than the passive equalizing current. In the method, after overcurrent protection is carried out, a battery is charged by adopting passive equalization current. The invention can achieve the purpose of fully charging each power core only by adding one current-limiting charging circuit less than 100mA, and has low cost.
Description
Technical Field
The invention relates to the field of lithium battery charging and discharging protection circuits, in particular to an equalizing charging circuit and an equalizing method.
Background
Lithium batteries are used in energy storage systems as a high energy density rechargeable battery. Due to the characteristics of the lithium battery cell, it is desirable to avoid overcharging or overdischarging of the cell. In a series of lithium batteries, overcharging of a single battery requires stopping charging, which may cause other batteries to be insufficiently charged, and over time, the performance of the battery pack deteriorates and the capacity decreases. Therefore, in order to protect the lithium battery, it is necessary to perform equalization at the time of charge and discharge.
There are two existing equalization methods:
one is to adopt passive equalization, as shown in fig. 1, a resistor is connected in parallel at two ends of the battery, and when the voltage of the cell is high, the resistor is switched on to discharge the capacitor.
The passive equalization process is as follows:
1, when charging, the voltage of B2 is too high and exceeds the limit of equalizing voltage, the switch S2 is switched on, and B2 is discharged through the current I2, so that the aim of equalizing is fulfilled;
2> since passive equalization is an energy-dissipating type of equalization, I2 is typically less than 100 mA;
3> the general charging current I is far larger than 1A (for example, for a 100Ah battery pack, the minimum charging current is also 10A), I2 is much smaller than I, B2 still can be charged to the overcharge protection very quickly, and the whole battery pack stops charging, so that other batteries are not fully charged.
Therefore, the passive equalization mode has poor equalization effect and is difficult to achieve equalization effect.
One is active equalization, which is better but costly by designing the converter to transfer the battery energy through a power electronic converter.
At present, many active equalization methods design complex circuits and control logics through power electronic switching devices to achieve the purpose of energy conversion, as shown in fig. 2, the method is a single-to-group equalization method, as shown in fig. 3, the method is a group-to-single equalization method, as shown in fig. 4, the method is a bidirectional equalization method, as shown in fig. 5, the active equalization methods basically charge other insufficiently charged batteries after absorbing energy elements such as energy capacitors and inductors in the excessively charged part of the series-connected batteries, and overcome the defect of energy loss caused by resistance absorption in passive equalization. However, due to high cost and complex control, no simple and reliable balancing method with controllable cost and good effect is available at present.
Disclosure of Invention
The present invention provides an equalizing charge circuit and an equalizing method for overcoming the above-mentioned disadvantages of the existing equalizing charge circuit. When charging, the battery pack can be fully charged by a simple, safe and low-cost method, and the effect of equalizing charging is achieved.
The technical scheme for realizing the technical purpose of the invention is as follows: a charge equalization circuit comprises a passive equalization circuit connected in parallel with two ends of a single battery in a battery pack and a charge and discharge protection circuit arranged in a charge and discharge loop of the battery pack, wherein the passive equalization circuit and the charge and discharge protection circuit are controlled by a main processor; the main processor controls the current-limiting charging circuit to work when the charging and discharging protection circuit is in overcharge protection, so that the charging current is lower than the passive equalizing current.
Further, in the equalizing charge circuit described above: the charge and discharge protection circuit comprises an MOS tube Q1, an MOS tube Q2, a diode D1 and a diode D2, wherein the MOS tube Q1 and the MOS tube Q2 are connected with a D pole, the G pole is controlled by a main processor, the diode D1 is connected between the D-S poles of the MOS tube Q1 in parallel, the diode D2 is connected between the D-S poles of the MOS tube Q2 in parallel, and the P poles of the diode D1 and the diode D2 are respectively connected with the S poles of the MOS tube Q1 and the MOS tube Q2.
Further, in the equalizing charge circuit described above: the charging and discharging protection circuit comprises a relay K1, a relay K2, a diode D1 and a diode D2 which are controlled by a main processor; the relay K1 and the relay K2 are connected in series in a charge-discharge circuit, the diode D1 and the diode D2 are respectively arranged at two ends of the relay K1 and the relay K2, and cathodes of the two are connected.
Further, in the equalizing charge circuit described above: the current-limiting charging circuit comprises a relay K3 and a resistor R1, wherein the main processor controls whether to pull in the current-limiting charging circuit, the relay K3 and the resistor R are connected in series and then connected in parallel to the charging and discharging protection circuit, and the resistor R1 selects a resistor with the resistance value when the limiting current is smaller than the passive equalizing current.
Further, in the equalizing charge circuit described above: the current-limiting charging circuit comprises a relay K3 and a resistor R1, wherein the main processor controls whether to pull in the current-limiting charging circuit, the relay K3 and the resistor R are connected in series and then connected in parallel to two ends of an overcharge protection switch in the charging and discharging protection circuit, and the resistor R1 selects a resistor with the limiting current smaller than the passive equalizing current.
Further, in the equalizing charge circuit described above: the current limiting circuit comprises an MOS transistor Q3, an MOS transistor Q4, a diode D3, a diode D4 and a resistor R1, wherein the D poles of the MOS transistor Q3 and the MOS transistor Q4 are connected, the G pole is controlled by a main processor, the two S poles are respectively connected with the two ends of a charging and discharging protection circuit, the diode D3 and the diode D4 are respectively arranged at the two ends of the D-S poles of the MOS transistor Q3 and the MOS transistor Q4, the diode D3 is connected with the cathode of the diode D4, the resistor R1 is arranged in a circuit formed by connecting the MOS transistor Q3 and the MOS transistor Q4 in series, and the resistance value of the resistor R1 selects the resistor when the limiting current is smaller than the passive balanced current.
Further, in the equalizing charge circuit described above: the MOS transistor Q3, the diode D3 and the resistor R1 are included, the G pole of the MOS transistor Q3 is controlled by a main processor, the diode D3 is arranged between the D poles and the S pole of the MOS transistor Q3, and the anode of the diode D3 is connected with the S pole of the MOS transistor Q3; the D, S pole of the MOS transistor Q3 is connected in parallel to two ends of an overcharge protection switch in the charge-discharge protection circuit, the resistor R1 is connected in series to any end S, D of the MOS transistor Q3, and the resistance value of the resistor R1 selects a resistor when the limiting current is smaller than the passive equilibrium current.
The invention also provides an equalizing charge method of the equalizing charge circuit, which comprises the following steps:
when the charging circuit is normally charged, the charging and discharging protection circuit is conducted, passive equalization is not started, and the current-limiting charging circuit does not work;
when the single battery cell in the series battery pack reaches the balanced voltage, the passive balance is started to discharge for the battery cell;
when the battery cell is continuously charged to a high level and is charged to an overcharge protection point, the charge-discharge protection circuit works, the overcharge protection switch is switched off, the current-limiting charging circuit works, and the charging current is limited to be lower than the passive equilibrium current; the batteries are charged with a small current until each battery reaches a full state.
The invention can achieve the purpose of fully charging each power core only by adding one current-limiting charging circuit less than 100mA, and has low cost.
Each battery cell can be fully charged with small current, and the balancing effect is good.
The circuit is simple, the control is simple, and the safety and the reliability are realized.
The invention will be explained in more detail below with reference to the drawings and examples.
Drawings
Fig. 1 is a schematic diagram of a passive equalization circuit.
Fig. 2 is a schematic circuit diagram of a single-to-group equalization mode.
Fig. 3 is a circuit schematic of a group-to-group equalization scheme.
Fig. 4 is a schematic diagram of a bidirectional equalization circuit.
Fig. 5 is a schematic circuit diagram of an equalizing circuit of a flying plating capacitor system.
Fig. 6 is a schematic diagram of an equalizing charge circuit of the present invention.
Fig. 7 is a schematic diagram of the charge/discharge protection circuit embodiment 1 of the present invention.
Fig. 8 is a schematic diagram of a charge/discharge protection circuit embodiment 2 of the present invention.
Fig. 9 is a schematic diagram of a current limited charging circuit embodiment 1 of the present invention.
Fig. 10 is a schematic diagram of a current limited charging circuit embodiment 2 of the present invention.
Fig. 11 is a schematic diagram of a current limited charging circuit embodiment 3 of the present invention.
Fig. 12 is a schematic diagram of a current limited charging circuit embodiment 4 of the present invention.
Detailed Description
Embodiment 1, this embodiment is an equalizing charge circuit, as shown in fig. 6: the charging and discharging protection circuit is arranged in a charging and discharging loop of the battery pack, and the passive equalization circuit and the charging and discharging protection circuit are controlled by a main processor; the main processor controls the current-limiting charging circuit to work when the charging and discharging protection circuit is in overcharge protection, so that the charging current is lower than the passive equalizing current.
The charging process is as follows:
1) the positive and negative electrodes of the battery after being connected in series are B + and B-.
2) The output of the battery pack is B + and P-, and B-can be output as P-through the protection circuit. In practice, B + can be output as P + via a protection circuit.
3) When the charging circuit is normally charged, the charging and discharging protection circuit is conducted, passive equalization is not started, and the current-limiting charging circuit does not work;
4) when the single battery cell reaches the balanced voltage, the passive balanced starting is carried out to discharge for the battery cell;
5) when the battery cell is continuously charged to a high level and is charged to an overcharge protection point, the charge protection circuit works in the charge-discharge protection circuit, the charge is not allowed, and meanwhile, the current-limiting charge circuit works to limit the charge current to be lower than the passive equalization current; keeping small current to charge the batteries until each battery reaches a full state;
in this embodiment, the charging/discharging protection circuit and the current-limiting charging circuit have various forms.
First, as shown in fig. 7, the charge/discharge protection circuit is in a push-to-top MOS mode, and the two MOS transistors Q1 and Q2 are a charge protection MOS transistor and a discharge protection MOS transistor, respectively.
The specific charge and discharge protection circuit is shown in fig. 7 and comprises a MOS transistor Q1, a MOS transistor Q2, a diode D1 and a diode D2 which are arranged on a charge and discharge circuit and connected with a D pole, wherein G poles of the MOS transistor Q1 and the MOS transistor Q2 are controlled by a main processor, a diode D1 is connected between D-S poles of the MOS transistor Q1 in parallel, a diode D2 is connected between D-S poles of the MOS transistor Q2 in parallel, and P poles of the diode D1 and a diode D2 are respectively connected with S poles of the MOS transistor Q1 and the MOS transistor Q2.
The charging and discharging protection circuit can also adopt a mode of a relay and a diode, and the two relays K1 and K2 are a charging relay and a discharging relay respectively. As shown in fig. 8: the charge and discharge protection circuit comprises a relay K1, a relay K2, a diode D1 and a diode D2 which are controlled by a main processor; the relay K1 and the relay K2 are connected in series in a charge-discharge circuit, the diode D1 and the diode D2 are respectively arranged at two ends of the relay K1 and the relay K2, and cathodes of the two are connected.
There are also a number of ways to limit the charging current. The relay is a relay and series current limiting resistor, as shown in fig. 9 and fig. 10, the method selects a proper resistance value, and the limiting current is certainly smaller than the passive equilibrium current. The specific circuit is shown in fig. 9: the current-limiting charging circuit comprises a relay K3 and a resistor R1, wherein the relay K3 and the resistor R are controlled by a main processor to be attracted or not, the relay K3 and the resistor R are connected in series and then connected in parallel to the charging and discharging protection circuit, and the resistor R1 selects a resistor with the resistance value when the limiting current is smaller than the passive equalizing current.
As shown in fig. 10: the current-limiting charging circuit comprises a relay K3 and a resistor R1, wherein the main processor controls whether to pull in the current-limiting charging circuit, the relay K3 and the resistor R are connected in series and then connected in parallel to two ends of an overcharge protection switch in the charge-discharge protection circuit, and the resistor R1 selects a resistor with the limiting current smaller than the passive equalizing current.
The MOS transistor and the series current-limiting resistor are shown in fig. 11 and 12, the MOS transistor works in two modes of complete conduction and complete disconnection, a proper resistance value is selected, and the limiting current is certainly smaller than the passive equilibrium current;
as shown in fig. 11, the device includes a MOS transistor Q3, a MOS transistor Q4, a diode D3, a diode D4, and a resistor R1, the MOS transistor Q3 is connected to the D-pole of the MOS transistor Q4, the G-pole is controlled by a host processor, the two S-poles are respectively connected to two ends of the charging and discharging protection circuit, the diode D3 and the diode D4 are respectively disposed at two ends of the D-S-pole of the MOS transistor Q3 and the MOS transistor Q4, the diode D3 is connected to the cathode of the diode D4, the resistor R1 is disposed in a circuit in which the MOS transistor Q3 and the MOS transistor Q4 are connected in series, and the resistor R1 selects a resistor when the limiting current is smaller than the passive equalizing current.
As shown in fig. 12: the MOS transistor Q3, the diode D3 and the resistor R1 are included, the G pole of the MOS transistor Q3 is controlled by a main processor, the diode D3 is arranged between the D poles and the S pole of the MOS transistor Q3, and the anode of the diode D3 is connected with the S pole of the MOS transistor Q3; the D, S pole of the MOS transistor Q3 is connected in parallel to two ends of an overcharge protection switch in the charge-discharge protection circuit, the resistor R1 is connected in series to any end S, D of the MOS transistor Q3, and the resistance value of the resistor R1 selects a resistor when the limiting current is smaller than the passive equilibrium current.
Claims (8)
1. A charge equalization circuit comprises a passive equalization circuit connected in parallel with two ends of a single battery in a battery pack and a charge and discharge protection circuit arranged in a charge and discharge loop of the battery pack, wherein the passive equalization circuit and the charge and discharge protection circuit are controlled by a main processor; the method is characterized in that: the main processor controls the current-limiting charging circuit to work when the charging and discharging protection circuit is in overcharge protection, so that the charging current is lower than the passive equalizing current.
2. The equalizing charge circuit of claim 1, wherein: the charge and discharge protection circuit comprises an MOS tube Q1, an MOS tube Q2, a diode D1 and a diode D2, wherein the MOS tube Q1 and the MOS tube Q2 are arranged on a charge and discharge loop, the G poles are controlled by a main processor, the diode D1 is connected between the D poles and the S poles of the MOS tube Q1 in parallel, the diode D2 is connected between the D poles and the S poles of the MOS tube Q2 in parallel, and the P poles of the diode D1 and the diode D2 are respectively connected with the S poles of the MOS tube Q1 and the MOS tube Q2.
3. The equalizing charge circuit of claim 1, wherein: the charging and discharging protection circuit comprises a relay K1, a relay K2, a diode D1 and a diode D2 which are controlled by a main processor; the relay K1 and the relay K2 are connected in series in a charge-discharge circuit, the diode D1 and the diode D2 are respectively arranged at two ends of the relay K1 and the relay K2, and cathodes of the two are connected.
4. The equalizing charge circuit of claim 2 or 3, wherein: the current-limiting charging circuit comprises a relay K3 and a resistor R1, wherein the main processor controls whether to pull in the current-limiting charging circuit, the relay K3 and the resistor R are connected in series and then connected in parallel to the charging and discharging protection circuit, and the resistor R1 is selected to have a resistance value which is smaller than the resistance value of the passive balanced current.
5. The equalizing charge circuit of claim 2 or 3, wherein: the current-limiting charging circuit comprises a relay K3 and a resistor R1, wherein the main processor controls whether to pull in the current-limiting charging circuit, the relay K3 and the resistor R are connected in series and then connected to two ends of an overcharge protection switch in the charging and discharging protection circuit in parallel, and the resistor R1 selects a resistor with the resistance value when the limiting current is smaller than the passive equalizing current.
6. The equalizing charge circuit of claim 2 or 3, wherein: including MOS pipe Q3 and MOS pipe Q4, diode D3, diode D4, resistance R1, MOS pipe Q3 and MOS pipe Q4 'S D utmost point link to each other, the G utmost point accepts the main processor control, two S utmost points connect the both ends of charge-discharge protection circuit respectively, diode D3 and diode D4 set up respectively at MOS pipe Q3 and MOS pipe Q4' S D-S utmost point both ends, diode D3 and diode D4 negative pole link to each other, resistance R1 sets up in the circuit that MOS pipe Q3 and MOS pipe Q4 establish ties, resistance R1 resistance select the resistance when limiting current is less than passive balanced current.
7. The equalizing charge circuit of claim 2 or 3, wherein: the MOS transistor comprises an MOS transistor Q3, a diode D3 and a resistor R1, wherein the G pole of the MOS transistor Q3 is controlled by a main processor, the diode D3 is arranged between the D-S poles of the MOS transistor Q3, and the anode of the diode D3 is connected with the S pole of the MOS transistor Q3; the D, S pole of the MOS transistor Q3 is connected in parallel to two ends of an overcharge protection switch in the charge-discharge protection circuit, the resistor R1 is connected in series at any end S, D of the MOS transistor Q3, and the resistance value of the resistor R1 selects a resistor with the limiting current smaller than the passive balanced current.
8. A charge equalization method of a charge equalization circuit according to claim 1, characterized in that: the method comprises the following steps:
when the charging circuit is normally charged, the charging and discharging protection circuit is conducted, passive equalization is not started, and the current-limiting charging circuit does not work;
when the single battery cell in the series battery pack reaches the balanced voltage, the passive balance is started to discharge for the battery cell;
when the battery cell is continuously charged to a high level and is charged to an overcharge protection point, the charge-discharge protection circuit works, the overcharge protection switch is switched off, the current-limiting charging circuit works, and the charging current is limited to be lower than the passive equilibrium current; the batteries are charged with a small current until each battery reaches a full state.
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CN202010634358.5A CN111697666A (en) | 2020-07-02 | 2020-07-02 | Equalizing charging circuit and equalizing method |
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CN202010634358.5A CN111697666A (en) | 2020-07-02 | 2020-07-02 | Equalizing charging circuit and equalizing method |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114256932A (en) * | 2021-12-27 | 2022-03-29 | 上海商米科技集团股份有限公司 | Power distribution method and system of charging base |
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2020
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114256932A (en) * | 2021-12-27 | 2022-03-29 | 上海商米科技集团股份有限公司 | Power distribution method and system of charging base |
CN114256932B (en) * | 2021-12-27 | 2024-04-12 | 上海商米科技集团股份有限公司 | Power distribution method and system for charging base |
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