CN111682860A - Integrated device manufacturing method and related product - Google Patents
Integrated device manufacturing method and related product Download PDFInfo
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- CN111682860A CN111682860A CN202010427701.9A CN202010427701A CN111682860A CN 111682860 A CN111682860 A CN 111682860A CN 202010427701 A CN202010427701 A CN 202010427701A CN 111682860 A CN111682860 A CN 111682860A
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Images
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
- H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
- H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/05—Holders; Supports
- H03H9/0538—Constructional combinations of supports or holders with electromechanical or other electronic elements
- H03H9/0542—Constructional combinations of supports or holders with electromechanical or other electronic elements consisting of a lateral arrangement
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/15—Constructional features of resonators consisting of piezoelectric or electrostrictive material
- H03H9/17—Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator
- H03H9/171—Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator implemented with thin-film techniques, i.e. of the film bulk acoustic resonator [FBAR] type
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/46—Filters
- H03H9/54—Filters comprising resonators of piezo-electric or electrostrictive material
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
- H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
- H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
- H03H2003/023—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks the resonators or networks being of the membrane type
Abstract
The embodiment of the application discloses an integrated device manufacturing method and a related product, and the method comprises the following steps: providing a first epitaxial layer, a second epitaxial layer and an initial wafer for manufacturing an integrated device; performing a preset front surface of device ("Frontside") manufacturing process on the first epitaxial layer and the second epitaxial layer to form a front surface component of the filter and the power amplifier; performing wafer bonding for the filter, the power amplifier and the initial wafer, and completing a Backside ("Backside") process to obtain a complete integrated device; according to the embodiment of the application, the filter and the power amplifier are integrated on the same chip, so that the size of the device can be reduced, the manufacturing cost is reduced, and the performance of the device is improved.
Description
Technical Field
The present application relates to the field of chip manufacturing, and more particularly to a radio frequency filter and power amplifier chip, and more particularly to a method for manufacturing an integrated device and a related product.
Background
At the rf front end RFFE, the power amplifier and filter are the core components. In the fifth generation mobile communication technology, bulk acoustic wave filters (e.g., FBAR filters) are widely used, and power amplifiers are implemented using high performance GaN HEMT devices.
Disclosure of Invention
The embodiment of the application provides a manufacturing method of an integrated device and a related product, and the size of the device can be reduced and the performance of the device can be improved by integrating a filter and a power amplifier on the same chip.
In a first aspect, the embodiments of the present application provide an integrated device manufacturing method applied to a device manufacturing system for manufacturing an integrated device integrated with a filter and a power amplifier, wherein the filter includes a radio frequency filter based on a film bulk acoustic resonator FBAR, and the power amplifier includes a radio frequency power amplifier based on a gallium nitride high electron mobility transistor GaN HEMT; the method comprises the following steps:
providing a wafer, and arranging a first epitaxial layer and a second epitaxial layer on the wafer to obtain a first form integrated device, wherein the first epitaxial layer is a piezoelectric layer with piezoelectric characteristics, the first epitaxial layer, the second epitaxial layer and the wafer form a position relation from top to bottom, the second epitaxial layer is a gallium nitride (GaN) material layer, and the initial thickness of the first epitaxial layer meets the design requirement of the filter; the initial thickness of the second epitaxial layer meets the design requirements of the power amplifier;
executing a preset front manufacturing process for the first form integrated device to obtain a second form integrated device, wherein the second form integrated device comprises a filter first epitaxial layer and a filter second epitaxial layer of the filter, and a power amplifier first epitaxial layer and a power amplifier second epitaxial layer of the power amplifier, an isolation groove is arranged between a filter epitaxial structure formed by the filter first epitaxial layer and the filter second epitaxial layer and a power amplifier epitaxial structure formed by the power amplifier first epitaxial layer and the power amplifier second epitaxial layer, and the thickness of the power amplifier first epitaxial layer meets the design requirement of the power amplifier;
and executing a preset back manufacturing process aiming at the second-form integrated device to obtain the integrated device, wherein the back manufacturing process comprises manufacturing a lower cavity and a lower electrode of the filter, and manufacturing a back hole, a back hole metal layer and a back metal layer of the power amplifier.
In a second aspect, embodiments of the present application provide an integrated device obtained by using the manufacturing method according to the first aspect, the integrated device integrating a filter and a power amplifier, the filter including a radio frequency filter based on a film bulk acoustic resonator FBAR, and the power amplifier including a radio frequency power amplifier based on a gallium nitride high electron mobility transistor GaN HEMT; the filter and the power amplifier share the same wafer as a substrate, the filter epitaxial structure comprises a first filter epitaxial layer and a second filter epitaxial layer, the power amplifier epitaxial structure of the power amplifier comprises a first power amplifier epitaxial layer and a second power amplifier epitaxial layer, the filter epitaxial structure and the power amplifier epitaxial structure are isolated through an isolation groove, the second filter epitaxial layer and the second power amplifier epitaxial layer are GaN material layers, the first filter epitaxial layer, the second filter epitaxial layer and the wafer are stacked from top to bottom, the first power amplifier epitaxial layer, the second power amplifier epitaxial layer and the wafer are stacked from top to bottom, the thickness of the first filter epitaxial layer meets the design requirements of the filter, the thickness of the first epitaxial layer of the power amplifier meets the design requirement of the power amplifier, and the initial thickness of the second epitaxial layer meets the design requirement of the power amplifier.
In a third aspect, the embodiment of the present application provides an integrated device manufacturing apparatus, which is applied to a device manufacturing system, where the filter includes a radio frequency filter based on a film bulk acoustic resonator FBAR, and the power amplifier includes a radio frequency power amplifier based on a gallium nitride high electron mobility transistor GaN HEMT; the apparatus comprises a processing unit and a communication unit, wherein,
the processing unit is used for providing a wafer, arranging a first epitaxial layer and a second epitaxial layer on the wafer to obtain a first form integrated device, wherein the first epitaxial layer is a piezoelectric layer with piezoelectric characteristics, the first epitaxial layer, the second epitaxial layer and the wafer form a position relation from top to bottom, the second epitaxial layer is a gallium nitride GaN material layer, and the initial thickness of the first epitaxial layer meets the design requirement of the filter; the initial thickness of the second epitaxial layer meets the design requirements of the power amplifier; executing a preset front manufacturing process for the first form integrated device to obtain a second form integrated device, wherein the second form integrated device comprises a filter first epitaxial layer and a filter second epitaxial layer of the filter, and a power amplifier first epitaxial layer and a power amplifier second epitaxial layer of the power amplifier, an isolation groove is arranged between an epitaxial structure formed by the filter first epitaxial layer and the filter second epitaxial layer and an epitaxial structure formed by the power amplifier first epitaxial layer and the power amplifier second epitaxial layer, and the thickness of the power amplifier first epitaxial layer meets the design requirement of the power amplifier; and executing a preset back manufacturing process aiming at the second-form integrated device to obtain the integrated device, wherein the back manufacturing process comprises manufacturing a lower cavity and a lower electrode of the filter, and manufacturing a back hole, a back hole metal layer and a back metal layer of the power amplifier.
In a fourth aspect, an embodiment of the present application provides an integrated device manufacturing system, including: a processor, memory, and one or more programs; the one or more programs are stored in the above memory and configured to be executed by the processor, the programs including instructions for performing the steps described in any of the methods of the first aspect of the embodiments of the present application.
In a fifth aspect, this application provides a computer-readable storage medium, where the computer-readable storage medium stores a computer program for electronic data exchange, and the computer program specifically includes instructions for performing some or all of the steps described in any one of the methods of the first aspect of this application.
In a sixth aspect, the present application provides a computer program product, wherein the computer program product comprises a computer program operable to cause a computer to perform some or all of the steps as described in any one of the methods of the first aspect of the embodiments of the present application. The computer program product may be a software installation package.
It can be seen that, in the embodiment of the present application, the integrated device specifically includes a FBAR-based radio frequency filter and a GaN HEMT-based radio frequency power amplifier, the integrated device shares the wafer, the first epitaxial layer and the second epitaxial layer, and the thicknesses of the first epitaxial layer of the filter and the first epitaxial layer of the power amplifier respectively meet the design requirements of the corresponding device, so that the size and the cost of the device can be reduced, the manufacturing process can be simplified, and the manufacturing efficiency of the device can be improved while the performance of each device is ensured.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1A is a schematic structural diagram of a filter disclosed in an embodiment of the present application;
fig. 1B is a schematic structural diagram of a power amplifier disclosed in an embodiment of the present application;
FIG. 2A is a schematic diagram of a method for fabricating an integrated device according to an embodiment of the present disclosure;
fig. 2B is an exemplary diagram of a wafer and an epitaxial layer for fabricating an integrated device according to an embodiment of the disclosure;
FIG. 2C is a diagram illustrating another example of a process for fabricating an integrated device according to embodiments of the present disclosure;
FIG. 2D is a diagram illustrating another example of a process for fabricating an integrated device as disclosed in embodiments of the present application;
FIG. 2E is a diagram illustrating another example of a process for fabricating an integrated device as disclosed in embodiments of the present application;
FIG. 2F is a diagram illustrating another example of a process for fabricating an integrated device as disclosed in embodiments of the present application;
FIG. 2G is a diagram illustrating another example of a process for fabricating an integrated device according to an embodiment of the present disclosure;
fig. 3A is a schematic structural diagram of an integrated device disclosed in an embodiment of the present application;
FIG. 3B is a schematic structural diagram of another integrated device disclosed in the embodiments of the present application;
FIG. 3C is a schematic structural diagram of another integrated device disclosed in the embodiments of the present application;
FIG. 3D is a schematic diagram of another integrated device disclosed in embodiments of the present application;
FIG. 3E is a schematic structural diagram of another integrated device disclosed in the embodiments of the present application;
FIG. 4 is a schematic diagram of an integrated device manufacturing system according to an embodiment of the present disclosure;
fig. 5 is a block diagram of functional units of an integrated device manufacturing apparatus according to an embodiment of the present application.
Detailed Description
In order to make the technical solutions of the present application better understood, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "first," "second," and the like in the description and claims of the present application and in the above-described drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
At the Radio Frequency Front End (RFFE), the power amplifier and filter are core components. In 5G communication, bulk acoustic wave filters (FBARs or BAWs) will be widely applied, and power amplifiers will employ high-performance gallium nitride high electron mobility transistor (GaN HEMT) devices. Currently, FBAR (thin film bulk acoustic resonator) based rf filters and GaN HEMT (gallium nitride high electron mobility transistor) based rf power amplifiers are fabricated separately. Packaged and integrated onto a circuit board (PCB) for end-user delivery. Alternatively, the filter and the power amplifier, which are separately fabricated, are integrated into a Module (Module) at the time of packaging.
Fig. 1A shows an exemplary structure of an FBAR resonator using aluminum nitride (AlN) as a piezoelectric material, and the FBAR device manufacturing process generally includes disposing a piezoelectric thin film layer, fabricating an upper electrode and a lower electrode, and may also include other steps such as metal wiring arrangement, frequency adjustment structure arrangement, passivation layer arrangement, substrate thinning arrangement, back hole etching and metallization, and the like. The piezoelectric material comprises AlN. The upper and lower electrode materials may be molybdenum (Mo), gold (Au), titanium (Ti), aluminum (Al). The substrate material may be silicon (Si) or silicon carbide (SiC).
Fig. 1B is a GaN HEMT device with an AlN/GaN epitaxial structure, where S denotes a source, G denotes a Gate, and D denotes a drain, and the GaN HEMT device includes a Gate (Gate), a source, and a drain, where the Gate may be a general rectangular Gate, a T-Gate, or a Y-Gate, and a layer of aluminum oxide or silicon nitride insulating layer may be provided under the Gate. The device process may also include other steps such as silicon nitride passivation, thin film resistors, capacitors, inductors, metal interconnects, substrate thinning, back hole etching and metallization, etc. The epitaxial structure is AlN/GaN, or other combinations such as AlGaN/GaN, indium InAlN/GaN, InN/GaN, etc. The substrate material may be Si or SiC.
Currently, a FBAR-based radio frequency filter and a GaN HEMT-based radio frequency power amplifier are manufactured separately. Packaged and integrated on a circuit board PCB for end users. Alternatively, the filter and the power amplifier, which are separately fabricated, are integrated into one module at the time of packaging.
In view of the above technical situation, embodiments of the present application provide a method for manufacturing an integrated device, and the embodiments of the present application are described in detail below.
As shown in fig. 2A, the present embodiment provides an integrated device manufacturing method applied to a device manufacturing system for manufacturing an integrated device integrated with a filter including a radio frequency filter based on a thin film bulk acoustic resonator FBAR and a power amplifier including a radio frequency power amplifier based on a gallium nitride high electron mobility transistor GaN HEMT; the method comprises the following steps:
The specific implementation manner of disposing the first epitaxial layer and the second epitaxial layer on the wafer may be performed by an MOCVD (metal organic chemical vapor deposition) method or an MBE (molecular beam epitaxy) method.
The initial thickness of the second epitaxial layer meets the design requirement of the power amplifier, namely the thickness of the GaN is determined by the design of a GaN HEMT device and is generally 1-3 um.
Wherein the material of the wafer comprises silicon Si or silicon carbide SiC.
Wherein the piezoelectric layer is aluminum nitride (AlN).
The AlN layer of the filter is determined by the design requirement of the filter, and the AlN layer of the filter has the thickness of 0.1-2um for the filter with the frequency range of 1GHz-6 GHz.
The isolation grooves are rectangular, and the size of the isolation grooves is restricted by the condition that the functional requirements of the isolation filter and the power amplifier are met, and is generally 5-20 micrometers. The height is the total thickness of the epitaxial layer, i.e. the bottom of the etched recess is in contact with the upper surface of the wafer.
Taking the first epitaxial layer of the power amplifier as an example, the thickness of the AlN layer of the power amplifier is generally 2-20 nm.
The back surface manufacturing process may further include wafer thinning and polishing operations, which are consistent with the conventional manufacturing process and are not described herein.
It can be seen that, in the embodiment of the present application, the integrated device in the embodiment of the present application specifically includes a FBAR-based radio frequency filter and a GaN HEMT-based radio frequency power amplifier, the integrated device shares the wafer, the first epitaxial layer and the second epitaxial layer, and the thicknesses of the first epitaxial layer of the filter and the first epitaxial layer of the power amplifier respectively meet the design requirements of the corresponding devices, so that the size and the cost of the device can be reduced, the manufacturing process can be simplified, and the manufacturing efficiency of the device can be improved while the performance of the respective device is ensured.
In one possible example, as shown in fig. 2E, the second modality integrated device further includes a filter front side component disposed opposite the filter epitaxial structure, a power amplifier front side component disposed opposite the power amplifier epitaxial structure, a strap metal connection connecting the filter front side component and the power amplifier front side component, and the wafer; the executing a preset front manufacturing process for the first form integrated device to obtain a second form integrated device includes: etching the first epitaxial layer and the second epitaxial layer to form the isolation groove; executing a filter front manufacturing process aiming at the filter epitaxial structure to form the filter front assembly; executing a power amplifier front side manufacturing process aiming at the power amplifier epitaxial structure to form a power amplifier front side assembly; and a jumper metal connecting wire is arranged between the filter front assembly and the power amplifier front assembly.
The isolation groove can be manufactured through an etching process.
The filter front face manufacturing process is a manufacturing process for a filter front face component, and the power amplifier front face manufacturing process is a manufacturing process for a power amplifier front face component. The execution sequence of the filter front manufacturing process and the power amplifier front manufacturing process is not limited, the filter front manufacturing process can be executed first, then the power amplifier front manufacturing process is executed, or the power amplifier front manufacturing process can be executed first, then the filter front manufacturing process is executed, or the filter and power amplifier front manufacturing processes can be executed synchronously or in a time-difference mode.
The bridging metal wire is used for electrically connecting the filter and the power amplifier, so that one electrode (upper electrode or lower electrode) of the filter is required to be electrically connected with one electrode (source electrode or drain electrode) of the power amplifier, and the bridging metal wire is seen to comprise the following 4 connection modes:
in the first, the upper electrode of the filter is connected to the source of the power amplifier through a jumper metal wire.
In the second mode, the upper electrode of the filter is connected with the drain electrode of the power amplifier through a bridging metal connecting wire.
Thirdly, the lower electrode of the filter is connected with the source electrode of the power amplifier through a bridging metal connecting wire.
Fourthly, the lower electrode of the filter is connected with the drain electrode of the power amplifier through a bridging metal connecting wire.
The manufacturing processes corresponding to the four connection modes may be the same or different, and are not limited herein.
In this example, the front assembly of the filter and the front assembly of the power amplifier are manufactured on the same wafer and the same epitaxial layer respectively through the front manufacturing process of the filter and the front manufacturing process of the power amplifier, so that the cost can be saved, the information transmission loss can be reduced, the information transmission speed can be increased, and the performance of the integrated device can be improved.
In one possible example, as shown in fig. 2F, the performing a filter front surface fabrication process on the filter epitaxial structure to form a filter front surface component includes: an upper electrode is arranged above the first epitaxial layer of the filter; etching the first epitaxial layer of the filter to form a through hole; manufacturing a first metal connecting wire on the upper electrode to form a pin of the upper electrode, and arranging a second metal connecting wire through the through hole to form a pin of the lower electrode; and arranging a cap above the upper electrode by a wafer pole packaging (WLP) method or other methods to form an upper cavity, wherein the pins of the upper electrode and the pins of the lower electrode penetrate through the cap and extend outwards to a preset distance.
Wherein, the preset distance may be 10um-100um, which is not limited herein.
As can be seen, in this example, since the thickness of the first epitaxial layer of the filter meets the design requirement of the filter, the thickness of the first epitaxial layer of the filter does not need to be adjusted, and therefore, the manufacturing process of the integrated device does not include an adjustment operation for the first epitaxial layer of the filter.
In one possible example, before the disposing a cap over the upper electrode by a wafer pole package WLP method or other method to form an upper cavity, the method further comprises: a first structure for adjusting the mass load of the resonator frequency is arranged on the filter upper electrode; and/or, a second structure for suppressing stray waves is arranged on the first epitaxial layer or the upper electrode of the filter; and/or a thin film layer for filter temperature compensation is arranged on the first epitaxial layer or the upper electrode of the filter, and/or a filter passivation layer is arranged on the upper electrode to protect the filter, wherein the filter passivation layer comprises silicon oxide, silicon nitride or other insulating materials.
In one possible example, as shown in fig. 2G, the performing a power amplifier front side fabrication process on the power amplifier epitaxial structure to form a power amplifier front side assembly includes: thinning the first epitaxial layer of the power amplifier to meet the design requirement of the power amplifier; manufacturing a source electrode and a drain electrode on the first epitaxial layer of the power amplifier, and manufacturing a power amplifier passivation layer on the source electrode and the drain electrode of the power amplifier and the upper end surface of the first epitaxial layer; and manufacturing a grid electrode on the first epitaxial layer of the power amplifier.
Wherein, the thinning treatment can adopt an etching process.
The source and the drain can be directly made on the surface of the first epitaxial layer of the power amplifier, or can be made firstAnd etching the groove. The source and drain electrodes are typically a combination of several metals alloyed by high temperature annealing to reduce resistance. These metals include at least one of the following: titanium (Ti), aluminum (Al), nickel (Ni), gold (Au), are deposited layer by layer onto the first epitaxial layer of the power amplifier, typically by metal evaporation (Metalevaporation). After an annealing process is used, a passivation layer, typically silicon nitride (e.g., Si), is then formed on the source and drain electrodes and the first epitaxial layer of the power amplifier3N4)。
And etching the passivation layer or the passivation layer and part or all of the first epitaxial layer of the power amplifier at a preset position to form a groove, and arranging metal in the groove to form the grid.
In addition, an insulating layer, such as aluminum oxide (Al), may be added between the gate and the first epitaxial layer of the power amplifier2O3) Or silicon nitride (Si)3N4). The shape of the gate may be rectangular, T-shaped or Y-shaped. The gate is generally made of metal such as nickel (Ni), gold (Au), platinum (Pt), titanium (Ti), etc., and is generally deposited layer by layer at the position of the groove by metal evaporation.
In this example, the problem that the thickness of the first epitaxial layer of the power amplifier may not meet the requirement due to the shared epitaxial structure can be solved through a dedicated thinning process in the manufacturing process of the integrated device, so that the device performance of the power amplifier can meet the design requirement.
In addition, other components, such as thin film resistors, capacitors, and inductors, may be included in the front side components of the power amplifier, which are connected by metal lines to form a monolithic integrated circuit (MMIC).
In one possible example, the performing a preset back manufacturing process on the second-type integrated device to obtain the integrated device includes: bonding the second form integrated device to a wafer, and thinning and polishing the wafer aiming at the second form integrated device to obtain a third form integrated device; performing a filter back side fabrication process for the third modality integrated device to form a filter back side assembly; and performing a power amplifier back manufacturing process on the third-form integrated device to form a power amplifier back assembly.
Wherein the slide may be a sapphire slide, etc., and is not limited herein.
The filter back assembly comprises a lower electrode, and the power amplifier back assembly comprises a back hole metal layer and a back metal layer. The filter back manufacturing process is a manufacturing process for a filter back component, and the power amplifier back manufacturing process is a manufacturing process for a power amplifier back component. The execution sequence of the filter back manufacturing process and the power amplifier back manufacturing process is not limited, the filter back manufacturing process may be executed first, the power amplifier back manufacturing process may be executed second, the filter back manufacturing process may be executed first, the filter back manufacturing process may be executed second, and the filter and power amplifier back manufacturing processes may be executed synchronously or in a time-difference synchronous manner.
Therefore, in this example, the manufacturing of the filter back component and the manufacturing of the power amplifier back component are respectively performed on the same wafer through the filter and power amplifier back manufacturing process, and the manufacturing of the filter and power amplifier back components can be completed only on one wafer, which is beneficial to optimizing device process steps, reducing device material loss, improving device manufacturing efficiency and saving cost.
In one possible example, the performing a filter backside fabrication process for the third form integrated device to form a filter backside component comprises: etching the wafer and the second epitaxial layer of the filter to form a lower cavity of the filter, wherein the top end face of the lower cavity is the lower end face of the first epitaxial layer of the filter; and manufacturing a lower electrode on the top end surface of the lower cavity, wherein the lower electrode is connected with a second metal connecting wire arranged through a through hole of the first epitaxial layer of the filter.
The manufacturing process of the lower electrode may adopt a metal deposition method, and the like, and is not limited herein.
In one possible example, the performing a power amplifier backside fabrication process for the third-state integrated device to form a power amplifier backside assembly includes: etching the wafer, the second epitaxial layer of the power amplifier and the first epitaxial layer of the power amplifier to form a back hole of the power amplifier, wherein the top end face of the back hole is the lower end face of the source electrode; and arranging metal in a preset area of the lower end surface of the wafer to form a back metal layer of the power amplifier, wherein the preset area is an area of the bottom end surface of the wafer corresponding to the power amplifier.
Referring to fig. 3A, fig. 3A is a schematic structural diagram of an integrated device 3000 according to an embodiment of the present application, the integrated device 3000 is manufactured based on the manufacturing process of the above method embodiment, the integrated device integrates a filter 3100 and a power amplifier 3200, the filter 3100 includes a radio frequency filter based on a FBAR, and the power amplifier 3200 includes a radio frequency power amplifier based on a GaN HEMT;
the filter 3100 and the power amplifier 3200 share the same wafer 3010 as a substrate, the filter epitaxial structure 3110 of the filter 3100 includes a filter first epitaxial layer 3111 and a filter second epitaxial layer 3112, the power amplifier epitaxial structure 3210 of the power amplifier 3200 includes a power amplifier first epitaxial layer 3211 and a power amplifier second epitaxial layer 3212, the filter epitaxial layer 3110 and the power amplifier epitaxial structure 3210 are isolated by an isolation groove, the filter second epitaxial layer 3112 and the power amplifier second epitaxial layer 3212 are GaN material layers, the filter first epitaxial layer 3111, the filter second epitaxial layer 3112 and the wafer are stacked from top to bottom, the power amplifier first epitaxial layer 3211, the power amplifier second epitaxial layer 3212 and the wafer are stacked from top to bottom, and the thickness of the filter first epitaxial layer 3111 satisfies the design requirement of the filter, the thickness of the first epitaxial layer 3211 of the power amplifier meets the design requirements of the power amplifier.
It can be seen that, in the embodiment of the present application, the integrated device specifically includes a FBAR-based radio frequency filter and a GaN HEMT-based radio frequency power amplifier, the integrated device shares the wafer, the first epitaxial layer and the second epitaxial layer, and the thicknesses of the first epitaxial layer of the filter and the first epitaxial layer of the power amplifier respectively meet the design requirements of the corresponding device, so that the size of the device can be reduced, the transmission speed and performance of the device can be improved, the cost can be reduced, the manufacturing process can be simplified, and the manufacturing efficiency of the device can be improved.
In one possible example, as shown in fig. 3B, the second modality integrated device 3000 further includes a filter front assembly 3120 disposed with respect to the filter epitaxial structure 3110, a power amplifier front assembly 3220 disposed with respect to the power amplifier epitaxial structure 3210, a jumper metal wire 3020 connecting the filter front assembly 3120 and the power amplifier front assembly 3220, and the wafer 3010.
In one possible example, as shown in fig. 3C, the filter front surface assembly 3120 includes an upper electrode 3121, a first metal wire 3122, a second metal wire 3123, and a cap 3124, wherein the upper electrode 3121 is disposed on an upper end surface of the filter first epitaxial layer 3111, the first metal wire 3122 is disposed on the upper electrode 3121 to form a pin of the upper electrode 3121, and the second metal wire 3123 passes through the through hole of the filter first epitaxial layer 3111 and the through hole of the cap 3124 to form a pin of a lower electrode; the cap 3124 is disposed over the upper electrode 3121 to form an upper cavity of the filter 3100.
In one possible example, the filter front surface assembly 3120 further includes a first structure disposed above the filter upper electrode 3121 for adjusting a mass load of a resonator frequency; and/or the presence of a gas in the gas,
a second structure for suppressing stray waves disposed over the filter first epitaxial layer 3111 or the upper electrode 3121; and/or the presence of a gas in the gas,
a thin film layer for filter temperature compensation disposed on the filter first epitaxial layer 3111 or the upper electrode 3121, and/or,
a filter passivation layer disposed over the filter upper electrode 3121 to protect the filter, the passivation layer including silicon oxide, silicon nitride, or other insulating material.
In one possible example, as shown in fig. 3D, the power amplifier front side assembly 3220 includes a source electrode 3221, a drain electrode 3222, a gate electrode 3223, and a passivation layer 3224, wherein,
the passivation layer 3224 is disposed on the source electrode 3221 and the drain electrode 3222 of the power amplifier and the upper end surface of the first epitaxial layer 3211, and the gate electrode 3223 is disposed on the upper end surface of the first epitaxial layer 3211 of the power amplifier through the passivation layer 3224.
In one possible example, as shown in fig. 3E, the lower cavity of the filter 3100 is provided with a lower electrode 3101, the back hole of the power amplifier 3200 is provided with a back hole metal layer 3201, and the lower end surface of the power amplifier 3200 is provided with a back surface metal layer 3202.
Referring to fig. 4, consistent with the embodiment shown in fig. 2A, fig. 4 is a schematic structural diagram of an integrated device manufacturing system 400 provided in an embodiment of the present application, and as shown, the integrated device manufacturing system includes a processor 401, a memory 402, a communication interface 403, and one or more programs 404, where the one or more programs 404 are stored in the memory 402 and configured to be executed by the processor 401, and the program 404 includes instructions for executing any step in the integrated device manufacturing method.
The above description has introduced the solution of the embodiment of the present application mainly from the perspective of the method-side implementation process. It will be appreciated that the integrated device manufacturing system, in order to implement the above-described functionality, may include corresponding hardware structures and/or software modules that perform the respective functions. Those of skill in the art will readily appreciate that the present application is capable of hardware or a combination of hardware and computer software implementing the various illustrative elements and algorithm steps described in connection with the embodiments provided herein. Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiment of the present application, the integrated device manufacturing system may be divided into the functional units according to the method example, for example, each functional unit may be divided corresponding to each function, or two or more functions may be integrated into one processing unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit. It should be noted that the division of the unit in the embodiment of the present application is schematic, and is only a logic function division, and there may be another division manner in actual implementation.
Fig. 5 is a block diagram of functional units constituting the integrated device manufacturing apparatus 500 according to the embodiment of the present application. The integrated device manufacturing apparatus 500 is applied to a device manufacturing system, the filter includes a radio frequency filter based on a film bulk acoustic resonator FBAR, and the power amplifier includes a radio frequency power amplifier based on a gallium nitride high electron mobility transistor GaN HEMT; the integrated device manufacturing apparatus 500 comprises a processing unit 501 and a communication unit 502, wherein the processing unit 501 is configured to perform any one of the steps of the method embodiments described above.
The integrated device manufacturing apparatus 500 may further include a storage unit 503 for storing program codes and data of the mobile terminal, among others. The processing unit 501 may be a processor, the communication unit 502 may be a touch display screen or a transceiver, and the storage unit 503 may be a memory.
Embodiments of the present application also provide a computer storage medium storing a computer program for electronic data exchange, the computer program causing a computer to execute a part or all of the steps of any one of the integrated device manufacturing methods described in the above-described integrated device manufacturing method embodiments, the computer including an electronic device.
Embodiments of the present application also provide a computer program product including a computer program operable to cause a computer to perform part or all of the steps of any one of the integrated device manufacturing methods described in the above integrated device manufacturing method embodiments, where the computer includes an electronic device.
It should be noted that, for the sake of simplicity, the above-mentioned embodiments of the integrated device manufacturing method are all described as a series of action combinations, but those skilled in the art should understand that the present application is not limited by the described action sequence, because some steps may be performed in other sequences or simultaneously according to the present application. Further, those skilled in the art should also appreciate that the embodiments described in the specification are preferred embodiments and that the acts and modules referred to are not necessarily required in this application.
Those skilled in the art will appreciate that all or part of the steps in the various methods of the above-described integrated device manufacturing method embodiments may be performed by associated hardware as instructed by a program, which may be stored in a computer-readable memory, which may include: flash Memory disks, Read-Only memories (ROMs), Random Access Memories (RAMs), magnetic or optical disks, and the like.
The above embodiments are described in detail, and the principles and embodiments of the integrated device manufacturing method of the present application are described herein by using specific examples, and the description of the above embodiments is only used to help understand the method and its core ideas of the present application; meanwhile, for a person skilled in the art, according to the idea of the integrated device manufacturing method of the present application, there may be variations in the specific implementation and application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
It is understood that all products controlled or configured to perform the processing methods of the flowcharts described in the embodiments of the integrated device manufacturing method of the present application, such as the processing devices, the electronic devices, and the computer readable storage media of the flowcharts described above, belong to the category of the related products described in the present application.
It will be apparent to those skilled in the art that various changes and modifications may be made in the integrated device provided herein without departing from the spirit and scope of the present application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.
Claims (28)
1. An integrated device manufacturing method is applied to a device manufacturing system for manufacturing an integrated device integrated with a filter and a power amplifier, wherein the filter comprises a radio frequency filter based on a Film Bulk Acoustic Resonator (FBAR), and the power amplifier comprises a radio frequency power amplifier based on a gallium nitride high electron mobility transistor (GaN HEMT); the method comprises the following steps:
providing a wafer, and arranging a first epitaxial layer and a second epitaxial layer on the wafer to obtain a first form integrated device, wherein the first epitaxial layer is a piezoelectric layer with piezoelectric characteristics, the first epitaxial layer, the second epitaxial layer and the wafer form a position relation from top to bottom, the second epitaxial layer is a gallium nitride (GaN) material layer, and the initial thickness of the first epitaxial layer meets the design requirement of the filter; the initial thickness of the second epitaxial layer meets the design requirements of the power amplifier;
executing a preset front manufacturing process for the first form integrated device to obtain a second form integrated device, wherein the second form integrated device comprises a filter first epitaxial layer and a filter second epitaxial layer of the filter, and a power amplifier first epitaxial layer and a power amplifier second epitaxial layer of the power amplifier, an isolation groove is arranged between a filter epitaxial structure formed by the filter first epitaxial layer and the filter second epitaxial layer and a power amplifier epitaxial structure formed by the power amplifier first epitaxial layer and the power amplifier second epitaxial layer, and the thickness of the power amplifier first epitaxial layer meets the design requirement of the power amplifier;
and executing a preset back manufacturing process aiming at the second-form integrated device to obtain the integrated device, wherein the back manufacturing process comprises manufacturing a lower cavity and a lower electrode of the filter, and manufacturing a back hole, a back hole metal layer and a back metal layer of the power amplifier.
2. The method of claim 1, wherein the second modality integrated device further comprises a filter front side assembly disposed opposite the filter epitaxial structure, a power amplifier front side assembly disposed opposite the power amplifier epitaxial structure, a jumper metal trace connecting the filter front side assembly and the power amplifier front side assembly, and the wafer; the executing a preset front manufacturing process for the first form integrated device to obtain a second form integrated device includes:
etching the first epitaxial layer and the second epitaxial layer to form the isolation groove;
executing a filter front manufacturing process aiming at the filter epitaxial structure to form the filter front assembly;
executing a power amplifier front side manufacturing process aiming at the power amplifier epitaxial structure to form a power amplifier front side assembly;
and a jumper metal connecting wire is arranged between the filter front assembly and the power amplifier front assembly.
3. The method of claim 2, wherein performing a filter front side fabrication process on the filter epitaxial structure to form a filter front side assembly comprises:
an upper electrode is arranged above the first epitaxial layer of the filter;
etching the first epitaxial layer of the filter to form a through hole;
manufacturing a first metal connecting wire on the upper electrode to form a pin of the upper electrode, and arranging a second metal connecting wire through the through hole to form a pin of the lower electrode;
and arranging a cap above the upper electrode by a wafer pole packaging (WLP) method to form an upper cavity, wherein the pins of the upper electrode and the pins of the lower electrode penetrate through the cap and extend outwards to a preset distance.
4. The method of claim 3, wherein prior to disposing a cap over the upper electrode to form an upper cavity by a wafer pole packaging (WLP) method, the method further comprises:
a first structure for adjusting a mass load of a resonator frequency is provided above the filter upper electrode; and/or the presence of a gas in the gas,
a second structure for suppressing stray waves is arranged above the first epitaxial layer or the upper electrode of the filter; and/or the presence of a gas in the gas,
a thin film layer for filter temperature compensation is arranged above the first epitaxial layer or the upper electrode of the filter; and/or the presence of a gas in the gas,
disposing a filter passivation layer on the upper electrode to protect the filter, the filter passivation layer including an insulating material.
5. The method of any of claims 2-4, wherein performing a power amplifier front side fabrication process on the power amplifier epitaxial structure to form a power amplifier front side assembly comprises:
thinning the first epitaxial layer of the power amplifier to meet the design requirement of the power amplifier;
manufacturing a source electrode and a drain electrode above the first epitaxial layer of the power amplifier, and manufacturing a power amplifier passivation layer on the upper end surface of the first epitaxial layer of the power amplifier;
and manufacturing a grid electrode above the first epitaxial layer of the power amplifier.
6. The method according to claim 5, wherein the performing a preset back manufacturing process on the second-type integrated device to obtain the integrated device comprises:
bonding the second form integrated device to a wafer, and thinning and polishing the wafer aiming at the second form integrated device to obtain a third form integrated device;
performing a filter back side fabrication process for the third modality integrated device to form a filter back side assembly;
and performing a power amplifier back manufacturing process on the third-form integrated device to form a power amplifier back assembly.
7. The method of claim 6, wherein performing a filter backside fabrication process for the third modality integrated device, forming a filter backside assembly, comprises:
etching the wafer and the second epitaxial layer of the filter to form a lower cavity of the filter, wherein the top end face of the lower cavity is the lower end face of the first epitaxial layer of the filter;
and manufacturing a lower electrode on the top end surface of the lower cavity, wherein the lower electrode is connected with a second metal connecting wire arranged through a through hole of the first epitaxial layer of the filter.
8. The method of claim 6, wherein performing a power amplifier backside fabrication process for the third modality integrated device, forming a power amplifier backside assembly, comprises:
etching the wafer, the second epitaxial layer of the power amplifier and the first epitaxial layer of the power amplifier to form a back hole of the power amplifier, wherein the top end face of the back hole is the lower end face of the source electrode;
and arranging metal in a preset area of the lower end surface of the wafer to form a back metal layer of the power amplifier, wherein the preset area is an area of the bottom end surface of the wafer corresponding to the power amplifier.
9. The method of any one of claims 1-8, wherein the first epitaxial layer is an AlN layer, the GaN layer has a thickness of 1-3um, and the AlN layer of the filter has a thickness of 0.1-2 um;
the AlN layer of the power amplifier, namely the first epitaxial layer of the power amplifier, has the thickness of 2-20 nm.
10. The method of any of claims 1-8, wherein the first epitaxial layer is comprised of a nitride of any of: AlGaN, InGaN, AlInN, InN, AlInGaN, the thickness of the GaN layer is 0.5-3um, and the thickness of the nitride of the piezoelectric layer for the filter is 0.01-2 um;
the thickness of the first epitaxial layer for the power amplifier is 1-25 nm.
11. An integrated device, wherein the integrated device integrates a filter comprising a thin film bulk acoustic resonator, FBAR, based radio frequency filter and a power amplifier comprising a gallium nitride high electron mobility transistor, GaN, HEMT based radio frequency power amplifier;
the filter and the power amplifier share the same wafer as a substrate, the filter epitaxial structure of the filter comprises a first filter epitaxial layer and a second filter epitaxial layer, the power amplifier epitaxial structure of the power amplifier comprises a first power amplifier epitaxial layer and a second power amplifier epitaxial layer, the filter epitaxial structure and the power amplifier epitaxial structure are isolated through an isolation groove, the second filter epitaxial layer and the second power amplifier epitaxial layer are GaN material layers, the first filter epitaxial layer, the second filter epitaxial layer and the wafer are stacked from top to bottom, the first power amplifier epitaxial layer, the second power amplifier epitaxial layer and the wafer are stacked from top to bottom, the thickness of the first filter epitaxial layer meets the design requirements of the filter, the thickness of the first epitaxial layer of the power amplifier meets the design requirement of the power amplifier, and the initial thickness of the second epitaxial layer meets the design requirement of the power amplifier.
12. The integrated device of claim 11, further comprising a filter front side assembly disposed relative to the filter epitaxial structure, a power amplifier front side assembly disposed relative to the power amplifier epitaxial structure, a jumper metal trace connecting the filter front side assembly and the power amplifier front side assembly, and the wafer.
13. The integrated device of claim 12, wherein the filter front side assembly comprises an upper electrode, a first metal line, a second metal line, a cap, wherein,
the upper electrode is arranged on the upper end face of the first epitaxial layer of the filter, the first metal connecting wire is arranged on the upper electrode to form a pin of the upper electrode, and the second metal connecting wire penetrates through the through hole of the first epitaxial layer of the filter and the through hole of the cap to form a pin of the lower electrode;
the cap is disposed over the upper electrode to form an upper cavity of the filter.
14. The integrated device of claim 13, wherein the filter front assembly further comprises a first structure disposed on the filter upper electrode for adjusting a mass loading of a resonator frequency; and/or the presence of a gas in the gas,
the second structure is arranged on the first epitaxial layer or the upper electrode of the filter and is used for inhibiting stray waves; and/or the presence of a gas in the gas,
the thin film layer is arranged on the first epitaxial layer or the upper electrode of the filter and used for temperature compensation of the filter; and/or the presence of a gas in the gas,
a filter passivation layer disposed over the upper electrode to protect the filter, the passivation layer comprising silicon oxide, silicon nitride, or other insulating material.
15. The integrated device of any of claims 10-13, wherein the power amplifier front side component comprises a source, a drain, a gate, and a passivation layer, wherein,
the passivation layer is arranged on the source electrode, the drain electrode and the upper end face of the first epitaxial layer of the power amplifier, and the grid electrode penetrates through the passivation layer and is arranged on the upper end face of the first epitaxial layer of the power amplifier.
16. The integrated device according to claim 15, wherein the lower cavity of the filter is provided with a lower electrode, the back hole of the power amplifier is provided with a back hole metal layer, and the lower end surface of the power amplifier is provided with a back metal layer.
17. The integrated device of any of claims 10-16, wherein the first epitaxial layer is an AlN layer, the GaN layer has a thickness of 1-3um, and the AlN layer of the filter has a thickness of 0.1-2 um;
the AlN layer of the power amplifier, namely the first epitaxial layer of the power amplifier, has the thickness of 2-20 nm.
18. An integrated device manufacturing device is characterized by being applied to a device manufacturing system, wherein the filter comprises a radio frequency filter based on a Film Bulk Acoustic Resonator (FBAR), and the power amplifier comprises a radio frequency power amplifier based on a gallium nitride high electron mobility transistor (GaN HEMT); the apparatus comprises a processing unit and a communication unit, wherein,
the processing unit is used for providing a wafer, arranging a first epitaxial layer and a second epitaxial layer on the wafer to obtain a first form integrated device, wherein the first epitaxial layer is a piezoelectric layer with piezoelectric characteristics, the first epitaxial layer, the second epitaxial layer and the wafer form a position relation from top to bottom, the second epitaxial layer is a gallium nitride GaN material layer, and the initial thickness of the first epitaxial layer meets the design requirement of the filter; the initial thickness of the second epitaxial layer meets the design requirements of the power amplifier; executing a preset front manufacturing process for the first form integrated device to obtain a second form integrated device, wherein the second form integrated device comprises a filter first epitaxial layer and a filter second epitaxial layer of the filter, and a power amplifier first epitaxial layer and a power amplifier second epitaxial layer of the power amplifier, an isolation groove is arranged between an epitaxial structure formed by the filter first epitaxial layer and the filter second epitaxial layer and an epitaxial structure formed by the power amplifier first epitaxial layer and the power amplifier second epitaxial layer, and the thickness of the power amplifier first epitaxial layer meets the design requirement of the power amplifier; and executing a preset back manufacturing process aiming at the second-form integrated device to obtain the integrated device, wherein the back manufacturing process comprises manufacturing a lower cavity and a lower electrode of the filter, and manufacturing a back hole, a back hole metal layer and a back metal layer of the power amplifier.
19. The apparatus of claim 18, wherein the second modality integrated device further comprises a filter front side assembly disposed opposite the filter epitaxial structure, a power amplifier front side assembly disposed opposite the power amplifier epitaxial structure, a jumper metal trace connecting the filter front side assembly and the power amplifier front side assembly, and the wafer; in the aspect that the preset front surface manufacturing process is performed on the first form integrated device to obtain a second form integrated device, the processing unit is specifically configured to: etching the first epitaxial layer and the second epitaxial layer to form the isolation groove; and performing a filter front face fabrication process for the filter epitaxial structure to form the filter front face assembly; and performing a power amplifier front side fabrication process for the power amplifier epitaxial structure, forming the power amplifier front side assembly; and a jumper metal connecting wire is arranged between the filter front assembly and the power amplifier front assembly.
20. The apparatus according to claim 19, wherein in said performing a filter front side fabrication process for the filter epitaxial structure, forming a filter front side component, the processing unit is specifically configured to: an upper electrode is arranged above the first epitaxial layer of the filter; etching the first epitaxial layer of the filter to form a through hole; manufacturing a first metal connecting wire on the upper electrode to form a pin of the upper electrode, and arranging a second metal connecting wire through the through hole to form a pin of the lower electrode; and arranging a cap above the upper electrode by a wafer pole packaging (WLP) method to form an upper cavity, wherein the pins of the upper electrode and the pins of the lower electrode penetrate through the cap and extend outwards to a preset distance.
21. The apparatus of claim 20, wherein the processing unit, prior to disposing a cap over the upper electrode to form an upper cavity by a wafer pole package (WLP) method, is further configured to: a first structure for adjusting a mass load of a resonator frequency is provided above the filter upper electrode; and/or the presence of a gas in the gas,
a second structure for suppressing stray waves is arranged above the first epitaxial layer or the upper electrode of the filter; and/or the presence of a gas in the gas,
a thin film layer for filter temperature compensation is arranged above the first epitaxial layer or the upper electrode of the filter; and/or the presence of a gas in the gas,
disposing a filter passivation layer on the upper electrode to protect the filter, the filter passivation layer including an insulating material.
22. The apparatus according to any of claims 19-21, wherein in said performing a power amplifier front side fabrication process on said power amplifier epitaxial structure, forming a power amplifier front side component, said processing unit is specifically configured to: thinning the first epitaxial layer of the power amplifier to meet the design requirement of the power amplifier; manufacturing a source electrode and a drain electrode above the first epitaxial layer of the power amplifier, and manufacturing a power amplifier passivation layer on the upper end surface of the first epitaxial layer of the power amplifier; and manufacturing a grid electrode above the first epitaxial layer of the power amplifier.
23. The apparatus according to claim 22, wherein, in the performing of the preset backside fabrication process for the second type of integrated device to obtain the integrated device, the processing unit is specifically configured to: bonding the second form integrated device to a wafer, and thinning and polishing the wafer aiming at the second form integrated device to obtain a third form integrated device; and performing a filter back side fabrication process for the third modality integrated device, forming a filter back side assembly; and performing a power amplifier back side fabrication process for the third modality integrated device, forming a power amplifier back side assembly.
24. The apparatus of claim 23, wherein in said performing a filter backside fabrication process for the third modality integrated device to form a filter backside component, the processing unit is specifically configured to: etching the wafer and the second epitaxial layer of the filter to form a lower cavity of the filter, wherein the top end face of the lower cavity is the lower end face of the first epitaxial layer of the filter; and manufacturing a lower electrode on the top end face of the lower cavity, wherein the lower electrode is connected with a second metal connecting wire arranged through a through hole of the first epitaxial layer of the filter.
25. The apparatus of claim 23, wherein in said performing a power amplifier backside fabrication process for the third modality integrated device to form a power amplifier backside component, the processing unit is specifically configured to: etching the wafer, the second epitaxial layer of the power amplifier and the first epitaxial layer of the power amplifier to form a back hole of the power amplifier, wherein the top end face of the back hole is the lower end face of the source electrode; and arranging metal on the inner side edge of the back hole to form a back hole metal layer of the power amplifier, and arranging metal on a preset area of the lower end face of the wafer to form a back metal layer of the power amplifier, wherein the preset area is an area of the bottom end face of the wafer corresponding to the power amplifier.
26. The device of any of claims 18-25, wherein the first epitaxial layer is an AlN layer, the GaN layer has a thickness of 1-3um, and the AlN layer of the filter has a thickness of 0.1-2 um;
the AlN layer of the power amplifier, namely the first epitaxial layer of the power amplifier, has the thickness of 2-20 nm.
27. An integrated device manufacturing system, comprising: a processor, memory, and one or more programs; the one or more programs stored in the above memory and configured to be executed by the processor, the programs comprising instructions for performing the steps in the method of any of claims 1-10.
28. A computer-readable storage medium, characterized in that it stores a computer program for electronic data exchange, comprising in particular instructions for carrying out some or all of the steps described in the method according to any one of claims 1 to 10.
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| CN113161348B (en) * | 2020-01-22 | 2023-03-21 | 深圳市汇芯通信技术有限公司 | Integrated chip, manufacturing method thereof and integrated circuit |
| CN113161349B (en) * | 2020-01-22 | 2023-01-31 | 深圳市汇芯通信技术有限公司 | Integrated chip, manufacturing method thereof and integrated circuit |
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| CN111540712B (en) * | 2020-04-26 | 2024-04-16 | 深圳市汇芯通信技术有限公司 | Integrated device manufacturing method and related product |
| CN111446270A (en) * | 2020-05-08 | 2020-07-24 | 中山大学 | Integrated device based on gallium oxide |
| CN111968972B (en) * | 2020-07-13 | 2024-03-26 | 深圳市汇芯通信技术有限公司 | Integrated chip, manufacturing method thereof and integrated circuit |
| CN112542482A (en) * | 2020-12-02 | 2021-03-23 | 海宁波恩斯坦生物科技有限公司 | Monolithic heterogeneous integrated structure of passive cavity type single crystal FBAR and active GaN HEMT |
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Also Published As
| Publication number | Publication date |
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| CN110380702A (en) | 2019-10-25 |
| CN110380702B (en) | 2020-04-10 |
| CN111682860B (en) | 2023-10-10 |
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