CN111668181A - Bonding wire and semiconductor bonding process based on same - Google Patents

Bonding wire and semiconductor bonding process based on same Download PDF

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Publication number
CN111668181A
CN111668181A CN202010635327.1A CN202010635327A CN111668181A CN 111668181 A CN111668181 A CN 111668181A CN 202010635327 A CN202010635327 A CN 202010635327A CN 111668181 A CN111668181 A CN 111668181A
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China
Prior art keywords
wire
section
bonding
bonding wire
silk section
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Pending
Application number
CN202010635327.1A
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Chinese (zh)
Inventor
谢海涛
郑玺
陈雪平
薛子夜
赵义东
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ZHEJIANG GPILOT TECHNOLOGY CO LTD
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ZHEJIANG GPILOT TECHNOLOGY CO LTD
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Priority to CN202010635327.1A priority Critical patent/CN111668181A/en
Publication of CN111668181A publication Critical patent/CN111668181A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/49—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions wire-like arrangements or pins or rods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4885—Wire-like parts or pins
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4885—Wire-like parts or pins
    • H01L21/4896—Mechanical treatment, e.g. cutting, bending
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48095—Kinked
    • H01L2224/48097—Kinked the kinked part being in proximity to the bonding area outside the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7825—Means for applying energy, e.g. heating means
    • H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301—Capillary

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)

Abstract

The invention relates to the technical field of semiconductor packaging, in particular to a bonding wire and a semiconductor bonding process based on the bonding wire. A bonding wire, comprising: the body, include with wafer fixed connection's first silk section, with base plate fixed connection's second silk section and be connected first silk section with the third silk section of second silk section, second silk section is pressed close to the base plate sets up, just third silk section with contained angle between the second silk section is obtuse angle or right angle. According to the bonding wire provided by the invention, when the external temperature changes greatly and the expansion or contraction of the colloid applies a pulling force to the bonding wire, the bending between the third wire section and the second wire section plays a role in buffering extension, the stress of the connection point of the second wire section and the substrate is reduced, and the fracture is avoided.

Description

Bonding wire and semiconductor bonding process based on same
Technical Field
The invention relates to the technical field of semiconductor packaging, in particular to a bonding wire and a semiconductor bonding process based on the bonding wire.
Background
Bonding wire bonding refers to a process technique in which fine metal wires are used to connect electrode pads of a semiconductor chip with wiring pads on leads of a package or a substrate. In the prior art, a first welding point of a bonding wire on a chip is usually led out for a certain length, then the first welding point is directly led to a second welding point on a shell or a substrate for fixing after being bent, and finally glue is used for packaging the whole periphery. However, when the external temperature changes greatly, a pulling force of expansion or contraction is applied to the bonding wire due to thermal expansion and contraction of the colloid, and the bonding wire is easily broken at the bonding point of the bonding wire after receiving the pulling force, thereby affecting the use of the semiconductor product.
Disclosure of Invention
Therefore, the technical problem to be solved by the invention is the defect that the welding point of the existing bonding wire connected with the shell or the substrate is easy to break after being stressed.
In order to solve the above technical problem, the present invention provides a bonding wire, including:
the body, include with wafer fixed connection's first silk section, with base plate fixed connection's second silk section and be connected first silk section with the third silk section of second silk section, second silk section is pressed close to the base plate sets up, just third silk section with contained angle between the second silk section is obtuse angle or right angle.
The included angle between the third wire section and the second wire section is 90-140 degrees.
The length of the projection of the second silk section on the horizontal plane is 1/6-1/3 of the length of the projection of the body on the horizontal plane.
The first wire section and the wafer as well as the second wire section and the substrate are fixed to each other through welding.
The invention provides a semiconductor bonding process based on a bonding wire, which comprises the following steps:
arching the body subjected to the first welding spot welding according to the set shape angle parameters to form a preset included angle between the third wire section and the second wire section, and then welding the second welding spot;
wherein, when the second wire section is arched, the shape angle parameter is set to-100 DEG to-30 deg.
When looping the second wire segment, the shape angle parameter is set to-70 °.
The twist angle at which the looping was performed was 25 °.
The entanglement sharpness in the wire looping was 100%.
The technical scheme of the invention has the following advantages:
1. the invention provides a bonding wire which comprises a body, wherein the body comprises a first wire section fixedly connected with a wafer, a second wire section fixedly connected with a substrate and a third wire section connecting the first wire section and the second wire section, the second wire section is arranged close to the substrate, the third wire section and the second wire section are arranged in an obtuse angle or a right angle, when the external temperature changes greatly and the expansion and contraction of colloid exert the expansion or contraction pulling force on the bonding wire, the bending between the third wire section and the second wire section plays a role in buffering and extension, reduces the stress of the connection point of the second wire section and the substrate and avoids the fracture.
2. According to the bonding wire provided by the invention, the included angle between the third wire section and the second wire section is 90-140 degrees, the projection length of the second wire section on the horizontal plane is 1/6-1/3 of the projection length of the body on the horizontal plane, the structure can effectively improve the cold and heat impact resistance of the bonding wire, and the condition of breakage is reduced.
3. According to the semiconductor bonding process based on the bonding wire, the body welded by the first welding point is arched according to the set shape angle parameter, when the second wire section is arched, the shape angle parameter is set to be-100 degrees to-30 degrees, and the shape angle parameter is set to enable the third wire section and the second wire section to form a preset included angle.
4. According to the semiconductor bonding process based on the bonding wire, when the second wire section is arched, the shape angle parameter is set to be-70 degrees, the twist connection angle is 25 degrees, the correction sharpness is 100 percent, and the second wire section forms a straight line close to the substrate through the setting of the parameter.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a front view of a bonding wire of the present invention;
fig. 2 is a front view of the bonding wire based semiconductor bonding process of the present invention during bonding.
Description of reference numerals:
1. a body; 2. a wafer; 3. a substrate; 4. a first wire segment; 5. a second wire segment; 6. a third wire segment; 7. wire clamps; 8. a porcelain nozzle; 9. and (4) an included angle.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In addition, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
One embodiment of the bonding wire shown in fig. 1 includes a body 1, the body 1 includes a first wire segment 4 welded to the wafer 2, a second wire segment 5 welded to the substrate 3, and a third wire segment 6 connecting the first wire segment 4 and the second wire segment 5, the second wire segment 5 is disposed adjacent to the substrate 3, and an included angle 9 between the third wire segment 6 and the second wire segment 5 is an obtuse angle or a right angle.
As shown in FIG. 1, the included angle 9 between the third wire section 6 and the second wire section 5 is 90-140 degrees, and the length of the projection of the second wire section 5 on the horizontal plane is 1/6-1/3 of the length of the projection of the body 1 on the horizontal plane.
In the present embodiment, as shown in fig. 1, the first wire segment 4 is disposed perpendicular to the surface of the wafer 2, and the first wire segment 4 is bent by 90 ° and then connected to the third wire segment 6.
In one embodiment of the bonding wire-based semiconductor bonding process shown in fig. 2, a K & S-CONNX high speed bonding apparatus is used to bond a gold wire with a diameter of 20 μm and a gold content of 99.99%, and the parameter settings include: the swinging current is 15mA, the arc factor is 0, the twisting distance is 8 μm, the twisting angle is 25 degrees, the twisting sharpness is 100 percent, and the twisting motion is linear; when the second wire section 5 is subjected to looping, the span distance is 3 μm, the sharpness is 100, the shape motion is linear, and the shape angle is-70 °.
As shown in fig. 2, the bonding wire is subjected to bonding processing according to the parameters set as follows: a. the substrate ball is used, the bonding wire enters the porcelain mouth 8 through the wire clamp 7, part of the bonding wire is exposed at the tail end of the porcelain mouth 8, and the porcelain mouth 8 drives the bonding wire to move to be in contact with the substrate 3 to carry out ball-balling; b. welding a first welding point, wherein the ceramic nozzle 8 drives the bonding wire to move to be in contact with the wafer 2 and welding; c. arching the wires according to set parameters to form an included angle 9 of 90-140 degrees between the third wire section 6 and the second wire section 5; d. and welding a second welding point, wherein the ceramic nozzle 8 drives the bonding wire to move to be in contact with the substrate 3 and welding.
The cold and hot impact test is performed on a bonding wire sample of a common wire arc and a bonding wire sample formed by bonding through the bonding process of the embodiment, taking a gold wire and a silver wire as an example, 140 pieces of bonding wire samples are used for each product, the test conditions are that the high temperature is 100 ℃ for 15 minutes, the low temperature is-40 ℃ for 15 minutes, the conversion time between the high temperature and the low temperature is not more than 5 minutes, the cycle is taken as a cycle, the cycle times are increased for carrying out the test, and the test results are shown in the following table and can be obtained: the gold wire sample of the common wire arc completely fails when the sample is circulated for 450 times, and the silver wire sample of the common wire arc completely fails when the sample is circulated for 400 times; the gold wire sample bonded by the bonding process of the embodiment has no failure condition after being cycled for 450 times, the number of defects of the silver wire sample bonded by the bonding process of the embodiment is only 10 when being cycled for 400 times, and the defect rate is only 7.14%. The data show that the bonding wire of the embodiment has obviously improved anti-pulling capability when the external temperature changes greatly, and ensures the normal use of semiconductor products.
Figure BDA0002569555500000061
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are within the scope of the invention.

Claims (8)

1. A bonding wire, comprising:
body (1), including with wafer (2) fixed connection's first silk section (4), with base plate (3) fixed connection's second silk section (5) and be connected first silk section (4) with third silk section (6) of second silk section (5), second silk section (5) are pressed close to base plate (3) set up, just third silk section (6) with contained angle (9) between second silk section (5) are obtuse angle or right angle.
2. A bonding wire according to claim 1, characterized in that the angle (9) between the third wire length (6) and the second wire length (5) is 90 ° -140 °.
3. A bonding wire according to claim 1 or 2, characterized in that the length of the projection of the second wire length (5) in the horizontal plane is 1/6-1/3 of the length of the projection of the body (1) in the horizontal plane.
4. A bonding wire according to any of claims 1-3, characterized in that said first wire segment (4) and said wafer (2), said second wire segment (5) and said substrate (3) are fixed to each other by soldering.
5. A semiconductor bonding process based on a bonding wire is characterized by comprising the following steps:
arching the body (1) subjected to the first welding spot welding according to the set shape angle parameters to form a preset included angle (9) between the third wire section (6) and the second wire section (5), and then performing second welding spot welding;
wherein, when the second wire section (5) is arched, the shape angle parameter is set to-100 DEG to-30 deg.
6. A bonding wire based semiconductor bonding process according to claim 5, characterized in that the shape angle parameter is set to-70 ° when looping the second wire segment (5).
7. A bonding wire based semiconductor bonding process according to claim 5 or 6, wherein looping is performed at a twist angle of 25 °.
8. The bonding wire-based semiconductor bonding process according to claim 7, wherein the looping is performed with a rectification sharpness of 100%.
CN202010635327.1A 2020-07-03 2020-07-03 Bonding wire and semiconductor bonding process based on same Pending CN111668181A (en)

Priority Applications (1)

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CN202010635327.1A CN111668181A (en) 2020-07-03 2020-07-03 Bonding wire and semiconductor bonding process based on same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010635327.1A CN111668181A (en) 2020-07-03 2020-07-03 Bonding wire and semiconductor bonding process based on same

Publications (1)

Publication Number Publication Date
CN111668181A true CN111668181A (en) 2020-09-15

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