CN111665708A - Sweep frequency time detection method based on FPGA circuit - Google Patents
Sweep frequency time detection method based on FPGA circuit Download PDFInfo
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Abstract
The invention discloses a sweep frequency time detection method based on an FPGA circuit, which relates to the technical field of signal processing and signal measurement, and comprises the steps of adopting a sweep frequency time detection algorithm to carry out real-time analysis on the rising edge of each continuous square wave signal, starting a counter to time if the frequency of a measured signal reaches a set initial frequency, and stopping the timing when the instantaneous frequency of the measured signal reaches a set end frequency, so that the accurate time interval between the initial frequency and the end frequency can be obtained, the function of carrying out automatic sweep frequency time detection on a variable frequency signal is realized, because the FPGA measurement circuit adopts a 100MHz clock to carry out real-time analysis and calculation on the measured signal, and edge detection is carried out on the signal every 10ns, the precision of a measurement system is improved.
Description
Technical Field
The invention relates to the field of signal processing and signal measurement, in particular to a sweep frequency time detection method based on an FPGA circuit.
Background
With the development of economy, the time frequency correlation technology has been widely applied to the fields of communication, instruments, automatic control systems and the like, is closely related to production and life, and plays an important role in various fields of civilian use, industry, military use, aerospace and the like. The function signal generator is an important electronic instrument related to time frequency, and can generate certain specific periodic time function waveform signals, such as sine waves, square waves, triangular waves, sawtooth waves, pulse waves and the like, wherein the amplitude of the generated signals is constant, and the frequency can be changed linearly within a limited range. An important feature of the function signal generator is that the frequency step value and frequency range of the signal it generates can be set. The sweep frequency function of the device is widely applied to modern electronic systems and has wide application in many fields such as communication, radar, electronic countermeasure, navigation, automobile speed measurement, instruments and meters and the like. The function signal generator can be independently used as a standard signal source in a test instrument and is an important test tool for electronic instrument detection. At present, although a calibration rule of the function signal generator is established in China, the calibration rule does not completely cover all functional parameters of the function signal generator, particularly sweep frequency time parameters. The sweep frequency time parameter is very important for the detection and calibration of the speed parameter, especially in the field of automobile detection. At present, function signal generators with excellent performance are foreign brands, however, relevant regulations in China do not have a detection method related to sweep frequency time parameters, and the tracing of the sweep frequency time parameters can only be ensured by other means, such as detection by using an oscilloscope with high speed and large storage space, the means has high cost, signal waveform data also needs to be analyzed manually in the test process, the time consumption is long, and the efficiency is not high. The technology of the foreign country is blocked, so that the core detection technology is difficult to obtain. The frequency sweep time detection technology is an important means for guaranteeing the accuracy of time frequency parameters, and plays an important role in detection and calibration of speed parameters. Therefore, the development of the detection technology research of the automatic frequency sweeping time parameter has important application value for the detection and calibration work of the parameters such as time frequency, rotating speed, vehicle speed, instantaneous speed and the like.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a sweep frequency time detection method based on an FPGA circuit.
The purpose of the invention is realized by the following technical scheme:
a sweep frequency time detection method based on an FPGA circuit comprises the following steps:
and 5, finishing timing and outputting a result to the upper computer.
Preferably, the detection signal is a square wave signal, and the square wave signal includes a continuous square wave signal and a square wave signal with a frequency varying with time.
Preferably, the period of the continuous square wave signal is calculated by a sweep frequency time detection algorithm to obtain:
f is a continuous set of square wave signals, expressed as:
f＝{f(x1)，f(x2)，...，f(xm)}
wherein, f (x)k) Is a single square wave signal, represented as:
wherein A represents the amplitude of the square wave signal, T (x)k) Is a square wave signal f (x)k) And k is 1,2,3, …, m. Thus, the set T of consecutive square-wave signal periods is represented as:
T＝{T(x1)，T(x2)，...，T(xm)}。
the instantaneous frequency of the continuous square wave signal is indirectly calculated through the period T.
Preferably, the square wave signal with the frequency changing along with the time is intercepted by a windowing function method, then the periods of a plurality of continuous square wave signals obtained by the interception are calculated, then the periods are converted into instantaneous frequencies, then the instantaneous frequency of the square wave signal with the whole frequency changing along with the time can be calculated by continuously moving the position of the window function, and the windowing function operation is carried out on the set T of the periods of the continuous square wave signals to obtain the set T of the processed signal periodscExpressed as:
Tc＝{Tc(x1)，Tc(x2)，...，Tc(xm-n+1)}
in the formula (I), the compound is shown in the specification,
wherein i ═ 1,2, 3., m-n +1, and W ═ W1，W2，...，Wm]Is provided with W1＝W2＝，...，＝Wm＝1。
Preferably, the frequency of the detection signal changes from high to low.
Preferably, the FPGA circuit comprises a PLL clock generation module, an instantaneous frequency and time interval detection module, a hexadecimal decimal conversion module and a serial port sending module.
Preferably, the PLL clock generating module provides 5MHz, 50MHz and 100MHz operating clocks.
Preferably, the instantaneous frequency and time interval detection module adopts a 100MHz working clock to perform real-time frequency detection on the detected square wave signal.
The invention has the beneficial effects that:
and detecting the instantaneous frequency of the signal by applying a sweep frequency time detection algorithm through a signal rising edge, and starting a timer to start timing if the instantaneous frequency of the signal meets the set starting frequency. Due to the parallel data processing advantages of the FPGA control chip, the signal processing circuit can also detect the signal instantaneous frequency in real time, the timing function of the timer is finished when the signal instantaneous frequency meets the set finishing frequency, the sweep frequency time data is converted into a decimal data type and sent to an upper computer for processing and analysis, and the FPGA control chip has the advantages of stable measurement and high measurement precision.
Drawings
FIG. 1 is a schematic flow diagram of the process of the present invention;
FIG. 2 is a schematic diagram of a frequency sweep time detection apparatus of the present invention;
FIG. 3 is a functional block diagram of the FPGA measurement circuit of the present invention;
FIG. 4 is a schematic diagram of an active serial mode configuration circuit of the present invention;
FIG. 5 is a schematic diagram of the connection between CH340G and an FPGA control chip according to the present invention;
fig. 6 is a schematic diagram of a frequency sweep signal according to the present invention.
Detailed Description
The technical solutions of the present invention are further described in detail below with reference to the accompanying drawings, but the scope of the present invention is not limited to the following.
A sweep frequency time detection method based on an FPGA circuit comprises the following steps:
and 5, finishing timing and outputting a result to the upper computer.
It should be noted that the detection signal is a square wave signal, and the square wave signal includes a continuous square wave signal and a square wave signal with a frequency varying with time.
Wherein, the period of the continuous square wave signal is calculated by a sweep frequency time detection algorithm to obtain:
f is a continuous set of square wave signals, expressed as:
f＝{f(x1)，f(x2)，...，f(xm)} (1)
wherein, f (x)k) Is a single square wave signal, represented as:
wherein A represents the amplitude of the square wave signal, T (x)k) Is a square wave signal f (x)k) And k is 1,2,3, …, m. Thus, the set T of consecutive square-wave signal periods is represented as:
T＝{T(x1)，T(x2)，...，T(xm)} (3)
the instantaneous frequency of the continuous square wave signal is obtained through indirect calculation of the period T, and the sweep frequency time measuring method provided by the invention determines the starting point and the ending point of timing by measuring the instantaneous frequency of the continuous square wave signal.
It should be noted that the square wave signal with the frequency changing with time intercepts the signal by a windowing function method, then calculates the periods of a plurality of continuous square wave signals obtained by interception, converts the periods into instantaneous frequency, then calculates the instantaneous frequency of the square wave signal with the whole frequency changing with time by continuously moving the position of the window function, and calculates the windowing function of the set T of the periods of the continuous square wave signals to obtain the set T of the processed signal periodscExpressed as:
Tc＝{Tc(x1)，Tc(x2)，...，Tc(xm-n+1)} (4)
in the formula (I), the compound is shown in the specification,
wherein i ═ 1,2, 3., m-n + 1, and W ═ W1，W2，...，Wm]Is provided with W1＝W2＝，...，＝WmIn the FPGA measurement control circuit, the proposed sweep frequency time detection algorithm is applied to calculate the instantaneous frequency of a continuous square wave signal in real time, and for a certain square wave signal, the instantaneous frequency of the square wave signal is determined by calculating the frequency average value of the square wave signal and two subsequent continuous square wave signals, so that the value n in the formula (5) is set to be 3.
Wherein the frequency of the detection signal changes from high to low.
It should be noted that the sweep frequency time detection device based on the FPGA circuit of the present invention employs a Cyclone IV E series FPGA control chip, a measurement algorithm thereof is implemented by Verilog HDL hardware description language, and a main program flowchart is shown in fig. 1. The working principle of the software is that a sweep frequency time detection algorithm is applied to detect the instantaneous frequency of a signal through a signal rising edge, and if the instantaneous frequency of the signal meets the set starting frequency, a timer is started to start timing. Due to the parallel data processing advantages of the FPGA control chip, the signal processing circuit can also detect the instantaneous frequency of the signal in real time, the timing function of the timer is finished when the instantaneous frequency of the signal meets the set finishing frequency, the sweep frequency time data is converted into a decimal data form and sent to the upper computer for processing and analysis, and two pulse width registers R1 and R2 are adopted in sweep frequency time detection software to alternately calculate the pulse width of the continuous square wave signal, so that the instantaneous frequency of each continuous square wave signal can be obtained.
As shown in fig. 2, a frequency-variable signal generated by the measuring instrument or the photoelectric encoder is connected to the sweep frequency time detection device through a coaxial signal line, the sweep frequency time detection device converts the voltage of the measured square wave sweep frequency signal to within 5V of the voltage range allowed by the FPGA measurement control circuit through the impedance matching module, the FPGA measurement control circuit processes and calculates the sweep frequency signal in real time by using a sweep frequency time detection algorithm, the frequency of the measured signal is set to change from high to low, timing is started when the instantaneous frequency of the measured signal is less than or equal to the value of the set frequency starting point, and timing is ended when the instantaneous frequency of the measured signal is less than the value of the set frequency ending point, so that the time interval from high frequency to low frequency of the sweep frequency signal, that is, sweep frequency time, can be calculated.
The FPGA measurement control circuit in fig. 3 is composed of a PLL clock generating module, an instantaneous frequency and time interval detecting module, a hexadecimal decimal conversion module, and a serial port sending module, as shown in fig. 2, the system adopts an external 50MHz crystal oscillator to drive the PLL clock generating module, and the PLL clock generating module provides 3 kinds of working clocks of 5MHz, 50MHz, and 100MHz for the FPGA measurement control circuit. The instantaneous frequency and time interval detection module adopts a 100MHz working clock to perform real-time frequency detection on a detected square wave signal, adopts a sweep frequency time detection algorithm to perform real-time analysis on the rising edge of each continuous square wave signal, starts a counter to time if the frequency of the detected signal reaches a set initial frequency, and stops timing when the instantaneous frequency of the detected signal reaches a set termination frequency, so that the accurate time interval between the initial frequency and the termination frequency can be obtained, the function of performing automatic sweep frequency time detection on a variable frequency signal is realized, and because the FPGA measurement circuit adopts the 100MHz clock to perform real-time analysis and calculation on the detected signal, edge detection is performed on the signal every 10ns, and the precision of the measurement system is improved. As the counter for measuring the sweep frequency time interval by the FPGA measuring circuit adopts a 48-bit binary counter, data needs to be converted into decimal numbers for convenience of output display, a hexadecimal decimal conversion module is designed for the system to realize the conversion function between systems, and as the time consumption is more in the data system conversion process and the lower clock frequency is needed, 5MHz clock driving provided by PLL is adopted. And finally, the converted decimal data is sent to an upper computer for display and analysis through a serial port sending module. The serial port sending module is driven by a 50MHz clock generated by PLL, and performs frequency reduction processing inside the module to obtain a low-frequency clock signal required by serial port sending, so as to realize the sending function of data.
The sweep frequency time detection device adopts a Cyclone IV E series EP4CE10F17C8 control chip, and the chip has the advantages of low power consumption and high cost performance, and has important application prospect in instrument and instrument products and industrial control products. The M9K memory module in the chip is provided with a 9Kbit embedded SRAM memory, and can meet the requirements of various data storage in the operation process of the project system. In addition, by using the multiplier in the chip, the frequency sweeping time detection algorithm with a more efficient parallel structure is convenient to realize. Besides core architecture resources, the chip also has 2 PLL clock management units and a plurality of system IOs, so that management of the system circuit clock of the project is facilitated. In order to ensure the normal operation of the FPGA measurement control circuit and avoid the loss of instruction codes in the FPGA circuit due to power failure, after the system is powered on, the FPGA actively outputs control and synchronization signals to the dedicated serial configuration chip W25Q16 in an active serial mode (AS), and after the serial configuration chip receives a command, the configuration data is loaded into the SRAM of the FPGA circuit, and then the FPGA measurement circuit can normally operate, AS shown in fig. 4, a schematic diagram of the FPGA active serial mode configuration circuit. The sweep frequency time detection device is provided with a divider resistor at a connecting terminal of the FPGA measurement control circuit and the measured square wave signal so as to limit the highest voltage of the measured signal, thereby realizing the function of detecting the sweep frequency time of the measured square wave signal.
Because the sweep frequency time parameter of the measured square wave signal is calculated and processed in the FPGA measurement control circuit in a 48-bit binary number mode, the system adopts a serial port-to-USB chip CH340G to realize the data transmission function of the FPGA measurement control circuit and an upper computer after the sweep frequency time parameter is converted into decimal data for the convenience of display and processing by the upper computer. The CH340G chip is a USB bus switching chip supporting 5V or 3.3V power supply, can realize a USB switching serial port protocol, supports a communication baud rate of 50 bps-2 Mbps, and can perform data transmission with an upper computer through a common USB data line. The schematic connection diagram of the serial-to-USB chip CH340G and the FPGA control chip is shown in fig. 5. It should be noted that two pulse width registers R1 and R2 are used in the swept frequency time detection software to alternately calculate the pulse widths of the successive square signals, so that the instantaneous frequency of each successive square signal can be obtained.
It should be noted that, the present application compares the experiment with the measurement of the oscilloscope, and the specific content is as follows:
a Keysight 33600A series function signal generator is adopted to simulate a frequency sweep signal with linearly changing frequency, then the frequency sweep signal is simultaneously measured by a frequency sweep time detection device and a Tektronix MSO64 mixed signal oscilloscope, and the measurement results of the frequency sweep time are compared and analyzed. First, a frequency sweep signal with a frequency linearly changing from 70kHz to 10kHz is generated by a function signal generator, the frequency sweep time is respectively set to 10s and 20s, and then the time required for the signal frequency to linearly change from 50kHz to 20kHz is respectively 5s and 10 s. Figure 6 shows a screenshot of the frequency sweep signal generated by the function signal generator for a linear change in frequency from 70kHz to 10 kHz.
The mixed signal oscilloscope and the sweep frequency time detection device are adopted to perform sweep frequency time measurement on a variable frequency signal with the frequency linearly reduced from 70kHz to 10kHz, the starting frequency and the ending frequency of the sweep frequency time measurement are respectively set to be 50kHz and 20kHz, and the average value of the three times of sweep frequency time measurement on the signal is shown in Table 1.
TABLE 1 measurement results of frequency sweep signals with start-stop frequencies set to 50kHz and 20kHz
By comparison, accurate sweep frequency time parameters can be obtained by adopting the sweep frequency time detection device and the oscilloscope measurement method, the measurement results are very close, and the measurement error is less than 1 ms. However, the adoption of the oscilloscope measurement method needs to continuously store the frequency sweep signal, and then the stored signal data is analyzed and calculated in a computer through MATLAB software by adopting a similar frequency sweep time detection algorithm, so that the data processing amount is large. As the maximum storage depth of the oscilloscope used in the experiment is 62.5M sampling points, the highest sampling rate can be set to be 3.125MS/s, and the rate of analyzing the signal by the sweep frequency time detection device based on the FPGA circuit is 100 MS/s. It can be seen that the frequency of analyzing the frequency sweep signal by using the oscilloscope measurement method is far lower than that of the frequency sweep time detection device based on the FPGA circuit, and the detection of the frequency sweep time parameter by using the high-end oscilloscope detection method requires post-processing of data, so that the detection time is long and the measurement result cannot be displayed in real time, while the frequency sweep time detection device based on the FPGA circuit can realize automatic detection of the frequency sweep time parameter of the low-frequency sweep signal. In the experiment, a sweep frequency time detection device is also adopted to carry out 11 times of measurement on the sweep frequency time signal in the table 1, and the mean square error of the measurement result is as low as 1.5 multiplied by 10 < -4 > s, so that the sweep frequency time detection device provided by the invention has high measurement precision.
The foregoing is merely a preferred embodiment of the invention, it being understood that the embodiments described are part of the invention, and not all of it. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention. The invention is not intended to be limited to the forms disclosed herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein. And that modifications and variations may be effected by those skilled in the art without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (8)
1. A sweep frequency time detection method based on an FPGA circuit is characterized by comprising the following steps:
step 1, detecting the instantaneous frequency of a signal through an FPGA circuit;
step 2, judging whether the instantaneous frequency of the signal in the step 1 meets the initial timing frequency, if so, entering the step 3, and if not, skipping to the step 1;
step 3, starting timing and continuously detecting the instantaneous frequency of the signal;
step 4, judging whether the instantaneous frequency of the signal in the step 3 meets the end frequency, if so, entering the step 5, and if not, skipping to the step 3;
and 5, finishing timing and outputting a result to the upper computer.
2. A swept frequency time detection method based on an FPGA circuit according to claim 1, wherein the detection signal is a square wave signal, and the square wave signal comprises a continuous square wave signal and a square wave signal with frequency changing with time.
3. A frequency sweep time detection method based on an FPGA circuit as recited in claim 2, wherein the period of the continuous square wave signal is calculated by a frequency sweep time detection algorithm to obtain:
f is a continuous set of square wave signals, expressed as:
f＝{f(x1)，f(x2)，...，f(xm)}
wherein, f (x)k) Is a single square wave signal, represented as:
wherein A represents the amplitude of the square wave signal, T (x)k) Is a square wave signal f (x)k) And k is 1,2,3, …, m. Thus, the set T of consecutive square-wave signal periods is represented as:
T＝{T(x1)，T(x2)，...，T(xm)}。
the instantaneous frequency of the continuous square wave signal is indirectly calculated through the period T.
4. A swept frequency time detection method based on an FPGA circuit according to claim 3,
intercepting the square wave signal with the frequency changing along with the time by a windowing function method, calculating the periods of a plurality of continuous square wave signals obtained by interception, converting the periods into instantaneous frequency, and then aligning the square wave signals by continuously moving the position of the windowing functionThe instantaneous frequency of the whole frequency time-varying square wave signal is calculated, and the windowing function operation is carried out on the set T of the periods of the continuous square wave signal to obtain the set T of the processed signal periodscExpressed as:
Tc＝{Tc(x1)，Tc(x2)，...，Tc(xm-n+1)}
in the formula (I), the compound is shown in the specification,
wherein i ═ 1,2, 3., m-n +1, and W ═ W1，W2，...，Wm]Is provided with W1＝W2＝，...，＝Wm＝1。
5. A method as claimed in claim 1, wherein the frequency of the detection signal changes from high to low.
6. A swept frequency time detection method based on an FPGA circuit as claimed in claim 1, wherein the FPGA circuit comprises a PLL clock generating module, an instantaneous frequency and time interval detecting module, a hexadecimal to decimal module and a serial port transmitting module.
7. A swept frequency time detection method based on an FPGA circuit according to claim 6, characterized in that the PLL clock generation module provides 5MHz, 50MHz and 100MHz working clocks.
8. A swept frequency time detection method based on an FPGA circuit as claimed in claim 7, wherein the instantaneous frequency and time interval detection module adopts a 100MHz working clock to perform real-time frequency detection on a detected square wave signal.
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Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004125492A (en) * | 2002-09-30 | 2004-04-22 | Mitsumi Electric Co Ltd | Signal receiving circuit, disk drive device, disk drive control method and disk drive control program |
| WO2008017988A2 (en) * | 2006-08-08 | 2008-02-14 | Nxp B.V. | Device and method for measuring the frequency of a signal coded modulated carrier signal |
| CN101520640A (en) * | 2008-11-08 | 2009-09-02 | 中国工程物理研究院流体物理研究所 | Time interval measuring instrument based on FPGA |
| CN102809686A (en) * | 2012-07-05 | 2012-12-05 | 北京邮电大学 | Instantaneous frequency detection method and system for frequency sweeping source |
| CN203191708U (en) * | 2013-04-28 | 2013-09-11 | 北京震旦天际科技发展有限公司 | Precise time-interval measuring instrument |
| CN104536282A (en) * | 2014-12-30 | 2015-04-22 | 杭州士兰微电子股份有限公司 | Time-digital converter and time measuring device and method |
| CN207586312U (en) * | 2018-03-20 | 2018-07-06 | 成都信息工程大学 | A kind of digital frequency meter based on FPGA |
| CN108519511A (en) * | 2018-03-28 | 2018-09-11 | 电子科技大学 | A Time-Domain Measurement Method of Frequency Characteristic Parameters of Chirp Signal |
-
2020
- 2020-06-10 CN CN202010524976.4A patent/CN111665708B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004125492A (en) * | 2002-09-30 | 2004-04-22 | Mitsumi Electric Co Ltd | Signal receiving circuit, disk drive device, disk drive control method and disk drive control program |
| WO2008017988A2 (en) * | 2006-08-08 | 2008-02-14 | Nxp B.V. | Device and method for measuring the frequency of a signal coded modulated carrier signal |
| CN101520640A (en) * | 2008-11-08 | 2009-09-02 | 中国工程物理研究院流体物理研究所 | Time interval measuring instrument based on FPGA |
| CN102809686A (en) * | 2012-07-05 | 2012-12-05 | 北京邮电大学 | Instantaneous frequency detection method and system for frequency sweeping source |
| CN203191708U (en) * | 2013-04-28 | 2013-09-11 | 北京震旦天际科技发展有限公司 | Precise time-interval measuring instrument |
| CN104536282A (en) * | 2014-12-30 | 2015-04-22 | 杭州士兰微电子股份有限公司 | Time-digital converter and time measuring device and method |
| CN207586312U (en) * | 2018-03-20 | 2018-07-06 | 成都信息工程大学 | A kind of digital frequency meter based on FPGA |
| CN108519511A (en) * | 2018-03-28 | 2018-09-11 | 电子科技大学 | A Time-Domain Measurement Method of Frequency Characteristic Parameters of Chirp Signal |
Non-Patent Citations (4)
| Title |
|---|
| 刘光源: "《实用维修电工手册》", 30 September 2010, 上海科学技术出版社 * |
| 朱卫民: "汽车排放和超声场计量溯源的光电混合技术研究", 《中国博士学位论文全文数据库 工程科技Ⅱ辑》 * |
| 段惠敏等: "基于FPGA和单片机的扫频信号源的设计", 《合肥学院学报（综合版）》 * |
| 瞿鑫等: "基于FPGA的时间间隔测量系统的设计", 《电子器件》 * |
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