CN111641187A - Overcurrent protection circuit, overcurrent protection method and electronic equipment - Google Patents
Overcurrent protection circuit, overcurrent protection method and electronic equipment Download PDFInfo
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- CN111641187A CN111641187A CN202010540422.3A CN202010540422A CN111641187A CN 111641187 A CN111641187 A CN 111641187A CN 202010540422 A CN202010540422 A CN 202010540422A CN 111641187 A CN111641187 A CN 111641187A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H1/00—Details of emergency protective circuit arrangements
- H02H1/04—Arrangements for preventing response to transient abnormal conditions, e.g. to lightning or to short duration over voltage or oscillations; Damping the influence of dc component by short circuits in ac networks
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Abstract
The invention provides an overcurrent protection circuit, an overcurrent protection method and electronic equipment, wherein when the voltage is continuously less than a first reference voltage and greater than a second reference voltage within a first preset time, a continuous output module continuously outputs a high level signal, a signal adjusting module outputs a high level signal, a maintaining module continuously outputs a low level signal within a second preset time, and a driving module outputs a low level signal to control a first field effect transistor to be in a turn-off state within the second preset time; when the voltage is greater than the first reference voltage, the signal adjusting module outputs a high level signal, the maintaining module continuously outputs a low level signal within a second preset time, and the driving module outputs a low level signal to control the first field effect transistor to be in a turn-off state within the second preset time, so that when the chip is subjected to overcurrent protection, the chip can be efficiently and accurately subjected to overcurrent protection in time, and the circuit cannot be repeatedly switched between the on state and the off state.
Description
Technical Field
The present invention relates to the field of integrated circuit technologies, and in particular, to an overcurrent protection circuit, an overcurrent protection method, and an electronic device.
Background
With the continuous development of science and technology, various electronic devices are widely applied to the life and work of people, and great convenience is brought to the daily life of people.
The functions of portable electronic devices are more and more complex, and the requirements for power management chips are higher and higher. For power management chips, strong robustness is one of core indexes of the chips, which requires that the chips can accurately and quickly respond when overvoltage, overcurrent and other conditions occur, and the chips are protected from being damaged by energy of high voltage and heavy current.
With the increasingly high power transmitted by the power management chip and the increasingly strong output current capability, when short circuit or surge occurs, large current is more easily generated inside the chip, and therefore, the overcurrent protection function is very important for the power management chip and the digital-to-analog conversion chip.
Therefore, how to improve an efficient and accurate over-current protection circuit is a technical problem to be solved urgently by those skilled in the art.
Disclosure of Invention
In view of the above, to solve the above problems, the present invention provides an overcurrent protection circuit, an overcurrent protection method and an electronic device, which can efficiently and accurately perform overcurrent protection on a chip in time.
The technical scheme of the invention is as follows:
an overcurrent protection circuit, comprising: the device comprises a first field effect transistor, a driving module, a conversion module, a first comparison module, a second comparison module, a continuous output module, a signal adjusting module and a holding module;
the first end of the first field effect transistor is connected with the input end, the second end of the first field effect transistor is connected with the output end, and the control end of the first field effect transistor is connected with the output end of the driving module;
the driving module is used for controlling the conduction state of the first field effect transistor;
the input end of the conversion module is connected with the second end of the first field effect transistor, and the output end of the conversion module is respectively connected with the first input end of the first comparison module and the first input end of the second comparison module, and is used for collecting current flowing through the first field effect transistor and converting the current into voltage;
a second input end of the first comparison module is connected with a first reference voltage input end, a second input end of the second comparison module is connected with a second reference voltage input end, and the first reference voltage is greater than the second reference voltage;
the first comparison module is used for judging the magnitude relation between the voltage and the first reference voltage, and the second comparison module is used for judging the magnitude relation between the voltage and the second reference voltage;
the output end of the first comparison module is connected with the first input end of the signal adjustment module;
the output end of the second comparison module is connected with the input end of the continuous output module;
the output end of the continuous output module is connected with the second input end of the signal adjusting module;
the output end of the signal adjusting module is connected with the input end of the maintaining module;
the input end of the holding module is connected with the input end of the driving module;
when the voltage is continuously less than the first reference voltage and greater than a second reference voltage within a first preset time, the continuous output module is used for continuously outputting a high level signal, the signal adjusting module is used for outputting a high level signal, the holding module is used for continuously outputting a low level signal within a second preset time, and the driving module outputs a low level signal to control the first field effect transistor to be in a turn-off state within the second preset time;
and/or the presence of a gas in the gas,
when the voltage is greater than the first reference voltage, the signal adjusting module is used for outputting a high level signal, the holding module is used for continuously outputting a low level signal within a second preset time, and the driving module outputs a low level signal so as to control the first field effect transistor to be in a turn-off state within the second preset time.
Preferably, in the overcurrent protection circuit, the first comparison module is a first comparator;
the inverting input end of the first comparator is connected with the output end of the conversion module, the non-inverting input end of the first comparator is connected with the first reference voltage input end, and the output end of the first comparator is connected with the first input end of the signal adjusting module.
Preferably, in the overcurrent protection circuit, the second comparing module is a second comparator;
the inverting input end of the second comparator is connected with the output end of the conversion module, the non-inverting input end of the second comparator is connected with the second reference voltage input end, and the output end of the second comparator is connected with the input end of the continuous output module.
Preferably, in the overcurrent protection circuit, the continuous output module includes: the second field effect transistor, the resistor, the third field effect transistor and the capacitor are connected;
the first end of the second field effect transistor is connected with the voltage input end, and the second end of the second field effect transistor is connected with the first end of the resistor;
the second end of the resistor is respectively connected with the first end of the third field effect transistor and the first end of the capacitor, and the connection node of the resistor and the capacitor is used as the output end of the continuous output module;
the second end of the capacitor is connected with the second end of the third field effect transistor, and the connection node is grounded;
and the control end of the second field effect transistor is connected with the control end of the third field effect transistor, and the connection node is used as the input end of the continuous output module.
Preferably, in the overcurrent protection circuit, the second field effect transistor is a P-type field effect transistor, and the third field effect transistor is an N-type field effect transistor.
Preferably, in the overcurrent protection circuit, the signal adjusting module includes: first to third inverters and an OR gate logic unit;
the input end of the first phase inverter is connected with the output end of the continuous output module, and the output end of the first phase inverter is connected with the input end of the second phase inverter;
the output end of the second inverter is connected with the first input end of the OR gate logic unit;
the input end of the third inverter is connected with the output end of the second comparison module, and the output end of the third inverter is connected with the second input end of the OR gate logic unit;
and the output end of the OR gate logic unit is used as the output end of the signal adjusting module.
Preferably, in the overcurrent protection circuit, the holding module includes: a timing unit and an OR-NOT gate logic unit;
the input end of the timing unit is connected with the first input end of the NOR gate logic unit, and the connection node is used as the input end of the holding module;
the output end of the timing unit is connected with the second input end of the NOR gate logic unit;
and the output end of the NOR gate logic unit is used as the output end of the holding module.
Preferably, in the overcurrent protection circuit, the first field effect transistor is an N-type field effect transistor.
An overcurrent protection method, comprising:
collecting current flowing through a first field effect transistor;
converting the current to a voltage;
judging whether the voltage is continuously smaller than a first reference voltage and larger than a second reference voltage within a first preset time; or judging whether the voltage is greater than the first reference voltage;
if yes, turning off the first field effect transistor;
obtaining the turn-off duration of the first field effect transistor;
judging whether the turn-off duration time of the first field effect transistor is greater than a second preset time or not;
if so, clearing the turn-off duration of the first field effect transistor, and returning to judge whether the voltage is continuously less than a first reference voltage and greater than a second reference voltage within a first preset time; or judging whether the voltage is greater than the first reference voltage;
wherein the first reference voltage is greater than the second reference voltage.
Preferably, in the overcurrent protection method, when the voltage is lower than the second reference voltage, the first field effect transistor is controlled to be in a conducting state.
Preferably, in the overcurrent protection method, when the turn-off duration of the first field effect transistor is less than the second preset time, the first field effect transistor is controlled to be in a turn-off state.
An electronic device comprising the overcurrent protection circuit of any one of the above.
Compared with the prior art, the invention has the following beneficial effects:
according to the overcurrent protection circuit, the continuous output module is arranged and used for continuously outputting the high-level signal when the voltage is continuously lower than the first reference voltage and higher than the second reference voltage within the first preset time, so that the problem of overcurrent false triggering is solved. That is to say, when great current appeared, traditional overcurrent protection circuit can get into overcurrent protection mode at once, but, the duration of this great current is very short, does not need to get into overcurrent protection mode this moment, consequently, this application through set up the problem that the continuous output module can be very perfect evades prior art existence, has prevented the problem that overflows the spurious triggering.
And through setting up first comparator and second comparator, through judging the magnitude relation between voltage and first reference voltage and second reference voltage, when voltage is greater than first reference voltage, show that there is great current to pass through first field effect transistor, and this current has reached the maximum value that damages internal device, and then directly control the circuit through signal adjustment module and holding module and get into and prevent the overcurrent mode, carry out overcurrent protection.
Furthermore, after the chip of the over-current protection circuit enters the over-current prevention mode, the first field effect transistor is continuously in the off state within the second preset time, so that the problem that the circuit is repeatedly switched between the off state and the on state is effectively solved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an overcurrent protection circuit according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of another overcurrent protection circuit according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another over-current protection circuit according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another over-current protection circuit according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another over-current protection circuit according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of another over-current protection circuit according to an embodiment of the present invention;
fig. 7 is a schematic flowchart of an overcurrent protection method according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The applicant finds that, in an existing technical scheme, after an overcurrent protection circuit enters an overcurrent protection mode, a path current immediately drops to 0, at this time, the overcurrent protection circuit immediately exits the overcurrent protection mode, and the path current continuously outputs current.
Then, when the load outputting the large current is still outputting the large current continuously, the overcurrent protection mode is entered again, and the circuit is switched back and forth between the off state and the on state in such a reciprocating manner, so that an abnormal oscillation phenomenon occurs.
And, when the power management chip normally works, because the internal switching power supply needs to control the periodic switching of the power tube, if the input end has a larger parasitic inductance, then there will be an instantaneous pulse large current when the load is larger, the over-current protection circuit will enter into the over-current protection mode, however, the duration of this pulse large current is very short, and not generated by the output load over-current, therefore it is not desirable that the over-current protection circuit carries out the over-current protection mode, that is, the over-current protection circuit in the prior art will have a false triggering phenomenon to affect the whole vehicle work of the chip.
Therefore, based on the defects in the prior art, a technical problem to be solved by those skilled in the art is how to determine whether the chip is actually subjected to an overcurrent, and in the overcurrent protection process, the circuit is not switched back and forth between the off state and the on state.
Based on this, this application is used and is given birth to, the overcurrent protection circuit that this application provided can be high-efficient accurate in time carry out overcurrent protection to the chip when overcurrent protection takes place for the chip, and can not make the circuit switch repeatedly between on-state and off-state.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an overcurrent protection circuit according to an embodiment of the present invention.
The overcurrent protection circuit includes: the device comprises a first field effect transistor Q1, a driving module 11, a conversion module 12, a first comparison module 13, a second comparison module 14, a continuous output module 15, a signal adjusting module 16 and a holding module 17.
The first terminal of the first fet Q1 is connected to the input terminal IN, the second terminal is connected to the output terminal OUT, and the control terminal of the first fet Q1 is connected to the output terminal of the driving module 11.
The driving module 11 is configured to control a conducting state of the first fet Q1.
The input end of the conversion module 12 is connected to the second end of the first fet Q1, and the output end is connected to the first input end of the first comparison module 13 and the first input end of the second comparison module 14, respectively, for collecting the current flowing through the first fet Q1, and converting the current into a voltage V.
The second input terminal of the first comparing module 13 is connected to the input terminal of a first reference voltage V1, the second input terminal of the second comparing module 14 is connected to the input terminal of a second reference voltage V2, and the first reference voltage V1 is greater than the second reference voltage V2. The first comparing module 13 is used for determining the magnitude relationship between the voltage V and the first reference voltage V1, and the second comparing module 14 is used for determining the magnitude relationship between the voltage V and the second reference voltage V2.
The output end of the first comparing module 13 is connected to the first input end of the signal adjusting module 16.
The output end of the second comparing module 14 is connected with the input end of the continuous output module 15.
The output end of the continuous output module 15 is connected with the second input end of the signal adjusting module 16.
The output end of the signal adjusting module 16 is connected with the input end of the holding module 17.
The input of the holding module 17 is connected to the input of the drive module 11.
When the voltage V is continuously less than the first reference voltage V1 and greater than the second reference voltage V2 within a first preset time, the first comparing module 13 outputs a high level signal, the second comparing module 14 outputs a low level signal, the continuous output module 15 is configured to continuously output a high level signal after receiving a low level signal output by the second comparing module 14, the signal adjusting module 16 is configured to output a high level signal after receiving a high level signal output by the first comparing module 13 and after receiving a low level signal output by the second comparing module 14, the holding module 17 is configured to continuously output a low level signal within a second preset time after receiving a high level signal output by the signal adjusting module 16, the driving module 11 receives a low level signal output by the holding module 17, and continuously outputting a low level signal within the second preset time to control the first field effect transistor Q1 to be in an off state within the second preset time.
When the voltage V is greater than the first reference voltage V1, the first comparing module 13 outputs a low level signal, the second comparing module 14 outputs a low level signal, the continuous output module 15 is configured to continuously output a high level signal after receiving the low level signal output by the second comparing module 14, the signal adjusting module 16 is configured to output a high level signal after receiving the low level signal output by the first comparing module 13 and after receiving the low level signal output by the second comparing module 14, the holding module 17 is configured to continuously output a low level signal for a second preset time after receiving the high level signal output by the signal adjusting module 16, the driving module 11 continuously outputs a low level signal for the second preset time after receiving the low level signal output by the holding module 17, so as to control the first field effect transistor Q1 to be in an off state within the second preset time.
It should be noted that the driving module 11 may be a conventional driving module of a field effect transistor in the prior art, and a specific implementation structure thereof is not limited in the embodiment of the present invention.
IN this embodiment, when the chip IN which the overcurrent protection circuit is located operates normally, the first fet Q1 is IN a conducting state, and energy is transferred from the input terminal IN to the output terminal OUT.
The first reference voltage V1 is a voltage value corresponding to the instantaneous maximum current that the chip can bear, and is used to prevent the problem of damaging internal devices when an excessive transient current passes through the chip.
The second reference voltage V2 is greater than the voltage value corresponding to the maximum current when the chip is operating normally, which is to prevent the problem of damaging the internal devices when a continuous large current is passed through the chip.
That is, when the current flowing through the first fet Q1 is converted into a voltage greater than the second reference voltage V2 by the conversion module 12, two overcurrent protection modes of the overcurrent protection circuit occur.
One is as follows: when the voltage corresponding to the current flowing through the first fet Q1 is greater than the second reference voltage V2 and less than the first reference voltage V1 and lasts for the first preset time, which indicates that a large current is continuously output on the chip at this time, and it is determined that an overcurrent phenomenon occurs in the chip, the first fet Q1 is turned off.
The second step is as follows: when the voltage corresponding to the current flowing through the first field effect transistor Q1 is greater than the first reference voltage V1, it is indicated that an excessive transient current passes through the chip at this time, and it is immediately determined that an overcurrent phenomenon occurs in the chip, and the first field effect transistor Q1 is immediately turned off.
Moreover, after the chip where the overcurrent protection circuit is located enters the overcurrent prevention mode, the holding module 17 continuously outputs the low level signal within the second preset time, so that the driving module also continuously outputs the low level signal within the second preset time, and the first field effect transistor Q1 is continuously in the off state within the second preset time, thereby effectively preventing the circuit from being repeatedly switched between the off state and the on state.
Further, based on the above embodiment of the present invention, referring to fig. 2, fig. 2 is a schematic structural diagram of another over-current protection circuit provided in the embodiment of the present invention.
The first comparing module 13 is a first comparator 18.
The inverting input terminal of the first comparator 18 is connected to the output terminal of the converting module 12, the non-inverting input terminal thereof is connected to the input terminal of the first reference voltage V1, and the output terminal thereof is connected to the first input terminal of the signal adjusting module 16.
In this embodiment, when the voltage converted by the conversion module 12 from the current flowing through the first fet Q1 is greater than the first reference voltage V1, the first comparator 18 outputs a low signal.
Further, based on the above-mentioned embodiment of the present invention, referring to fig. 3, fig. 3 is a schematic structural diagram of another over-current protection circuit provided in the embodiment of the present invention.
The second comparing module 14 is a second comparator 19.
The inverting input terminal of the second comparator 19 is connected to the output terminal of the conversion module 12, the non-inverting input terminal thereof is connected to the input terminal of the second reference voltage V2, and the output terminal thereof is connected to the input terminal of the continuous output module 15.
In this embodiment, when the voltage converted by the conversion module 12 from the current flowing through the first fet Q1 is greater than the second reference voltage V2 and less than the first reference voltage V1, the first comparator 18 outputs a high signal, and the second comparator 19 outputs a low signal.
Further, based on the above embodiment of the present invention, referring to fig. 4, fig. 4 is a schematic structural diagram of another over-current protection circuit provided in the embodiment of the present invention.
The persistent output module 15 includes: the circuit comprises a second field effect transistor MP1, a resistor R, a third field effect transistor MN1 and a capacitor C.
The first end of the second field effect transistor MP1 is connected to the voltage input terminal VDD, and the second end is connected to the first end of the resistor R.
The second end of the resistor R is connected to the first end of the third fet MN1 and the first end of the capacitor C, respectively, and the connection node of the resistor R and the capacitor C serves as the output end of the continuous output module 15.
The second end of the capacitor C is connected with the second end of the third field effect transistor MN1, and the connection node is grounded.
The control end of the second fet MP1 is connected to the control end of the third fet MN1, and the connection node is used as the input end of the persistent output module 15.
In this embodiment, when the voltage converted by the conversion module 12 from the current flowing through the first fet Q1 is greater than the second reference voltage V2 and less than the first reference voltage V1 within the first preset time, the second comparator 19 outputs a low level signal, at this time, the second fet MP1 is turned on, the capacitor C is charged through the resistor R, the voltage VDEG at the connection node between the resistor R and the capacitor C gradually rises, and the continuous output module 15 continuously outputs a high level signal.
Optionally, in this embodiment of the application, the second fet MP1 is a P-type fet, and the third fet MN1 is an N-type fet.
Further, based on the above embodiment of the present invention, referring to fig. 5, fig. 5 is a schematic structural diagram of another over-current protection circuit provided in the embodiment of the present invention.
The signal conditioning module 16 includes: the first to third inverters (INV1, INV2, and INV3) and an OR gate logic unit OR 1.
An input end of the first inverter INV1 is connected to an output end of the persistent output module 15, and an output end of the first inverter INV1 is connected to an input end of the second inverter INV 2.
An output end of the second inverter INV2 is connected to a first input end of the OR gate logic unit OR 1.
An input end of the third inverter INV3 is connected to the output end of the second comparing module 18, and an output end of the third inverter INV3 is connected to a second input end of the OR gate logic unit OR 1.
The output of the OR gate logic unit OR1 serves as the output of the signal conditioning module 16.
In this embodiment, when the voltage converted by the conversion module 12 by the current flowing through the first fet Q1 is greater than the second reference voltage V2 and less than the first reference voltage V1 within a first preset time, the second comparator 19 outputs a low level signal, at this time, the second fet MP1 is turned on, the capacitor C is charged through the resistor R, and the voltage VDEG at the connection node between the resistor R and the capacitor C gradually rises, the continuous output module 15 continuously outputs a high level signal, the high level signal is adjusted by the first inverter INV1 and the second inverter INV2, the high level signal is converted into a high level signal in a square wave form, the high level signal is input to the first input terminal of the OR gate logic unit OR1, and the OR gate logic unit OR1 continuously outputs a high level signal to the holding module 17 within a first preset time.
When the voltage converted by the conversion module 12 from the current flowing through the first fet Q1 is greater than the first reference voltage V1, the first comparator 18 outputs a low level signal, the low level signal is adjusted by the third inverter INV3, the low level signal is converted into a high level signal in a square wave form, the high level signal is input to the second input terminal of the OR gate logic unit OR1, and the OR gate logic unit OR1 continuously outputs the high level signal to the holding module 17 for a first preset time.
Further, based on the above embodiment of the present invention, referring to fig. 6, fig. 6 is a schematic structural diagram of another over-current protection circuit provided in the embodiment of the present invention.
The holding module 17 includes: the timing unit 20 and the NOR logic unit NOR 1.
Wherein the input of the timing unit 20 is connected to a first input of the NOR gate logic unit NOR1, and the connection node is used as the input of the holding module 17.
The output of the timing unit 20 is connected to a second input of the NOR gate logic unit NOR 1.
The output of the NOR gate logic unit NOR1 serves as the output of the holding module 17.
In this embodiment, when the timing unit 20 receives a high signal at an initial time, the start of the operation starts, during which the timing unit 20 continuously outputs a high signal, and the NOR gate logic unit NOR1 continuously outputs a low signal.
That is, when receiving the high level signal, the holding module 17 continuously outputs the low level signal to the driving module 11 for a second predetermined time, so as to control the first fet Q1 to be in the off state for the second predetermined time.
When the time is exceeded, the timing unit 20 stops timing and clears, outputs a low level signal to the first input terminal of the NOR gate logic unit NOR1, the second input terminal of the NOR gate logic unit NOR1 also receives a low level signal, and the NOR gate logic unit NOR1 outputs a high level signal to the driving module 11 to control the first fet Q1 to be in a conducting state.
Optionally, in this embodiment of the present application, the first fet Q1 is an N-type fet. In addition, the overcurrent protection circuit in the present application further includes a first capacitor C1 provided at the input terminal and a second capacitor C2 provided at the output terminal.
Based on all the above embodiments of the present invention, in another embodiment of the present invention, an overcurrent protection method is further provided, referring to fig. 7, and fig. 7 is a schematic flow diagram of an overcurrent protection method according to an embodiment of the present invention.
The overcurrent protection method comprises the following steps:
s101: the current flowing through the first field effect transistor is collected.
S102: converting the current to a voltage.
S103: judging whether the voltage is continuously smaller than a first reference voltage and larger than a second reference voltage within a first preset time; or judging whether the voltage is greater than the first reference voltage.
S104: and if so, turning off the first field effect transistor.
S105: and obtaining the turn-off duration of the first field effect transistor.
S106: and judging whether the turn-off duration time of the first field effect transistor is greater than a second preset time.
S107: if yes, clearing the turn-off duration of the first field effect transistor, and returning to the step S103 to judge whether the voltage is continuously less than a first reference voltage and greater than a second reference voltage within a first preset time; or judging whether the voltage is greater than the first reference voltage.
Wherein the first reference voltage is greater than the second reference voltage.
Further, based on the above embodiment of the present invention, the overcurrent protection method further includes:
s108: and when the voltage is less than the second reference voltage, controlling the first field effect transistor to be in a conducting state.
Further, based on the above embodiment of the present invention, the overcurrent protection method further includes:
s109, when the turn-off duration time of the first field effect transistor is less than the second preset time, controlling the first field effect transistor to be in a turn-off state.
It should be noted that the principle of the over-current protection method provided by the embodiment of the present invention includes, but is not limited to, being applicable to the over-current protection circuit provided by the above-mentioned embodiment of the present invention.
Based on all the above embodiments of the present invention, in another embodiment of the present invention, an electronic device is further provided, where the electronic device includes the overcurrent protection circuit described in the above embodiments.
The over-current protection circuit, the over-current protection method and the electronic device provided by the invention are described in detail, specific examples are applied in the description to explain the principle and the implementation mode of the invention, and the description of the embodiments is only used for helping to understand the method and the core idea of the invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
It should be noted that, in the present specification, the embodiments are all described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments may be referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include or include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (12)
1. An overcurrent protection circuit, comprising: the device comprises a first field effect transistor, a driving module, a conversion module, a first comparison module, a second comparison module, a continuous output module, a signal adjusting module and a holding module;
the first end of the first field effect transistor is connected with the input end, the second end of the first field effect transistor is connected with the output end, and the control end of the first field effect transistor is connected with the output end of the driving module;
the driving module is used for controlling the conduction state of the first field effect transistor;
the input end of the conversion module is connected with the second end of the first field effect transistor, and the output end of the conversion module is respectively connected with the first input end of the first comparison module and the first input end of the second comparison module, and is used for collecting current flowing through the first field effect transistor and converting the current into voltage;
a second input end of the first comparison module is connected with a first reference voltage input end, a second input end of the second comparison module is connected with a second reference voltage input end, and the first reference voltage is greater than the second reference voltage;
the first comparison module is used for judging the magnitude relation between the voltage and the first reference voltage, and the second comparison module is used for judging the magnitude relation between the voltage and the second reference voltage;
the output end of the first comparison module is connected with the first input end of the signal adjustment module;
the output end of the second comparison module is connected with the input end of the continuous output module;
the output end of the continuous output module is connected with the second input end of the signal adjusting module;
the output end of the signal adjusting module is connected with the input end of the maintaining module;
the input end of the holding module is connected with the input end of the driving module;
when the voltage is continuously less than the first reference voltage and greater than a second reference voltage within a first preset time, the continuous output module is used for continuously outputting a high level signal, the signal adjusting module is used for outputting a high level signal, the holding module is used for continuously outputting a low level signal within a second preset time, and the driving module outputs a low level signal to control the first field effect transistor to be in a turn-off state within the second preset time;
and/or the presence of a gas in the gas,
when the voltage is greater than the first reference voltage, the signal adjusting module is used for outputting a high level signal, the holding module is used for continuously outputting a low level signal within a second preset time, and the driving module outputs a low level signal so as to control the first field effect transistor to be in a turn-off state within the second preset time.
2. The overcurrent protection circuit of claim 1, wherein the first comparison module is a first comparator;
the inverting input end of the first comparator is connected with the output end of the conversion module, the non-inverting input end of the first comparator is connected with the first reference voltage input end, and the output end of the first comparator is connected with the first input end of the signal adjusting module.
3. The overcurrent protection circuit of claim 1, wherein the second comparison module is a second comparator;
the inverting input end of the second comparator is connected with the output end of the conversion module, the non-inverting input end of the second comparator is connected with the second reference voltage input end, and the output end of the second comparator is connected with the input end of the continuous output module.
4. The overcurrent protection circuit of claim 1, wherein the persistent output module comprises: the second field effect transistor, the resistor, the third field effect transistor and the capacitor are connected;
the first end of the second field effect transistor is connected with the voltage input end, and the second end of the second field effect transistor is connected with the first end of the resistor;
the second end of the resistor is respectively connected with the first end of the third field effect transistor and the first end of the capacitor, and the connection node of the resistor and the capacitor is used as the output end of the continuous output module;
the second end of the capacitor is connected with the second end of the third field effect transistor, and the connection node is grounded;
and the control end of the second field effect transistor is connected with the control end of the third field effect transistor, and the connection node is used as the input end of the continuous output module.
5. The overcurrent protection circuit of claim 4, wherein the second FET is a P-type FET and the third FET is an N-type FET.
6. The over-current protection circuit of claim 1, wherein the signal conditioning module comprises: first to third inverters and an OR gate logic unit;
the input end of the first phase inverter is connected with the output end of the continuous output module, and the output end of the first phase inverter is connected with the input end of the second phase inverter;
the output end of the second inverter is connected with the first input end of the OR gate logic unit;
the input end of the third inverter is connected with the output end of the second comparison module, and the output end of the third inverter is connected with the second input end of the OR gate logic unit;
and the output end of the OR gate logic unit is used as the output end of the signal adjusting module.
7. The overcurrent protection circuit of claim 1, wherein the retention module comprises: a timing unit and an OR-NOT gate logic unit;
the input end of the timing unit is connected with the first input end of the NOR gate logic unit, and the connection node is used as the input end of the holding module;
the output end of the timing unit is connected with the second input end of the NOR gate logic unit;
and the output end of the NOR gate logic unit is used as the output end of the holding module.
8. The overcurrent protection circuit of claim 1, wherein the first fet is an N-type fet.
9. An overcurrent protection method, characterized in that the overcurrent protection method comprises:
collecting current flowing through a first field effect transistor;
converting the current to a voltage;
judging whether the voltage is continuously smaller than a first reference voltage and larger than a second reference voltage within a first preset time; or judging whether the voltage is greater than the first reference voltage;
if yes, turning off the first field effect transistor;
obtaining the turn-off duration of the first field effect transistor;
judging whether the turn-off duration time of the first field effect transistor is greater than a second preset time or not;
if so, clearing the turn-off duration of the first field effect transistor, and returning to judge whether the voltage is continuously less than a first reference voltage and greater than a second reference voltage within a first preset time; or judging whether the voltage is greater than the first reference voltage;
wherein the first reference voltage is greater than the second reference voltage.
10. The overcurrent protection method according to claim 9, wherein the first fet is controlled to be in a conducting state when the voltage is less than the second reference voltage.
11. The overcurrent protection method according to claim 9, wherein the first fet is controlled to be in an off state when the off duration of the first fet is less than the second preset time.
12. An electronic device, characterized in that the electronic device comprises the overcurrent protection circuit of any one of claims 1 to 8.
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