CN115664398B

CN115664398B - Overcurrent protection system and method of silicon carbide driver, driver and driving system

Info

Publication number: CN115664398B
Application number: CN202211445212.1A
Authority: CN
Inventors: 朱宁
Original assignee: Hanxin Microelectronics Wuxi Co ltd
Current assignee: Hanxin Microelectronics Wuxi Co ltd
Priority date: 2022-11-18
Filing date: 2022-11-18
Publication date: 2023-04-07
Anticipated expiration: 2042-11-18
Also published as: CN115664398A

Abstract

The application provides an overcurrent protection system and method of a silicon carbide driver, the driver and a driving system. The overcurrent protection system comprises an overcurrent protection module with an overcurrent protection comparator, a voltage change rate detection module and a logic control module. The over-current protection module provides a plurality of different over-current protection levels over time during a conduction period of the main MOSFET, including a first over-current protection level during a first time period of a conduction front. The overcurrent protection comparator receives a current detection signal flowing through the drain of the main MOSFET and an overcurrent protection level at a corresponding time. The logic control module generates a control signal to the gate of the main MOSFET based on the output of the over-current protection comparator. The overcurrent protection module dynamically adjusts the first overcurrent protection level based on the change rate of the drain-source voltage detected by the voltage change rate detection module to provide an adaptive first overcurrent protection level according to the change rate of the drain-source voltage.

Description

Overcurrent protection system and method of silicon carbide driver, driver and driving system

Technical Field

The embodiment of the application relates to the technical field of switch driving, in particular to an overcurrent protection system and method of a silicon carbide driver, a driver and a driving system.

Background

Wide Bandgap (WBG) devices are increasingly being used in power conversion systems, especially for higher power applications. SiC (Silicon carbide) and GaN (Gallium Nitride) MOSFETs (Metal-Oxide-Semiconductor Field-Effect transistors) are commercial solutions. Although they have better characteristics than conventional silicon devices, they have problems with different characteristics that need to be addressed in system design. SiC is widely used in industrial applications such as renewable energy, inverters, converters, battery chargers, and electric vehicle applications.

The SiCMOSFET has higher switching frequency capability, higher operating temperature, higher voltage rating, and lower losses. However, there are also some challenges associated with SiCMOSFET. For example, lower threshold voltages, less robustness under short circuit conditions, higher voltage and current rates of change leading to higher switching oscillations and overshoot. SiC MOSFETs have special driving requirements: 1. a higher driving voltage is required to reduce the on-resistance; 2. the gate turn-on threshold voltage is relatively low (2V) compared to Silicon (Si) devices with similar voltage ratings. Since SiC MOSFETs have a high switching frequency and less switching charge, di/dt (the rate of change of the drain current) and dv/dt (the rate of change of the drain-source voltage) vary very strongly. Therefore, the ringing phenomenon associated with the switch is severe. Further, siC MOSFETs have poor capability of sustaining under short circuit conditions, for example, siC MOSFETs can sustain only 2us (microseconds). Therefore, protection of SiC MOSFETs is essential for safe operation.

There is a trade-off problem with Over Current Protection (OCP) trigger time: if the trigger is too fast, the original switch oscillation can be detected and the operation turned off; if waiting too long to trigger protection, real damage may result if there is an abnormal condition. Further, since the characteristic specifications of SiC MOSFETs vary from device to device, they depend on their rated current, rated voltage, manufacturing process, and supplier. Therefore, a well-adjusted timing sequence can be applied to one device, but it is difficult to adapt to more devices with different design specifications.

Disclosure of Invention

An object of the embodiments of the present application is to provide an overcurrent protection system and method for a silicon carbide driver, a driver, and a driving system, which can implement overcurrent protection for the on-time of a main MOSFET and avoid false triggering caused by current ringing.

One aspect of the embodiments of the present application provides an overcurrent protection system for a silicon carbide driver. The overcurrent protection system comprises an overcurrent protection module and a logic control module. The over-current protection module is used for providing a plurality of different over-current protection levels which change along with time in the conduction period of the main MOSFET and comprises an over-current protection comparator. The overcurrent protection comparator is provided with a first input end, a second input end and an output end, the first input end of the overcurrent protection comparator is used for receiving a current detection signal flowing through the drain electrode of the main MOSFET, and the second input end receives the overcurrent protection level at the corresponding time and compares the current detection signal with the overcurrent protection level. The logic control module is electrically connected with the output end of the overcurrent protection comparator and is connected to the grid electrode of the main MOSFET. Wherein the logic control module generates a corresponding control signal to the gate of the main MOSFET based on the output of the over-current protection comparator. The plurality of different over-current protection levels over time comprises a first over-current protection level during a first time period leading an on-cycle of the main MOSFET, the over-current protection module being operable to provide the first over-current protection level during the first time period. The over-current protection system of the silicon carbide driver further comprises a voltage change rate detection module for detecting the change rate of the drain-source voltage of the main MOSFET, wherein the output end of the voltage change rate detection module is connected to the over-current protection module, and the over-current protection module dynamically adjusts the first over-current protection level based on the change rate of the drain-source voltage so as to provide the adaptive first over-current protection level according to the change rate of the drain-source voltage.

Another aspect of an embodiment of the present application also provides a silicon carbide driver. The silicon carbide driver comprises the overcurrent protection system of the silicon carbide driver, the silicon carbide driver is provided with a control pin and a current detection pin, the control pin is used for controlling the grid electrode of the main MOSFET, the output end of the logic control module is connected to the control pin, the current detection pin is used for obtaining a current detection signal flowing through the drain electrode of the main MOSFET, and the first input end of the overcurrent protection comparator is connected to the current detection pin.

Yet another aspect of an embodiment of the present application also provides a drive system. The driving system comprises the silicon carbide driver, a main MOSFET and a current detection module, wherein a control pin of the silicon carbide driver is connected to a grid electrode of the main MOSFET, the current detection module is used for detecting drain current of the main MOSFET and outputting a current detection signal, and a current detection pin of the silicon carbide driver is connected to the current detection module.

Yet another aspect of the embodiments of the present application provides an over-current protection method for a silicon carbide driver. The method comprises the following steps: receiving a current detection signal flowing through a drain of the main MOSFET; providing a first overcurrent protection level in a first time period of a conduction period of the main MOSFET, and determining whether to trigger a first overcurrent protection control on a gate of the main MOSFET based on a comparison result of the received current detection signal and the first overcurrent protection level; and providing a second overcurrent protection level in a second time period of the conduction period of the main MOSFET, and determining whether to trigger a second overcurrent protection control on the gate of the main MOSFET based on a comparison result of the received current detection signal and the second overcurrent protection level. Wherein the second time period is after the first time period, and the second overcurrent protection level is less than the first overcurrent protection level. The overcurrent protection method further comprises the following steps: receiving a detected rate of change of a drain-source voltage of the main MOSFET; and dynamically adjusting the first over-current protection level based on the rate of change of the drain-source voltage of the main MOSFET to provide the adaptive first over-current protection level according to the rate of change of the drain-source voltage of the main MOSFET.

The over-current protection system and the over-current protection method for the silicon carbide driver, the silicon carbide driver and the driving system in one or more embodiments of the present application can perform effective over-current protection on the main MOSFET in the on-period, and can also effectively avoid false triggering caused by current ringing.

Drawings

Fig. 1 is an internal schematic block diagram of a silicon carbide driver according to an embodiment of the present application.

Fig. 2 is an internal schematic diagram of an overcurrent protection module and a current detection module according to an embodiment of the present application.

FIG. 3 is a diagram illustrating dynamic adjustment of the first OCP level with dv/dt according to one embodiment of the present application.

Fig. 4 is a diagram illustrating a ringing dependent switching waveform with two stages of over-current protection according to an embodiment of the present application.

Fig. 5 is a flowchart of an over-current protection method for a silicon carbide driver according to an embodiment of the present application.

Detailed Description

Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the exemplary embodiments below do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus consistent with certain aspects of the present application, as detailed in the appended claims.

The terminology used in the embodiments of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. Unless otherwise defined, technical or scientific terms used in the embodiments of the present application should have the ordinary meaning as understood by those having ordinary skill in the art to which the present application belongs. The use of "first," "second," and similar terms in the description and claims of this application do not denote any order, quantity, or importance, but rather the terms are used to distinguish one element from another. Also, the use of the terms a, an, etc. do not denote a limitation of quantity, but rather denote the presence of at least one. "plurality" or "a number" means two or more. Unless otherwise indicated, "front", "rear", "lower" and/or "upper" and the like are for convenience of description and are not limited to one position or one spatial orientation. The word "comprising" or "comprises", and the like, means that the element or item listed as preceding "comprising" or "includes" covers the element or item listed as following "comprising" or "includes" and its equivalents, and does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. As used in this specification and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

It should be noted that, in order to better embody the innovation of the present application, only the structural features that are relevant to the creation point of the present application are shown and described in the drawings and the description thereof, and other structural features that are not relevant or existing structural features are omitted or outlined. However, this does not mean that the silicon carbide driver and driving system of the embodiments of the present application necessarily does not include these other structural features, and those structural features necessary for implementing the basic functions of gate driving and the like may still be included in the silicon carbide driver and driving system of the embodiments of the present application.

One embodiment of the present application provides a silicon carbide Driver (SiC Driver) 3. Fig. 1 discloses an internal schematic block diagram of a silicon carbide driver 3 according to an embodiment of the present application. As shown in fig. 1, a silicon carbide driver 3 of one embodiment of the present application may be used to drive an external main MOSFET (e.g., siC MOSFET) Q1, which includes an over-current protection (OCP) system 10 of the silicon carbide driver. The overcurrent protection system 10 of the silicon carbide driver in the embodiment of the application can realize overcurrent protection of the conduction time of the main MOSFET Q1, and can avoid false triggering caused by current ringing.

The over-current protection system 10 of the silicon carbide driver of one embodiment of the present application includes an over-current protection (OCP) module 12 and a logic control module 11. The over-current protection module 12 can provide a plurality of different over-current protection levels that vary over time during the conduction period of the main MOSFET Q1. The overcurrent protection module 12 is connected to the logic control module 11, and the logic control module 11 is connected to the gate g of the main MOSFET Q1.

Fig. 2 discloses an internal schematic diagram of the overcurrent protection module 12 according to an embodiment of the present application. Referring to fig. 1 and 2 in combination, the overcurrent protection module 12 of an embodiment of the present application includes an overcurrent protection (OCP) comparator 121. The over-current protection comparator 121 has a first input terminal, a second input terminal, and an output terminal. A first input terminal (e.g., a non-inverting input terminal) of the over-current protection comparator 121 may receive the current detection signal I flowing through the drain d of the main MOSFET Q1 _sense The second input terminal (e.g. negative phase input terminal) can receive the overcurrent protection level at the corresponding time and detect the current signal I _sense And comparing with the overcurrent protection level at the corresponding time.

When the current detection signal I received by the first input terminal of the over-current protection comparator 121 _sense When the overcurrent protection level received by the second input terminal at the corresponding time is higher, the output of the overcurrent protection comparator 121 is 1. Otherwise, the output of the over-current protection comparator 121 is 0.

The logic control module 11 is electrically connected to the output end of the over-current protection comparator 121, and the logic control module 11 can generate a corresponding control signal to the gate g of the main MOSFET Q1 based on the output of the over-current protection comparator 121.

The plurality of different over-current protection levels over time may include a first over-current protection (OCP) level during a first time period t1 leading the conduction cycle of the main MOSFET Q1. With continued reference to fig. 1, the overcurrent protection system 10 of the silicon carbide driver of the present application may also include a voltage rate of change (dv/dt) detection module 13. The silicon carbide driver 3 has a voltage sense pin VS which may be used to receive the drain-source voltage Vds of the main MOSFET Q1, to which the dv/dt detection module 13 is connected. The dv/dt detection module 13 may detect the rate of change dv/dt of the drain-source voltage of the main MOSFET Q1 based on the received drain-source voltage Vds of the main MOSFET Q1. The output end of the dv/dt detection module 13 is connected to the overcurrent protection module 12. The overcurrent protection module 12 can dynamically adjust the first OCP level based on the rate of change dv/dt of the drain-source voltage, such that the overcurrent protection module 12 can provide an adaptive first OCP level based on the rate of change dv/dt of the drain-source voltage.

FIG. 3 illustrates an embodiment of the present application in which the first OCP level is dynamically adjusted with dv/dt. As shown in fig. 3, the first OCP level may vary from, for example, 120% to 150% of the second OCP level, depending on the value of the rate of change dv/dt of the drain-source voltage. A higher rate of change dv/dt of the drain-source voltage requires a higher first OCP level. The first OCP level is positively correlated with the rate of change dv/dt of the drain-source voltage of the main MOSFET Q1. The adaptive adjustment of the first OCP level according to the magnitude of the rate of change dv/dt of the drain-source voltage can be implemented in an analog manner or in a digital manner.

If the rate of change dv/dt of the drain-source voltage is sufficiently high, for example, when the rate of change dv/dt of the drain-source voltage exceeds a predetermined threshold, indicating that the main MOSFET Q1 is turning on, the over-current protection module 12 may be activated to enable the over-current protection function.

As shown in fig. 1, the sic driver 3 of the embodiment of the present application further has a control pin Ctrl and a current detection pin CS-, the control pin Ctrl can control the gate g of the main MOSFET Q1, and the output end of the logic control module 11 is connected to the control pin Ctrl. The current detection pin CS-can obtain the current detection signal I flowing through the drain d of the main MOSFET Q1 _sense A first input terminal of the over-current protection comparator 121 is connected to the current detection pin CS-.

As shown in fig. 2, in some embodiments, the second input terminal of the over-current protection comparator 121 may be selectively connected to one of the plurality of current branches. The plurality of current branches may output a corresponding plurality of different over-current protection (OCP) levels. Each current branch comprises a switch. The overcurrent protection module 12 may trigger the switches in the corresponding current branches to be closed and the switches in the other current branches to be opened based on the change of time, so that overcurrent protection levels at the corresponding time may be output.

In some embodiments, the plurality of different over-current protection levels over time may include, for example, over-current protection levels of two steps, and further include a second over-current protection (OCP) level during the second time period t 2. Wherein the second time period t2 is after the first time period t1, and the second OCP level is less than the first OCP level. The over-current protection module 12 may provide a first OCP level for a first time period t1 and a second OCP level for a second time period t 2.

The first time period t1 may be referred to as a primary overcurrent protection clock of the main MOSFET Q1, and the second time period t2 may be referred to as a secondary overcurrent protection clock of the main MOSFET Q1. For example, the first time period t1 may vary between 10-100ns (nanoseconds), depending on the customer's choice. The second period t2 does not need to be long in order to maintain the current protection function. For example, the second time period t2 may be 100ns to 2us (microseconds) according to the selection of the customer.

The logic control module 11 of the present application can perform a first overcurrent protection control on the gate g of the main MOSFET Q1 when the overcurrent protection module 12 provides the first OCP level; and performing second overcurrent protection control on the gate g of the main MOSFET Q1 when the overcurrent protection module 12 provides a second OCP level, wherein the first overcurrent protection control is different from the second overcurrent protection control.

In some embodiments, during the first time period t1, when the current detection signal I _sense When the level is higher than the first OCP level, the logic control module 11 may perform a first overcurrent protection control on the gate g of the main MOSFET Q1, and the logic control module 11 will immediately turn off the gate driving signal of the main MOSFET Q1.

In some embodiments, during the second time period t2, when the current detection signal I _sense When the level is higher than the second OCP level, the logic control module 11 may perform a second overcurrent protection control on the gate g of the main MOSFET Q1, where the logic control module 11 performs one of the following operations:

1. turning off the gate driving signal of the main MOSFET Q1 briefly and automatically restoring the gate driving signal of the main MOSFET Q1 after a predetermined time;

2. turning off the gate driving signal of the main MOSFET Q1 after a predetermined number of overcurrent protections have been accumulated;

3. the gate drive signal of the main MOSFET Q1 is turned off during the current switching period.

The second overcurrent protection control is not limited to this, and the application is different and the selection of the second overcurrent protection control is different. However, the second overcurrent protection control is much milder than the first overcurrent protection control.

As shown in fig. 2, in some embodiments, the plurality of current branches may include a first current branch 122 for outputting a first OCP level and a second current branch 123 for outputting a second OCP level. The overcurrent protection module 12 may trigger the switch K1 in the first current branch 122 outputting the first OCP level to be closed and the switch K2 in the second current branch 123 outputting the second OCP level to be in an open state in the first time period t1, so that the first OCP level may be provided to the second input terminal of the overcurrent protection comparator 121 in the first time period t 1. During the second time period t2, the over-current protection module 12 may trigger the switch K2 in the second current branch 123 outputting the second OCP level to be closed, and the switch K1 in the first current branch 122 outputting the first OCP level to be in an open state (for example, an arrow at the switch K1 in fig. 2 indicates open, and an arrow at the switch K2 indicates closed). Thus, the second OCP level may be provided to the second input terminal of the over-current protection comparator 121 during the second period t 2.

In some embodiments, the overcurrent protection module 12 of the present application further includes a first timer 124 and a second timer 125. The first timer 124 may count the first time period t1, and the second timer 125 may count the second time period t 2. Accordingly, the first timer 124 and the second timer 125 are associated with the first OCP level and the second OCP level, respectively, and thus, different levels of OCP levels may be provided for different periods of time.

In some embodiments, the over-current protection module 12 may start the first timer 124 to start timing the first time period t1 when the gate driving signal of the main MOSFET Q1 changes from a low level to a high level. The over-current protection module 12 may start the second timer 125 when the first timer 124 times out the first time period t1, and start to time the second time period t 2.

With continued reference to fig. 2, during the second time period t2 when the main MOSFET Q1 is turned on, the current detection signal I received by the first input terminal of the over-current protection comparator 121 _sense When the second OCP level received by the second input terminal is higher, the output of the over-current protection comparator 121 is 1; when the overcurrent protection comparator 121 receives the current detection signal I at the first input terminal _sense And when the second OCP level received by the second input terminal is lower, the output of the over-current protection comparator 121 is 0.

In order to prevent the output of the over-current protection comparator 121 from constantly flipping between 0 and 1 during the second time period t2, in some embodiments, the over-current protection module 12 of the present application may further include an over-current protection (OCP) triggerAnd a lock logic module 126. The OCP trigger lock logic module 126 may lock the output of the over-current protection comparator 121 to the initial result for a second time period t 2. Thus, the drain current I of the main MOSFET Q1 due to the initial switching behavior can be avoided _ds The waveform of (1) oscillates.

For example, during the second time period t2 when the main MOSFET Q1 is turned on, the current detection signal I received by the first input terminal of the over-current protection comparator 121 _sense When the second OCP level received by the second input terminal is higher, the output of the over-current protection comparator 121 is 1, at this time, the OCP trigger locking logic module 126 locks the output of the over-current protection comparator 121, so that, during the second time period t2 when the main MOSFET Q1 is turned on, once the output of the over-current protection comparator 121 is 1, the OCP trigger locking logic module 126 always locks the output of the over-current protection comparator 121 at 1. Even if the current detection signal I received at the first input terminal of the over-current protection comparator 121 occurs at a subsequent time within the second period t2 _sense Below the second OCP level received at the second input, the output of the over-current protection comparator 121 is still 1.

After reaching the second time period t2, the OCP level may select a third OCP level, which may be lower than the second OCP level, or may maintain the same value as the second OCP level. This is not limited by the present application.

The OCP trigger lock logic module 126 may also release the lock on the output of the over-current protection comparator 121 after the second time period t2, and the over-current protection comparator 121 may detect the current I according to the current detection signal _sense And the magnitude of the overcurrent protection level to output 0 or 1, and accordingly trigger the overcurrent protection function to be turned on or off.

Fig. 4 discloses a ringing dependent switching waveform diagram employing two-stage overcurrent protection according to an embodiment of the present application. As shown in FIG. 4, during a first time period t1 of the conduction front edge of the main MOSFET Q1, the drain current I of the main MOSFET Q1 _ds Has a large oscillation, and therefore, provides a relatively high first OCP level during the first time period t1, the rate of change dv/dt of the drain-source voltage of the main MOSFET Q1 is also large;during the second time period t2 of the conduction front edge of the main MOSFET Q1, the drain current I of the main MOSFET Q1 _ds Will switch from a first, higher OCP level to a second, relatively lower OCP level during the second time period t2 into, the rate of change dv/dt of the drain-source voltage of the main MOSFET Q1 is also relatively reduced.

The over-current protection system 10 of the silicon carbide driver according to the embodiment of the present application provides the first OCP level in the first time period t1 of the leading edge of the switching cycle of the main MOSFET Q1, and provides the second OCP level in the second time period t2 of the leading edge of the switching cycle, so that two-stage over-current protection can be provided for the main MOSFET Q1 in the leading cycle of the main MOSFET Q1, and meanwhile, false triggering caused by current ringing can be avoided.

The silicon carbide driver 3 and the overcurrent protection system 10 thereof according to the embodiment of the present application can perform effective overcurrent protection on the main MOSFET Q1 during the on period, and can effectively avoid false triggering caused by current ringing.

The above description is schematically described by taking an example of an overcurrent protection level of two gears in the overcurrent protection system 10 of the silicon carbide driver according to the embodiment of the present application. However, the plurality of different overcurrent protection levels over time provided by the embodiment of the present application are not limited to the OCP levels of two gears. In other embodiments of the present application, the plurality of different overcurrent protection levels over time may also be a continuous linear or curvilinear OCP level.

Of course, the over-current protection system 10 of the silicon carbide driver according to the embodiment of the present application can implement the operation of the protection device under the condition that the circuit is actually faulty by using the over-current protection levels of two gears, and can also adapt to the faster switching operation (higher dv/dt) change. Moreover, the control is simple and is easier to realize. The first OCP level and the second OCP level that this application embodiment provided exist simultaneously and can guarantee to have concurrently the protection of the extreme condition and the protection to work anomaly.

Another embodiment of the present application further provides a drive system. The drive system includes a silicon carbide driver 3, a main MOSFET Q1, and a current sense module 2 (shown in fig. 2) as described above. The main MOSFET Q1 and the current detection module 2 may be located in a Switching Device (Switching Device) chip. As shown in fig. 1, the control pin Ctrl of the silicon carbide driver 3 is connected to the gate g of the main MOSFET Q1.

Fig. 2 discloses an internal structure diagram of a current detection module 2. As shown in FIG. 2, the current detection module 2 can be used to detect the drain current I of the main MOSFET Q1 _ds And outputs a current detection signal I _sense And a current detection pin CS-of the silicon carbide driver 3 is connected to the current detection module 2.

In some embodiments, the current detection module 2 may include a detection MOSFET Q2 and a detection resistor R _sense . The gate g of the detection MOSFET Q2 is electrically connected to the gate g of the main MOSFET Q1, the drain d of the detection MOSFET Q2 is electrically connected to the drain d of the main MOSFET Q1, and the source s of the detection MOSFET Q2 is electrically connected to the source s of the main MOSFET Q1. The sense MOSFET Q2 is a MOSFET that scales down the main MOSFET Q1. Since the current flowing through the main MOSFET Q1 will typically be large, the drain current I of the main MOSFET Q1 can be sensed by sensing the MOSFET Q2 to be relatively small _ds Is reduced. The drain current of the sense MOSFET Q2 has a drain current I equal to that of the main MOSFET Q1 _ds A consistent change.

Detecting resistance R _sense Connected in series between the source s and drain d of the sense MOSFET Q2. Wherein, the detection resistor R _sense The terminal connected to the sense MOSFET Q2 is further connected to a first input terminal of an overcurrent protection comparator 121. Detecting resistance R _sense Voltage at both ends is V _sense Therefore, based on the detection resistance R _sense Voltage V across _sense And a detection resistor R _sense Can obtain a current detection signal I _sense 。

However, the current detection module 2 of the present application is not limited to the manner shown in fig. 2. The current detection module 2 may take other forms. For example, in other embodiments, the current detection module 2 may also include a detection resistor with a smaller resistance value directly connected between the source s of the detection MOSFET Q2 and the ground, which may also achieve the purpose of current detection. The drive system of the present application is not limited to a specific current detection manner.

The driving system of the embodiment of the present application has substantially similar advantageous technical effects to the silicon carbide driver 3 described above, and therefore, the description thereof is omitted here.

Yet another embodiment of the present application further provides an overcurrent protection method for a silicon carbide driver. Fig. 5 discloses a flow chart of an over-current protection method of a silicon carbide driver according to an embodiment of the present application. As shown in fig. 5, the method for overcurrent protection of a silicon carbide driver according to an embodiment of the present application may include steps S11 to S15.

In step S11, a current detection signal I flowing through the drain d of the main MOSFET Q1 is received _sense 。

In step S12, the first OCP level is provided for the first period t1 of the on period of the main MOSFET Q1, and then the process proceeds to step S13.

The overcurrent protection method for the silicon carbide driver of the present application may further include step S21 and step S22. In step S21, the detected rate of change dv/dt of the drain-source voltage of the main MOSFET Q1 may be received. In step S22, the first OCP level may be dynamically adjusted based on the rate of change dv/dt of the drain-source voltage of the main MOSFET Q1 received in step S21, such that an adaptive first OCP level may be provided in step S12 according to the rate of change dv/dt of the drain-source voltage of the main MOSFET Q1.

In step S13, the current detection signal I is received based on step S11 _sense The comparison result with the first OCP level provided in step S12 determines whether to trigger the first overcurrent protection control for the gate g of the main MOSFET Q1.

In some embodiments, the current detection signal I may be _sense The overcurrent protection comparator 121 inputs the current detection signal I to a first input terminal (e.g., a positive phase input terminal) and a second input terminal (e.g., a negative phase input terminal) of the overcurrent protection comparator 121, respectively, together with the first OCP level _sense Compares with the first OCP level and determines based on the output of the over-current protection comparator 121Whether or not to trigger the first overcurrent protection control on the gate g of the main MOSFET Q1.

During a first period t1 of the on-period of the main MOSFET Q1, when the current detection signal I _sense If the level is higher than the first OCP level, the output of the over-current protection comparator 121 is 1, and at this time, the first over-current protection control is performed on the gate g of the main MOSFET Q1. During the first period t1 of the on-period of the main MOSFET Q1, when the current detection signal I _sense When the level is lower than the first OCP level, the output of the over-current protection comparator 121 is 0, and at this time, no processing is performed, and the gate g of the main MOSFET Q1 does not need to be over-current protected.

In one embodiment, the first overcurrent protection control includes immediately turning off the gate drive signal of the main MOSFET Q1.

After the first period t1 of the on-cycle of the main MOSFET Q1 is ended, the process proceeds to the second period t2 of the on-cycle of the main MOSFET Q1, and the process proceeds to step S14.

In step S14, a second overcurrent protection level is provided for a second period t2 of the on-period of the main MOSFET Q1, and then the process proceeds to step S15. And the second overcurrent protection level is less than the first overcurrent protection level.

In step S15, the current detection signal I received in step S11 is used as a reference _sense The result of comparison with the second overcurrent protection level provided in step S14 determines whether or not to trigger the second overcurrent protection control for the gate g of the main MOSFET Q1.

In some embodiments, the current detection signal I may be _sense The overcurrent protection comparator 121 inputs the current detection signal I to a first input terminal (e.g., positive phase input terminal) and a second input terminal (e.g., negative phase input terminal) of the overcurrent protection comparator 121, respectively, together with the second OCP level _sense Is compared with the second OCP level and determines whether to trigger a second overcurrent protection control for the gate g of the main MOSFET Q1 based on the output of the overcurrent protection comparator 121.

During a second time period t2 of the on-period of the main MOSFET Q1, when the current detection signal I _sense When the level is higher than the second OCP level, the output of the over-current protection comparator 121 is 1, and at this time, the level is higher than the second OCP levelThe second overcurrent protection control is performed on the gate g of the main MOSFET Q1. During a second time period t2 of the on-period of the main MOSFET Q1, when the current detection signal I _sense When the level is lower than the second OCP level, the output of the over-current protection comparator 121 is 0, and at this time, no processing is performed, and the gate g of the main MOSFET Q1 does not need to be over-current protected.

The second overcurrent protection control may employ a periodic by cycle control, which is relatively much relaxed with respect to the first overcurrent protection control. In some embodiments, the second over-current protection control may include, for example but not limited to, one of the following:

The specific operation of the second overcurrent protection control may be selected according to the actual application.

In order to prevent the output of the over-current protection comparator 121 from constantly flipping between 0 and 1 during the second time period t2, in some embodiments, the over-current protection method of the sic driver of the present application may further include the following steps: in the second time period t2, when it is determined for the first time that the second overcurrent protection control needs to be performed on the gate g of the main MOSFET Q1 based on the output of the overcurrent protection comparator 121, the output of the overcurrent protection comparator 121 is latched. After the second time period t2 ends, the lock on the output of the over-current protection comparator 121 may be released.

The over-current protection method of the silicon carbide driver according to the embodiment of the present application has substantially similar beneficial technical effects to the over-current protection system 10 of the silicon carbide driver, and therefore, details thereof are not repeated herein.

The overcurrent protection system and method for the silicon carbide driver, the silicon carbide driver and the driving system provided by the embodiment of the application are described in detail above. The overcurrent protection system and method, the silicon carbide driver and the driving system of the silicon carbide driver according to the embodiments of the present application are described herein by using specific examples, and the above description of the embodiments is only used to help understand the core idea of the present application and is not intended to limit the present application. It should be noted that, for those skilled in the art, without departing from the spirit and principle of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications should also fall within the scope of protection of the appended claims of the present application.

Claims

1. The utility model provides a carborundum driver's overcurrent protection system which characterized in that: it includes:

an overcurrent protection module for providing a plurality of different overcurrent protection levels that vary with time during a conduction period of the main MOSFET, and comprising:

an overcurrent protection comparator having a first input terminal, a second input terminal and an output terminal, the first input terminal of the overcurrent protection comparator being configured to receive a current detection signal flowing through a drain of the main MOSFET, the second input terminal receiving the overcurrent protection level at a corresponding time and comparing the current detection signal with the overcurrent protection level; and

a logic control module electrically connected to the output terminal of the over-current protection comparator and connected to the gate of the main MOSFET, wherein the logic control module generates a corresponding control signal to the gate of the main MOSFET based on the output of the over-current protection comparator,

the plurality of different over-current protection levels over time includes a first over-current protection level during a first time period and a second over-current protection level during a second time period leading an on-cycle front edge of the main MOSFET, the over-current protection module is configured to provide the first over-current protection level during the first time period and the second over-current protection level during the second time period, wherein the second time period is subsequent to the first time period, and the second over-current protection level is less than the first over-current protection level,

the overcurrent protection module further comprises:

a first timer for timing the first time period; and

a second timer for timing the second period of time,

the overcurrent protection system of the silicon carbide driver further comprises:

the voltage change rate detection module is used for detecting the change rate of the drain-source electrode voltage of the main MOSFET, the output end of the voltage change rate detection module is connected to the overcurrent protection module, and the overcurrent protection module dynamically adjusts the first overcurrent protection level based on the change rate of the drain-source electrode voltage so as to provide the first overcurrent protection level which is self-adaptive according to the change rate of the drain-source electrode voltage.

2. The silicon carbide driver overcurrent protection system of claim 1, wherein: the second input end of the over-current protection comparator can be selectively connected with one of a plurality of current branches, the plurality of current branches are used for outputting a plurality of different over-current protection levels, each current branch comprises a switch, and the over-current protection module triggers the switch in the corresponding current branch to be closed based on the change of time so as to output the over-current protection level at the corresponding time.

3. The silicon carbide driver overcurrent protection system of claim 2, wherein: the plurality of current branches comprise a first current branch for outputting the first overcurrent protection level and a second current branch for outputting the second overcurrent protection level, wherein the overcurrent protection module is used for triggering the switch in the first current branch for outputting the first overcurrent protection level to be closed in the first time period; and triggering the switch in the second current branch outputting the second overcurrent protection level to be closed in the second time period.

4. The silicon carbide driver overcurrent protection system of claim 1, wherein: the overcurrent protection module is used for starting the first timer when the grid driving signal of the main MOSFET changes from low level to high level and starting the second timer when the first time period is over.

5. The silicon carbide driver overcurrent protection system of claim 1, wherein: the overcurrent protection module further comprises:

and the overcurrent protection trigger locking logic module is used for locking the output of the overcurrent protection comparator at an initial result in the second time period.

6. The silicon carbide driver overcurrent protection system of claim 5, wherein: the overcurrent protection trigger locking logic module is also used for releasing the locking of the output of the overcurrent protection comparator after the second time period.

7. The silicon carbide driver overcurrent protection system of claim 1, wherein: the logic control module is used for carrying out first overcurrent protection control on the grid electrode of the main MOSFET when the overcurrent protection module provides the first overcurrent protection level; and performing second overcurrent protection control on the grid of the main MOSFET when the overcurrent protection module provides the second overcurrent protection level, wherein the first overcurrent protection control is different from the second overcurrent protection control.

8. The silicon carbide driver overcurrent protection system of claim 7, wherein: and in the first time period, when the current detection signal is greater than the first overcurrent protection level, the logic control module executes the first overcurrent protection control, and the logic control module immediately turns off the gate drive signal of the main MOSFET.

9. The silicon carbide driver overcurrent protection system of claim 7, wherein: in the second time period, when the current detection signal is greater than the second overcurrent protection level, the logic control module executes the second overcurrent protection control, and the logic control module performs one of the following operations:

turning off a gate driving signal of the main MOSFET briefly and automatically restoring the gate driving signal of the main MOSFET after a predetermined time;

turning off the gate drive signal of the main MOSFET after a predetermined number of over-current protections have been accumulated;

and turning off the gate drive signal of the main MOSFET in the current switching period.

10. The silicon carbide driver overcurrent protection system of claim 1, wherein: and when the change rate of the drain-source voltage exceeds a preset threshold value, activating the overcurrent protection module.

11. A silicon carbide driver, comprising: an overcurrent protection system comprising a silicon carbide driver as claimed in any one of claims 1 to 10, the silicon carbide driver having a control pin for controlling the gate of the main MOSFET and a current sense pin to which the output of the logic control module is connected, the current sense pin being for deriving a current sense signal through the drain of the main MOSFET, the first input of the overcurrent protection comparator being connected to the current sense pin.

12. A drive system, characterized by: comprising a silicon carbide driver according to claim 11, a main MOSFET having a control pin connected to a gate of the main MOSFET, and a current sense module for sensing a drain current of the main MOSFET and outputting a current sense signal, the current sense pin of the silicon carbide driver being connected to the current sense module.

13. The drive system of claim 12, wherein: the current detection module includes:

the grid electrode of the detection MOSFET is electrically connected with the grid electrode of the main MOSFET, the drain electrode of the detection MOSFET is electrically connected with the drain electrode of the main MOSFET, and the source electrode of the detection MOSFET is electrically connected with the source electrode of the main MOSFET; and

and the detection resistor is connected between the source electrode and the drain electrode of the detection MOSFET in series, and one end of the detection resistor connected with the detection MOSFET is further connected to the first input end of the overcurrent protection comparator.

14. An overcurrent protection method of a silicon carbide driver is characterized in that:

receiving a current detection signal flowing through a drain of the main MOSFET;

providing a first overcurrent protection level during a first time period of a conduction period of the main MOSFET and determining whether to trigger a first overcurrent protection control on a gate of the main MOSFET based on a comparison result of the received current detection signal and the first overcurrent protection level; and

providing a second over-current protection level during a second time period of the conduction cycle of the main MOSFET and determining whether to trigger a second over-current protection control for the gate of the main MOSFET based on a comparison of the received current detection signal and the second over-current protection level,

wherein the second time period is after the first time period, and the second overcurrent protection level is less than the first overcurrent protection level,

the overcurrent protection method further comprises the following steps:

receiving a detected rate of change of a drain-source voltage of the main MOSFET; and

dynamically adjusting the first over current protection level based on a rate of change of a drain-source voltage of the main MOSFET to provide the first over current protection level that is adaptive according to the rate of change of the drain-source voltage of the main MOSFET.

15. The method of overcurrent protection for a silicon carbide driver of claim 14, wherein: the determining whether to trigger a second overcurrent protection control on the gate of the main MOSFET based on the comparison result of the received current detection signal and the second overcurrent protection level includes: inputting the current detection signal and the second overcurrent protection level into an overcurrent protection comparator, respectively, and determining whether to trigger a second overcurrent protection control on the gate of the main MOSFET based on an output of the overcurrent protection comparator, the method further comprising:

and in the second time period, when the second overcurrent protection control needs to be carried out on the grid of the main MOSFET for the first time based on the output of the overcurrent protection comparator, locking the output of the overcurrent protection comparator.

16. The method of overcurrent protection for a silicon carbide driver of claim 15, wherein: further comprising:

the locking of the output of the over-current protection comparator will be released after the second period of time.

17. The method of overcurrent protection for a silicon carbide driver of claim 14, wherein: the determining whether to trigger a first overcurrent protection control on the gate of the main MOSFET based on the comparison of the received current detection signal and the first overcurrent protection level includes:

and in the first time period, when the current detection signal is greater than the first overcurrent protection level, executing first overcurrent protection control on the grid of the main MOSFET, wherein the first overcurrent protection control comprises a grid driving signal for immediately turning off the main MOSFET.

18. The method of overcurrent protection for a silicon carbide driver of claim 14, wherein: the determining whether to trigger a second overcurrent protection control on the gate of the main MOSFET based on the comparison result of the received current detection signal and the second overcurrent protection level includes:

performing the second over-current protection control on the gate of the main MOSFET when the current detection signal is greater than the second over-current protection level during the second time period, the second over-current protection control including one of:

turning off the gate drive signal of the main MOSFET after a predetermined amount of over-current protection has accumulated;

the gate drive signal of the main MOSFET is turned off in the current switching period.