CN110601541A - Control method and controller of full-bridge converter - Google Patents

Control method and controller of full-bridge converter Download PDF

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Publication number
CN110601541A
CN110601541A CN201910852638.0A CN201910852638A CN110601541A CN 110601541 A CN110601541 A CN 110601541A CN 201910852638 A CN201910852638 A CN 201910852638A CN 110601541 A CN110601541 A CN 110601541A
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CN
China
Prior art keywords
driving
power tube
short
voltage drop
full
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CN201910852638.0A
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Chinese (zh)
Inventor
尹向阳
温镓俊
赵志伟
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Shenzhen Nanyun Microelectronic Co Ltd
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Shenzhen Nanyun Microelectronic Co Ltd
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Priority to CN201910852638.0A priority Critical patent/CN110601541A/en
Publication of CN110601541A publication Critical patent/CN110601541A/en
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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
    • H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
    • H02H7/1213—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for DC-DC converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/38—Means for preventing simultaneous conduction of switches
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention discloses a control method and a controller of a full-bridge converter, wherein the conduction voltage drop of a power tube in the full-bridge converter during conduction in each period is detected, and if the conduction voltage drop of the power tube is less than a set short-circuit protection threshold value, the power tube is fully driven; if the conduction voltage drop of the power tube is larger than a set short-circuit protection threshold, carrying out current-limiting driving, if the conduction voltage drop of the power tube is continuously monitored to be larger than the short-circuit protection threshold within the set current-limiting driving timing time, entering a protection mode, stopping starting the power tube, starting to enter the set rest timing time, and after the timing is finished, re-driving the power tube and detecting the conduction voltage drop of the power tube; this is repeated. The invention switches among current-limiting driving, full driving and stopping driving by detecting the conduction voltage drop, realizes the output short-circuit protection of the full-bridge converter and improves the reliability of the full-bridge converter.

Description

Control method and controller of full-bridge converter
Technical Field
The present invention relates to a full-bridge converter, and more particularly, to a method and a controller for controlling a full-bridge converter.
Background
The full-bridge converter has the advantages of simple circuit structure, bidirectional excitation of the transformer during operation and high utilization rate of the magnetic core, so that the converter has the advantages of small volume, high efficiency and good dynamic response, and is widely applied to occasions where low-voltage input, large-current output and input and output need to be electrically isolated.
Compared with a push-pull converter, the primary side of the full-bridge converter adopts a single winding mode, so that the working procedure of the transformer is reduced, and the stress of the power tube is reduced from 2Vinmax to Vinmax. However, for a full-bridge converter of the prior art, as shown in fig. 1, the converter includes a transformer, four primary transistors MN1, MN2, MP1, MP2, secondary rectifier diodes D1, D2, an output capacitor CO and a load resistor RO; the four transistors MN1, MN2, MP1, MP2 are connected in a bridge pair-transistor manner. In the first stage, the primary side is conducted to power transistors MP1 and MN2, MP2 and MN1 are turned off, the transformer is excited in the forward direction, and a secondary side diode D1 is conducted; in the second stage, MN1, MN2, MP1 and MP2 are all turned off; in the third stage, the transistors MP2 and MN1 are switched on, the transistors MP1 and MN2 are switched off, the transformer is excited in a reverse direction, and the secondary diode D2 is switched on; the fourth stage MN1, MN2, MP1, MP2 are all off. The above operation will be repeated thereafter. The operation of fig. 1 is always fully driven, so-called "hard drive", which is exposed to high saturation currents at start-up, and the converter lacks necessary protection circuitry and is less reliable. In addition, the existing full-bridge converter is composed of discrete devices, and occupies a large volume.
Disclosure of Invention
In view of the above, the first technical problem to be solved by the present invention is: the control method of the full-bridge converter is provided, current-limiting driving or full driving or stopping driving of the power tube is achieved according to the conduction condition of the power tube, and reliability of the full-bridge converter is improved.
Accordingly, the second technical problem to be solved by the present invention is: a controller for implementing the above control method is provided.
The technical solution of the present invention for solving the first technical problem is:
a control method of a full-bridge converter comprises the steps that the conduction voltage drop of a power tube in the full-bridge converter during conduction in each period is detected, and if the conduction voltage drop of the power tube is smaller than a set short-circuit protection threshold value, the power tube is fully driven; if the conduction voltage drop of the power tube is larger than the set short-circuit protection threshold, carrying out current-limiting driving, if the conduction voltage drop of the power tube is continuously monitored to be larger than the short-circuit protection threshold within the set current-limiting driving timing time, entering a protection mode, stopping starting the power tube, starting to enter the set rest timing time, after the timing is finished, re-driving the power tube and detecting the conduction voltage drop of the power tube, and repeating the steps.
Furthermore, if the conduction voltage drop is smaller than the short-circuit protection threshold within the set current-limiting driving timing time, the counting is reset, and the state is switched to the full driving state.
Further, the conduction voltage drop of the power tube comprises the conduction voltage drop of the power tube in a starting stage or a steady state; and correspondingly setting a first short-circuit protection threshold value in the starting stage or a second short-circuit protection threshold value in the steady state.
Further, a first driving signal and a second driving signal are adopted to drive and start the transistors in the full-bridge converter respectively, and the conducted voltage drop of the NMOS tubes in the power transistors is detected.
Further, the first short-circuit protection threshold value is determined according to the current limiting value and the conduction internal resistance of the NMOS tube in the starting stage, and the second short-circuit protection threshold value is determined according to the maximum output current value and the conduction internal resistance of the NMOS tube in the stable state; and the first short protection threshold is greater than the second short protection threshold.
Further, the timing of the current-limited drive is determined based on the maximum capacitive load required by the inverter and the amount of heat allowed to build up.
Further, the rest timing time is determined according to the time required by the heat dissipation of the converter after the current-limiting driving timing.
Furthermore, the first driving signal and the second driving signal are complementary pulse driving signals with opposite logics, the time of the effective levels of the two paths of complementary pulse signals is the same, a period of time is set between the two paths of effective levels, and the two paths of effective levels are simultaneously at the invalid level, so that the upper power tube and the lower power tube of the full-bridge converter are prevented from being shared.
The other purpose of the invention is realized by the following technical measures, and the controller of the full-bridge converter comprises a quasi-complementary pulse generation module, a first driving circuit, a second driving circuit, a logic control and timing module and a short-circuit protection detection module; the quasi-complementary quasi-pulse generating module is used for generating two paths of complementary pulse signals and inputting the two paths of complementary pulse signals into the first driving circuit and the second driving circuit respectively; the first driving circuit and the second driving circuit respectively output complementary pulse driving signals to drive and control the bridge type geminate transistors; meanwhile, respectively outputting a driving control signal to a short-circuit protection detection module; the short-circuit protection detection module starts the detection of the conduction voltage drop of the power tube according to a drive control signal from the drive circuit, compares the conduction voltage drop with a set short-circuit protection threshold value, and outputs a detection comparison result to the logic control and timing module; the logic control and timing module carries out current-limiting driving or full driving on the power tube through the driving circuit according to the detection and comparison result of the output short-circuit protection module; or stopping outputting the driving pulse signal through the quasi-complementary pulse generating module.
Furthermore, the driving control signal output by the driving circuit comprises control signals of a starting stage and a steady-state stage, the short-circuit protection detection module is correspondingly provided with protection thresholds of the starting stage and the steady-state stage, and the power tube is correspondingly started to detect and compare the conduction voltage drop of the starting stage or the steady-state stage according to the control signals.
Further, the logic control and timing module performs timing setting on the current-limiting driving state, and performs maintenance of the current-limiting driving mode or switches to full driving according to a timing result.
Further, the logic control and timing module performs timing setting on the stop output driving pulse signal, and performs holding or resetting of the stop driving mode according to a timing result, wherein the resetting means restores the driving output of the complementary pulse signal.
The invention has the following beneficial effects:
1. the invention switches among current-limiting driving, full driving and stopping driving by detecting the conduction voltage drop, realizes the output short-circuit protection of the full-bridge converter and improves the reliability of the full-bridge converter.
2. Corresponding short-circuit protection detection comparison threshold values are different in the starting stage and the full driving, and the device can be prevented from being damaged while the overcurrent points are kept consistent.
Drawings
FIG. 1 is a circuit schematic of a prior art full bridge converter;
FIG. 2 is a schematic block diagram of a first embodiment of the controller of the present invention connected to a full bridge inverter;
FIG. 3 is a schematic diagram of the short circuit protection detection circuit of the present invention;
FIG. 4 is a waveform diagram illustrating the switching of the short-circuit protection threshold of the full-bridge converter according to the present invention;
fig. 5 is a schematic block diagram of a circuit according to a second embodiment of the present invention.
Detailed Description
The invention firstly generates two quasi-complementary pulse signals based on a full-bridge transistor driving mode, and then generates two driving signals through a first driving circuit and a second driving circuit, wherein one driving circuit controls a first transistor MP1 and a fourth transistor MN2, and the other driving circuit controls a second transistor MP2 and a third transistor MN 1. When receiving a starting signal from the driving circuit, the output short-circuit protection detection module starts to compare and detect the conduction voltage drop of the transistor, and carries out current-limiting driving or full driving on the transistor according to the result of detection and comparison.
In order to make the invention more clearly understood, the invention is further described in detail below with reference to the attached drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Example one
Referring to fig. 2, the dotted frame is a schematic block diagram of the controller of the present invention connected to a full-bridge converter, and includes a quasi-complementary pulse generating module, a first driving circuit, a second driving circuit, a logic control and timing module, and an output short-circuit protection detecting module. The quasi-complementary pulse signal generation module comprises three ports; the first drive circuit and the second drive circuit respectively comprise five connecting ports; the output short-circuit protection detection module comprises five connection ports; the logic control and timing module includes four connection ports. In this embodiment, the first transistor MP1 and the second transistor MP2 in the full-bridge inverter are PMOS transistors, and the fourth transistor MN2 and the third transistor MN1 are NMOS transistors.
The connection relation and the function of each port of the module are as follows: the first port and the second port of the quasi-complementary pulse signal generating module for outputting complementary pulse signals are respectively connected with the first ports of the first driving circuit and the second driving circuit for receiving pulse signals; the second port and the third port of the first driving circuit for outputting driving signals are respectively connected with the driving control ends of the first transistor and the fourth transistor, and the second port and the third port of the second driving circuit for outputting driving signals are respectively connected with the driving control ends of the second transistor and the third transistor; the fourth ports of the first driving circuit and the second driving circuit for outputting the driving control signals are respectively connected with the first port and the second port of the output short-circuit protection detection module for receiving the driving control signals; a fourth port of the output short-circuit protection detection module is connected to the conduction voltage drop of a third transistor MN1, and a fifth port is connected to the conduction voltage drop of a fourth transistor MN 2; the third port of the output short-circuit protection detection module for outputting the short-circuit protection judgment signal is connected with the first port of the logic control and timing module for receiving the short-circuit protection judgment signal; the second port and the third port of the logic control and timing module for outputting the driving mode control signal are respectively connected with the fifth port of the first driving circuit and the fifth port of the second driving circuit for receiving the driving mode control signal; and a fourth port of the logic control and timing module for outputting the power tube turn-off signal is connected with a third port of the quasi-complementary pulse signal module for receiving the power tube turn-off signal.
The specific control process is as follows:
the quasi-complementary pulse signal generating module generates a first driving signal and a second driving signal which are provided for the first driving circuit and the second driving circuit respectively, so as to further generate driving voltage for controlling the power tube to be opened. The first driving signal and the second driving signal are complementary pulse driving signals with opposite logics, the time of the effective levels of the two paths of complementary pulse signals is the same, a small time is arranged between the two paths of effective levels and is at an invalid level at the same time, and the upper power tube and the lower power tube of the full-bridge converter are prevented from being in common connection; the short period of time while at the inactive level is determined in particular by the switching frequency.
The first drive circuit and the second drive circuit respectively output drive control signals to the output short-circuit protection detection module, and detection of conduction voltage drop of the power tube is started by receiving the drive control signals. The drive control signal output by the drive circuit is divided into a drive control signal in a starting stage and a drive control signal in a steady-state stage, and a protection threshold V in the starting stage is respectively set in the short-circuit protection detection moduleth1Protection threshold V from steady state phaseth2And detecting and comparing the conduction voltage drop of the starting stage or the steady-state stage of the power tube correspondingly started according to the driving control signal.
The short-circuit protection of the converter is realized by detecting the conducting voltage drop of the third and the fourth transistors (NMOS tubes), and then the following steps are obtained:
short-circuit protection threshold at startup stage:
Vth1＝ILimit·RDS_N1＝VCC-ILimit·RDS_P-(VO+Vd)·Nps
short-circuit protection threshold in steady-state phase:
wherein R isDS_PFor conduction voltage drop of the PMOS transistor on the transistor, ILimitIn order to limit the current value of the driving,Io_maxto output the maximum current value, VdIs the conduction voltage drop of the secondary side rectifier diode, V0To output a voltage, NpsIs the turn ratio, R, of the primary and secondary side transformersDS_N1And RDS_N2And the NMOS tube conduction internal resistances respectively correspond to the startup stage and the steady state stage.
At the starting time, the MOS tube works in a saturation region to limit the gate voltage of the MOS tube, so that the saturation current of the MOS tube is further limited, and in a steady state, the gate voltage of the MOS tube is not limited, and the MOS works in a linear region, so that R existsDS_N1＞＞RDS_N2. If the output voltages corresponding to the output short-circuit protection moments in the startup stage and the steady-state stage are not consistent, the problem of inconsistent over-current points of the design of the startup stage and the steady-state stage exists. Therefore, the output short-circuit protection detection threshold values of the startup and steady-state working stages need to be set to different values; meanwhile, Vth1 needs to be greater than Vth 2. If Vth1≤Vth2Easy to knowThe current value flowing through the power tube when the short-circuit protection is triggered in the steady state stage far exceeds the current limit value in the startup stage, the power tube bears overcurrent impact and generates heat seriously, the power tube cannot be protected, and the corresponding output voltage values during the short-circuit protection are inconsistent, namely, the problem of inconsistency of the overcurrent points exists.
When the first driving circuit outputs the first driving signal to the driving control ends of the first transistor and the fourth transistor and also outputs the driving control signal in the starting stage to the short-circuit protection detection module, the short-circuit protection detection module detects the conducting voltage drop VD2 of the fourth transistor MN2 and the protection threshold V in the starting stageth1Comparing, if the conduction voltage drop is detected to be less than the protection threshold value Vth1Then, a logic control and timing module outputs high level, and further controls a driving circuit to output high voltage to fully drive a power tube; if the conduction voltage drop is larger than the protection threshold value Vth1The logic module controls the drive circuit to output limited drive voltage, and the current of the power tube is limited by limiting the drive voltage of the power tube to carry out current-limiting drive; the simultaneous logic control and timing module starts timing each timeDetecting that the voltage drop of the power tube is greater than a set protection threshold Vth1Once counted and once less than a set threshold V of the start-up phase has occurredth1Resetting the counter; if the conduction voltage drop of the power tube is continuously detected to be larger than the protection threshold value V within the set current-limiting driving timing timeth1And entering a protection state, controlling the module generating the quasi-complementary pulse signal to close and output the complementary control signal through the logic module, stopping starting the power tube, starting another timing, recovering the generation of the quasi-complementary pulse signal after the set rest timing time is finished, restarting the power tube, and repeating the steps.
When the converter is just started or the output is short-circuited, because the primary winding of the transformer is clamped and loses the effect of the inductor, larger voltage is superposed at two ends of the power tube (N tube) and is larger than a comparison threshold set during starting, the state is continuously detected within set time, the converter enters a protection state, the power tube is stopped to be started, and the converter is prevented from being burnt out under high voltage and large current. When attention needs to be paid, the protection state is not immediately entered when the conduction voltage drop of the power tube is detected to be larger than the set threshold value during startup, the power tube is only in the current-limiting driving state, and the protection state is entered only when the conduction voltage drop is continuously detected to be overlarge within the set time. The reason is that the voltage on the output capacitor is very small when the converter is just started, at the moment, the conduction voltage drop of the power tube is inevitably larger than the set value of the starting machine, and if the converter enters a protection state immediately after the detected voltage drop is larger than the set value, the converter cannot bring enough capacitive load. In order to prevent the problem of abnormal starting caused by triggering protection in the starting stage, enough timing time needs to be provided for charging the output capacitor. Meanwhile, at the voltage rising stage on the output capacitor, in order to inhibit the converter from heating seriously and avoid overcurrent impact on a controller device, the driving voltage of the power tube is limited, so that the current of the power tube is limited in a safe working area of the device. Wherein the safe area current value is set according to the weakest device on the current path. In general, the power transistor on the conducting branch is a critical and vulnerable device, and therefore, the current-limiting driving value is generally determined according to the safe operating area of the power transistor.
The current limiting and timing of the power tube are used for preventing misjudgment during the starting of the machine, the power tube can recover to work at any time and is fully driven to be conducted, and the efficiency is not influenced; the timing of the time for stopping starting the power tube is to dissipate heat generated in the current-limiting driving time so as to avoid damage of internal devices due to overheating, enough rest time needs to be set at the moment, and then the power tube is started again; the rest timing time is determined according to the time required by the heat dissipation of the converter after the timing of the current-limiting drive. Under the normal working state, the power tube is fully conducted, the conduction voltage drop is very small, and the efficiency of the converter is ensured.
The current value of the current-limiting drive and the timing time of the current-limiting drive are determined according to the maximum capacitive load and heat accumulation of the converter, and the calculation formula is as follows:
Vin_max·ILimit·Tst≤ET
wherein ILimitThe current value of the current-limiting drive, Io, Tst, Co _ max, the maximum capacitive load required by the converter, Vin _ max, ETThe current limiting value and the timing time are selected by integrating the current limiting value and the timing time, wherein the allowable heat accumulation of the converter at the current limiting driving moment, namely the current limiting current value does not cause damage to devices of the converter due to excessive heat accumulation under the condition of ensuring that the output capacitor is charged until the output voltage reaches a steady state value in the timing time under the condition that the output capacitor is provided with a large capacitor.
When the second driving circuit outputs the complementary second driving signal to the driving control terminals of the second transistor and the third transistor, and also outputs the start-up stage driving control signal to the short-circuit protection detection module, the short-circuit protection detection module detects the on-state voltage drop VD1 of the third transistor MN1, and the on-state voltage drop VD and the start-up stage protection threshold V are used for controlling the second driving circuit to output the complementary second driving signal to the driving control terminals of the second transistor and the third transistorth1The same control procedure as described above was used for comparison.
When the first drive is performedThe first driving signal output by the circuit drives the first transistor and the fourth transistor to be in a stable stage, the first driving circuit outputs a starting stage driving control signal to the short-circuit protection detection module, and the short-circuit protection detection module detects the conducting voltage drop VD2 of the stable conducting stage of the fourth transistor MN2 and the stable stage protection threshold value Vth2Comparing; the subsequent control process is the same as the start-up phase, except that the protection threshold V is comparedth2。
When the second driving circuit outputs a complementary second driving signal to drive the second transistor and the third transistor to be in a stable stage, the short-circuit protection detection module detects the on-state voltage drop VD1 of the third transistor MN1 and the stable stage protection threshold Vth2The same control procedure as described above was used for comparison.
As shown in fig. 3, a circuit diagram of a short-circuit protection detection module according to the present invention is specifically implemented, and as shown in fig. 3, the short-circuit protection detection circuit includes a comparator CMP1, a comparator CMP2, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a MOS transistor NM1, a MOS transistor MN2, and a nand gate nand, wherein R1 and R2 are connected in series, R3 and R4 are connected in series to one input terminal of the comparator CMP1 and CMP2, respectively, the MOS transistors NM1 and R1 are connected in parallel, the MOS transistors NM2 and R3 are connected in parallel, the other input terminals of CMP1 and CMP2 are connected to VD1 and VD2 signals, the output terminals of the nand gates are connected to two input terminals of the nand gates, and the output signal of the nand gates is sent to. The comparator CMP1 responds to the control signal applied to the second drive circuit, and the comparator CMP2 responds to the control signal applied to the first drive circuit.
The starting stage and the stable stage are selected by a driving control signal Soft _ L from a driving circuit to set different short-circuit protection threshold settings respectively. When soft _ L is equal to 0, the converter works in a starting stage; when soft _ L is 1, it indicates that the converter is operating in a steady state, i.e., a fully on state. By controlling the conduction of the MOS tube, a voltage drop is generated on the resistor through a bias current to obtain a threshold voltage Vth, so that the switching of different thresholds of output short-circuit protection is realized, and the consistency and reliability of an overcurrent point during the working of a startup stage and a stable stage are ensured.
FIG. 4 is a graph of the short protection threshold switching wave of FIG. 3And (4) shaping. As can be seen from fig. 4, when the inverter is started, Soft _ L is equal to 0, and the output voltage V is set to 0OWhen the voltage is zero, the conduction voltage drop of the power tube is large and exceeds a short-circuit protection detection comparison threshold Vth1, the output of the comparator is low level, so that the Vo _ ok _ L signal is further high level to indicate output short circuit, the transistor is driven to limit the current through the logic control and timing module, and timing is started; with output voltage VOSlowly rising until the output voltage rises to a certain value, the conduction voltage drop of the primary power tube is less than a starting set threshold Vth1, the comparator outputs a high level, the Vo _ ok _ L is a low level, the output is not short-circuited, the converter does not limit the driving voltage of the power tube, the power tube is completely conducted, the normal working state is entered, the starting is completed, and meanwhile, the short-circuit protection detection threshold is switched to Vth2, wherein the Vth1 is>Vth2。
Example two
Fig. 5 is a dotted frame part of a controller of a full-bridge inverter according to the present invention. Compared with the first embodiment, the difference of this embodiment is that the power transistor of this embodiment adopts a triode, and because the triode is a current-driven device, the driving circuit is in a current-driven mode, and in the current-limiting operating state, it provides a small driving current, and in the fully-driven state, it provides a large enough driving current to make the conduction voltage drop of the triode small enough, and not affect the performance of the converter.
The present invention is not limited to the above embodiments, and various other modifications, substitutions and alterations can be made without departing from the basic technical concept of the present invention by the common technical knowledge and conventional means in the field according to the above content of the present invention.

Claims (12)

1. A control method of a full-bridge converter is characterized in that: detecting the conduction voltage drop of a power tube in the full-bridge converter when the power tube is conducted in each period, and if the conduction voltage drop of the power tube is smaller than a set short-circuit protection threshold value, fully driving the power tube; if the conduction voltage drop of the power tube is larger than a set short-circuit protection threshold, carrying out current-limiting driving, if the conduction voltage drop of the power tube is continuously monitored to be larger than the short-circuit protection threshold within the set current-limiting driving timing time, entering a protection mode, stopping starting the power tube, starting to enter the set rest timing time, and after the timing is finished, re-driving the power tube and detecting the conduction voltage drop of the power tube; this is repeated.
2. The control method according to claim 1, characterized in that: if the conduction voltage drop is smaller than the short-circuit protection threshold value within the set current-limiting drive timing time, the counting is reset, and the state is switched to a full drive state.
3. The control method according to claim 1, characterized in that: and respectively driving and starting the power tube in the full-bridge converter by adopting a first driving signal and a second driving signal, and detecting the conducted voltage drop of an NMOS tube in the power tube.
4. The control method according to claim 1, 2 or 3, characterized in that: the conduction voltage drop of the power tube is divided into the conduction voltage drop of the power tube in a starting stage or the conduction voltage drop of the power tube in a steady-state stage; correspondingly, a first short-circuit protection threshold value in the starting stage or a second short-circuit protection threshold value in the steady-state stage is set respectively.
5. The control method according to claim 4, characterized in that: the first short-circuit protection threshold value is determined according to the current limiting value and the conduction internal resistance of the NMOS tube in the starting stage, and the second short-circuit protection threshold value is determined according to the maximum output current value and the conduction internal resistance of the NMOS tube in the stable state; and the first short protection threshold is greater than the second short protection threshold.
6. The control method according to claim 1, characterized in that: the current-limited drive timing is determined based on the maximum capacitive load required by the inverter and the amount of heat allowed to accumulate.
7. The control method according to claim 1, characterized in that: the rest timing time is determined according to the time required by the heat dissipation of the converter after the current-limiting driving timing.
8. The control method according to claim 4, characterized in that: the first driving signal and the second driving signal are complementary pulse driving signals with opposite logics, the time of the effective levels of the two paths of complementary pulse signals is the same, a period of time is set between the two paths of effective levels, and the two paths of effective levels are simultaneously at the invalid level, so that the upper power tube and the lower power tube of the full-bridge converter are prevented from being shared.
9. A controller for a full-bridge inverter, comprising: the circuit comprises a quasi-complementary pulse generation module, a first drive circuit, a second drive circuit, a logic control and timing module and a short-circuit protection detection module;
the quasi-complementary quasi-pulse generating module is used for generating two paths of complementary pulse signals and inputting the two paths of complementary pulse signals into the first driving circuit and the second driving circuit respectively;
the first driving circuit and the second driving circuit respectively output complementary pulse driving signals to drive and control the bridge type geminate transistors; meanwhile, respectively outputting a driving control signal to a short-circuit protection detection module;
the short-circuit protection detection module starts the detection of the conduction voltage drop of the power tube according to a drive control signal from the drive circuit, compares the conduction voltage drop with a set short-circuit protection threshold value, and outputs a detection comparison result to the logic control and timing module;
the logic control and timing module carries out current-limiting driving or full driving on the power tube through the driving circuit according to the detection and comparison result of the output short-circuit protection module; or stopping outputting the driving pulse signal through the quasi-complementary pulse generating module.
10. The controller for a full-bridge inverter according to claim 9, wherein: the drive control signal output by the drive circuit comprises control signals of a start-up stage and a steady-state stage, the short-circuit protection detection module is correspondingly provided with protection thresholds of the start-up stage and the steady-state stage, and the power tube is correspondingly started to perform detection comparison of conduction voltage drop of the start-up stage or the steady-state stage according to the drive control signal.
11. The controller for a full-bridge inverter according to claim 9, wherein: the logic control and timing module performs timing setting on the current-limiting driving state and performs maintenance or switching of the current-limiting driving mode into full driving according to a timing result.
12. The controller for a full-bridge inverter according to claim 9, wherein: and the logic control and timing module performs timing setting on the driving pulse signal for stopping outputting, and performs holding or resetting of the driving stopping mode according to a timing result, wherein the resetting means recovers the driving output of the complementary pulse signal.
CN201910852638.0A 2019-09-10 2019-09-10 Control method and controller of full-bridge converter Pending CN110601541A (en)

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Application publication date: 20191220