CN111640866A - Resistive random access memory and preparation method thereof - Google Patents
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- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
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- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
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- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of switching materials, e.g. deposition of layers
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Abstract
The invention provides a resistive random access memory and a preparation method thereof, wherein the preparation method of the resistive random access memory comprises the steps of providing a semiconductor substrate; sequentially forming a first electrode, a metal layer and an oxidation dielectric layer on the semiconductor substrate; performing an oxidation process, enabling oxidation gas in the oxidation process to penetrate through the oxidation medium layer to be diffused into the metal layer, and enabling the oxidation gas to react with the metal layer to form a resistance change layer; and forming a second electrode on the oxidation medium layer. The oxidation dielectric layer has the good characteristic of storing oxygen vacancies and oxygen ions, so that a conductive channel (or a conductive filament) in the resistive layer can be fixed, and the working stability and reliability of the resistive random access memory can be improved.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a resistive random access memory and a preparation method thereof.
Background
With the development of semiconductor technology, the market demand for nonvolatile memory is increasingly moving toward large capacity, low power consumption, high density, and low cost. Resistive Random Access Memory (RRAM) is a research hotspot of next-generation memories, has strong application potential and is considered as a Memory with the highest commercial value.
A conventional resistance random access memory generally includes a semiconductor substrate, and a bottom electrode, a resistance layer, and a top electrode stacked in this order on the semiconductor substrate. By applying voltage to the top electrode and the bottom electrode, soft breakdown can occur to the resistive layer, that is, oxygen ions in the resistive layer can move, so that oxygen vacancies can occur in the resistive layer, and a conductive channel formed by the oxygen vacancies can be formed in the resistive layer, the conductive channel is generally called as a conductive filament, but the existing conductive channel has an unstable problem, and therefore, the working stability and reliability of the resistive random access memory are caused.
Disclosure of Invention
The invention aims to provide a resistive random access memory and a preparation method thereof, and aims to solve the problem that the resistive random access memory is poor in working stability and reliability.
In order to solve the technical problem, the invention provides a preparation method of a resistive random access memory, which comprises the following steps:
providing a semiconductor substrate;
sequentially forming a first electrode, a metal layer and an oxidation dielectric layer on the semiconductor substrate;
performing an oxidation process, enabling oxidation gas in the oxidation process to penetrate through the oxidation medium layer to be diffused into the metal layer, and enabling the oxidation gas to react with the metal layer to form a resistance change layer;
and forming a second electrode on the oxidation medium layer.
Optionally, in the preparation method of the resistive random access memory, the oxide dielectric layer is a silicon oxide layer or a silicon oxynitride layer.
Optionally, in the preparation method of the resistive random access memory, the thickness of the oxide dielectric layer is less than 10 nm.
Optionally, in the preparation method of the resistive random access memory, the oxidizing gas is at least one of oxygen, nitrogen and nitrogen oxide.
Optionally, in the preparation method of the resistive random access memory, the method for forming the first electrode, the metal layer, and the oxide dielectric layer includes:
forming a barrier layer on the semiconductor substrate, wherein the barrier layer is provided with an opening penetrating in the thickness direction;
forming a first electrode filled in the opening;
forming a metal layer covering the first electrode and the barrier layer;
and forming an oxidation dielectric layer, wherein the oxidation dielectric layer covers the metal layer.
Optionally, in the preparation method of the resistive random access memory, the semiconductor substrate includes an interlayer dielectric layer and a metal interconnection line located in the interlayer dielectric layer, a surface of the metal interconnection line is flush with a surface of the interlayer dielectric layer, the barrier layer is located on the dielectric layer and the metal interconnection line, and the first electrode is located on the metal interconnection line.
Optionally, in the preparation method of the resistive random access memory, the first electrode is made of titanium nitride; the metal layer is made of tantalum; the second electrode is made of at least one of tantalum, tantalum nitride, titanium nitride, tungsten and nickel.
Optionally, in the preparation method of the resistive random access memory, when the oxidation process is performed, the oxidation process is a thermal oxidation process or an in-situ steam generation oxidation process.
Based on the same inventive concept, the invention also provides a resistive random access memory, which comprises:
a semiconductor substrate;
a first electrode on the semiconductor substrate;
a resistance change layer on the first electrode;
the oxidation medium layer is positioned on the resistance change layer;
and the second electrode is positioned on the oxidation medium layer.
Optionally, in the resistive random access memory, the resistive random access memory further includes a barrier layer located on the semiconductor substrate, the barrier layer has an opening penetrating in a thickness direction, the first electrode is filled in the opening, and the resistive layer covers the first electrode and the dielectric layer.
The invention provides a resistive random access memory and a preparation method thereof, wherein the preparation method of the resistive random access memory comprises the steps of sequentially forming a first electrode, a metal layer and an oxide dielectric layer on a semiconductor substrate; performing an oxidation process, enabling oxidation gas in the oxidation process to penetrate through the oxidation medium layer to be diffused into the metal layer, and enabling the oxidation gas to react with the metal layer to form a resistance change layer; and forming a second electrode on the oxidation medium layer. The applicant researches and discovers that a bottom electrode and a top electrode of the conventional resistive random access memory are directly contacted with a resistive layer, namely the resistive layer and the top electrode directly transmit oxygen ions, so that a conductive channel cannot be fixed, the conductive channel is unstable, and the working stability and reliability of the resistive random access memory are poor. In the invention, the oxidation medium layer is formed between the resistive layer and the second electrode, and the oxidation medium layer has better characteristics of storing oxygen vacancies and oxygen ions, so that a conductive channel (or a conductive filament) in the resistive layer can be fixed, and thus, the working stability and reliability of the resistive random access memory can be improved. Further, the metal layer and the oxidation dielectric layer are formed first, so that the metal layer and the oxidation dielectric layer have good contact, and thus, after the oxidation process is performed, the resistance change layer and the oxidation dielectric layer can obtain good contact morphology, and contact defects (such as open circuit or short circuit) between the resistance change layer and the oxidation dielectric layer are avoided. Furthermore, the oxidation dielectric layer can isolate the resistive layer from the second electrode, and direct contact between the resistive layer and the second electrode is avoided, so that the material of the second electrode can be selected better, the metal activity of the second electrode is improved, and the device performance of the resistive random access memory is improved.
Drawings
Fig. 1 is a schematic flow chart of a method for manufacturing a resistive random access memory according to an embodiment of the present invention;
fig. 2 to 7 are schematic structural diagrams formed in a manufacturing method of a resistive random access memory according to an embodiment of the present invention;
wherein the reference numerals are as follows:
100-a semiconductor substrate; 101-interlayer dielectric layer; 102-metal interconnect lines; 103-a barrier layer; 104-an opening; 110-a first electrode; 120-a metal layer; 121-a resistance change layer; 130-an oxide dielectric layer; 140-second electrode.
Detailed Description
The resistive random access memory and the method for manufacturing the same according to the present invention are further described in detail with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
The applicant researches and discovers that a bottom electrode and a top electrode of the conventional resistive random access memory are directly contacted with a resistive layer, namely the resistive layer and the top electrode directly transmit oxygen ions, so that a conductive channel cannot be fixed, the conductive channel is unstable, and the working stability and reliability of the resistive random access memory are poor.
Based on the method, the invention provides a preparation method of the resistive random access memory. Fig. 1 is a schematic flow chart of a method for manufacturing a resistive random access memory according to an embodiment of the present invention. As shown in fig. 1, the method for manufacturing the resistive random access memory includes:
step S1: providing a semiconductor substrate;
step S2: sequentially forming a first electrode, a metal layer and an oxidation dielectric layer on the semiconductor substrate;
step S3: performing an oxidation process, enabling oxidation gas in the oxidation process to penetrate through the oxidation medium layer to be diffused into the metal layer, and enabling the oxidation gas to react with the metal layer to form a resistance change layer; and the number of the first and second groups,
step S4: and forming a second electrode on the oxidation medium layer.
Specifically, please refer to fig. 2 to 7, and fig. 2 to 7 are schematic structural diagrams formed in the method for manufacturing a resistive random access memory according to an embodiment of the present invention.
First, step S1 is performed, as shown in fig. 2, a semiconductor substrate 100 is provided. Specifically, the semiconductor substrate 100 includes an interlayer dielectric layer 101 and a metal interconnection line 102 located in the interlayer dielectric layer 101. The metal interconnection line 102 is flush with the surface of the interlayer dielectric layer 101. The interlayer dielectric layer 101 is made of at least one of a Low dielectric constant material (Low-k), silicon dioxide, silicon nitride, and silicon oxynitride, preferably a Low dielectric constant material, and the Low dielectric constant material (Low-k) includes Fluorinated Silicate Glass (FSG), silicon oxide, carbon-doped silicon oxide, or nitrogen-doped silicon carbide. The metal interconnection line 102 is preferably made of copper.
Then, step S2 is performed, and as shown in fig. 3 to 5, the first electrode 110, the metal layer 120 and the oxide dielectric layer 130 are sequentially formed on the semiconductor substrate 100. Specifically, the method for forming the first electrode 110, the metal layer 120 and the dielectric oxide layer 130 includes:
step S21: forming a barrier layer 103 on the semiconductor substrate 100, the barrier layer 103 having an opening 104 penetrating in a thickness direction;
step S22: forming a first electrode 110, wherein the first electrode 110 is filled in the opening 104;
step S23: forming a metal layer 120, wherein the metal layer 120 covers the first electrode 110 and the dielectric layer;
step S24: forming an oxide dielectric layer 130, wherein the oxide dielectric layer 130 covers the metal layer 120.
As shown in fig. 3, in step S21, the barrier layer 103 is located on the interlayer dielectric layer 101 and the metal interconnection line 102, and the opening 104 exposes a portion of the metal interconnection line 102. Specifically, the barrier layer 103 may be made of nitrogen-Doped Silicon Carbide (NDC), which can prevent the metal in the metal layer 120 from diffusing into the interlayer dielectric layer 101 when the metal layer 120 is formed subsequently.
As shown in fig. 4, in step S22, the first electrode 110 may be formed by physical vapor deposition, and specifically, the method for forming the first electrode 110 includes: a first electrode material layer is deposited in the opening 104 and on the surface of the barrier layer 103, and then the first electrode material layer is ground to remove the first electrode material layer on the surface of the barrier layer 103, so as to form the first electrode 110. Specifically, the surface of the first electrode 110 is flush with the surface of the barrier layer 103, and the first electrode 110 is located on the metal interconnection line 102, that is, the first electrode 110 covers the metal interconnection line 102 exposed in the opening 104, or the first electrode 110 faces at least a portion of the metal interconnection line 102. The first electrode 110 may be made of titanium nitride, so that the first electrode 110 has a better conductivity. But is not limited thereto and may be other conductive materials known to those skilled in the art, such as tantalum nitride, etc.
As shown in fig. 5, in step S23, the metal layer 120 may be formed by a Physical Vapor Deposition (PVD) process, a Chemical Vapor Deposition (CVD) process, an Atomic Layer Deposition (ALD) process, or the like, and the material of the metal layer 120 is preferably tantalum, so that the resistance change layer formed by the metal layer 120 may have better reliability, but is not limited thereto, and may also be other metals known to those skilled in the art, such as titanium, nickel, or yttrium. The metal layer 120 is used to form a resistance change layer 121 in a subsequent process.
As shown in fig. 5, in step S24, an oxide dielectric layer 130 is formed, and the oxide dielectric layer 130 covers the metal layer 120. Specifically, the oxidation dielectric layer 130 may be formed by a chemical vapor deposition method or a physical vapor deposition method, and in addition, the oxidation dielectric layer 130 may also be formed by an oxidation process, and the oxidation dielectric layer 130 preferably stores oxygen vacancies and oxygen ions. The oxidation dielectric layer 130 and the metal layer 120 have good contact, and after the metal layer 120 is subsequently used to form the resistance-change layer 121, the resistance-change layer 121 and the oxidation dielectric layer 130 can obtain good contact morphology, so as to avoid contact defects (such as open circuit or short circuit) between the two. The thickness of the oxide dielectric layer 130 may be less than 10nm, and when an external voltage is applied to the resistive random access memory, the breakdown performance of the external voltage on the oxide dielectric layer 130 may be increased. Preferably, the material of the oxide dielectric layer 130 may be silicon oxide or silicon oxynitride, and in a subsequent oxidation process, the shape of the oxide dielectric layer 130 may be prevented from being greatly changed due to oxidation.
Next, as shown in fig. 6, step S3 is performed to perform an oxidation process, so that an oxidation gas in the oxidation process diffuses into the metal layer 120 through the oxidation medium layer 130 and reacts with the metal layer 120 to form a resistance change layer 121. Wherein the oxidizing gas is at least one of oxygen, nitrogen and nitrogen oxide. Since the oxidation dielectric layer 130 is mainly an oxidation layer, the morphology of the oxidation dielectric layer can be prevented from changing when the oxidation process is performed. Further, the oxide dielectric layer 130 may fix a conductive channel (or a conductive filament) in the resistive layer 121, so that the operation stability and reliability of the resistive random access memory may be improved. Specifically, the adopted oxidation process is a thermal oxidation process or an in-situ steam generation oxidation process, and more specifically, the thermal oxidation process may be performed on the semiconductor substrate 100 by an oxidation furnace or a rapid thermal annealing chamber under oxygen gas at a temperature of 500 ℃ to 1000 ℃, or performed by using a mixed gas of oxygen and nitrogen or nitrogen oxide; the flow rate of the oxidizing gas can be 300sccm to 500sccm, for example, 300sccm, so as to obtain a uniformly oxidized resistance change layer 121.
The in-situ steam generation (ISSG) oxidation process is a process of introducing oxygen into the rapid thermal annealing chamber, synthesizing water vapor in situ on the surface of the semiconductor substrate 100, and forming an oxide with the metal in the metal layer 120; in this embodiment, a thermal oxidation process is preferably used.
Next, as shown in fig. 7, step S4 is performed to form a second electrode 140 on the oxide dielectric layer 130, where the second electrode 140 is located on the surface of the oxide dielectric layer 130. The oxidation dielectric layer 130 can isolate the resistive layer 121 from the second electrode 140, and prevent the resistive layer 121 and the second electrode 140 from being in direct contact with each other, so that the material of the second electrode 140 can be selected better, the metal activity of the second electrode 140 is improved, and the device performance of the resistive random access memory is improved. Further, due to the existence of the oxide dielectric layer 130, the resistance change layer 121 may be prevented from being damaged when the second electrode 140 is formed, for example, nitridation, oxidation reduction, or the like of the resistance change layer 121 may be prevented. The material of the second electrode 140 may be at least one of tantalum, tantalum nitride, titanium nitride, tungsten, and nickel, and in this embodiment, titanium nitride is preferable, so as to increase the metal activity of the second electrode 140, thereby improving the device performance of the resistive random access memory.
With continuing reference to fig. 7, based on the same inventive concept, the present invention further provides a resistive random access memory, which includes a semiconductor substrate 100; a first electrode 110 on the semiconductor substrate 100; a resistance change layer 121 on the first electrode 110; an oxide dielectric layer 130 on the resistance change layer 121; and a second electrode 140 on the oxide dielectric layer 130.
The oxide dielectric layer 130 has a good property of storing oxygen vacancies and oxygen ions, so that a conductive channel (or a conductive filament) in the resistive layer 121 can be fixed, and thus, the operating stability and reliability of the resistive random access memory can be improved. Further, the oxidation dielectric layer 130 may isolate the resistive layer 121 from the second electrode 140, and prevent the resistive layer and the second electrode from being in direct contact with each other, so that the material of the second electrode 140 may be better selected, the metal activity of the second electrode 140 may be improved, and the device performance of the resistive random access memory may be further improved.
In addition, the resistive random access memory further includes a barrier layer 103 located on the semiconductor substrate 100, the barrier layer 103 has an opening penetrating in a thickness direction, the first electrode 110 is filled in the opening, and the resistive layer 121 covers the first electrode 110 and the dielectric layer. The barrier layer 103 may prevent diffusion of the metal in the resistance change layer 121 into the semiconductor substrate 100.
In summary, in the memory and the manufacturing method thereof provided by the embodiment of the invention, the conductive channel (or the conductive filament) in the resistive layer can be fixed by forming the oxide dielectric layer between the resistive layer and the second electrode, so that the working stability and reliability of the resistive memory can be improved. Furthermore, the oxidation dielectric layer can isolate the resistive layer from the second electrode, and direct contact between the resistive layer and the second electrode is avoided, so that the material of the second electrode can be better selected, the metal activity of the second electrode is improved, and the device performance of the resistive random access memory is further improved.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.
Claims (10)
1. A preparation method of a resistive random access memory is characterized by comprising the following steps:
providing a semiconductor substrate;
sequentially forming a first electrode, a metal layer and an oxidation dielectric layer on the semiconductor substrate;
performing an oxidation process, enabling oxidation gas in the oxidation process to penetrate through the oxidation medium layer to be diffused into the metal layer, and enabling the oxidation gas to react with the metal layer to form a resistance change layer; and the number of the first and second groups,
and forming a second electrode on the oxidation medium layer.
2. The method for manufacturing a resistive random access memory according to claim 1, wherein the oxide dielectric layer is a silicon oxide layer or a silicon oxynitride layer.
3. The method for manufacturing a resistive random access memory according to claim 1, wherein the thickness of the oxide dielectric layer is less than 10 nm.
4. The method for manufacturing a resistive random access memory according to claim 1, wherein the oxidizing gas is at least one of oxygen, nitrogen, and nitrogen oxide.
5. The method for manufacturing a resistive random access memory according to claim 1, wherein the method for forming the first electrode, the metal layer, and the oxide dielectric layer comprises:
forming a barrier layer on the semiconductor substrate, wherein the barrier layer is provided with an opening penetrating in the thickness direction;
forming a first electrode filled in the opening;
forming a metal layer covering the first electrode and the barrier layer;
and forming an oxidation dielectric layer, wherein the oxidation dielectric layer covers the metal layer.
6. The method for manufacturing a resistive random access memory according to claim 5, wherein the semiconductor substrate includes an interlayer dielectric layer and a metal interconnection line located in the interlayer dielectric layer, the surface of the metal interconnection line is flush with the surface of the interlayer dielectric layer, the barrier layer is located on the dielectric layer and the metal interconnection line, and the first electrode is located on the metal interconnection line.
7. The method for manufacturing a resistive random access memory according to claim 1, wherein the first electrode is made of titanium nitride; the metal layer is made of tantalum; the second electrode is made of at least one of tantalum, tantalum nitride, titanium nitride, tungsten and nickel.
8. The method for manufacturing a resistive random access memory according to claim 1, wherein an oxidation process used in the oxidation process is a thermal oxidation process or an in-situ steam generation oxidation process.
9. A resistance change memory, characterized by comprising:
a semiconductor substrate;
a first electrode on the semiconductor substrate;
a resistance change layer on the first electrode;
the oxidation medium layer is positioned on the resistance change layer; and the number of the first and second groups,
and the second electrode is positioned on the oxidation medium layer.
10. The resistance change memory according to claim 9, further comprising a barrier layer on the semiconductor substrate, the barrier layer having an opening penetrating in a thickness direction, the first electrode being filled in the opening, the resistance change layer covering the first electrode and the dielectric layer.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112420923A (en) * | 2020-11-26 | 2021-02-26 | 上海华力微电子有限公司 | Resistive random access memory and manufacturing method thereof |
| CN113363380A (en) * | 2021-05-28 | 2021-09-07 | 上海华力微电子有限公司 | Resistive random access memory and forming method thereof |
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