CN111628730B - Current multiplexing variable gain low noise amplifier - Google Patents
Current multiplexing variable gain low noise amplifier Download PDFInfo
- Publication number
- CN111628730B CN111628730B CN202010385255.XA CN202010385255A CN111628730B CN 111628730 B CN111628730 B CN 111628730B CN 202010385255 A CN202010385255 A CN 202010385255A CN 111628730 B CN111628730 B CN 111628730B
- Authority
- CN
- China
- Prior art keywords
- current
- output
- nmos tube
- amplifying circuit
- control signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
- H03F3/195—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Abstract
The current multiplexing variable gain low noise amplificationThe current control module outputs a first current Ic1 and a second current Ic2 according to the received control signal, wherein the first current Ic1 is output to the drain electrode D of an NMOS tube Min of the input amplifying circuit so as to control the current I flowing through the NMOS tube Min Min Thereby controlling the transconductance Gm of the NMOS tube Min, further controlling the gain of the input amplifying circuit, and outputting the second current Ic2 to the drain electrode D of the NMOS tube Mo of the output amplifying circuit to control the current I flowing through the NMOS tube Mo Mo Therefore, the transconductance Gm of the NMOS tube Mo is controlled, the gain of the output amplifying circuit is controlled, the gains of the input amplifying circuit and the output amplifying circuit are respectively and independently controlled, the high variable gain and the high dynamic range signal receiving can be realized, and the system is simple in design and low in cost.
Description
Technical Field
The invention relates to a radio frequency front-end circuit design, in particular to a current multiplexing variable gain low noise amplifier.
Background
The LNA (Low Noise Amplifier ) acts as a key module for the RF receiver, its high gain determines the minimum signal sensitivity received, and its low gain affects the maximum signal received and linearity, so its gain is critical to the sensitivity and dynamic range of the receiving system.
Therefore, the variable gain low noise amplifier becomes an important module of the rf front-end circuit, but the performance of the current variable gain low noise amplifier still cannot meet the requirement of the rf front-end circuit.
Disclosure of Invention
The invention provides a current multiplexing variable gain low noise amplifier, comprising: the input amplifying circuit comprises an NMOS tube M in The device is used for receiving an input signal and carrying out preliminary amplification on the input signal; the output amplifying circuit comprises an NMOS tube Mo, is used for receiving the signal output by the input amplifying circuit, and further amplifies the signal output by the input amplifying circuit and outputs an output signal; the interstage coupling circuit is coupled between the input amplifying circuit and the output amplifying circuit and is used for transmitting signals output by the input amplifying circuit to the input end of the output amplifying circuit and carrying out current multiplexing; the current control module receives a control signal and outputs a first current to the NMOS tube M of the input amplifying circuit according to the control signal in And the drain of NMOS tube Mo outputting the second current to the output amplifying circuit to control the flow of NMOS tube M in And the current flowing through the NMOS Mo.
Further, the input amplifying circuit further comprises an input coupling capacitor, a compensation capacitor and a feedback inductor, wherein the input signal is connected to one end of the input coupling capacitor, and the other end of the input coupling capacitor is connected to one end of the compensation capacitor and the NMOS tube M in Gate of NMOS tube M in The source electrode and the substrate of the feedback inductor are connected with one end of the compensation capacitor, the other end of the feedback inductor is connected to the ground, and the NMOS tube M in The drain electrode of the (C) is formed into an output end of the input amplifying circuit; the inter-stage coupling circuit comprises an inter-stage coupling capacitor, a blocking inductor and a grounding capacitor, wherein one end of the blocking inductor and one end of the inter-stage coupling capacitor are connected with an NMOS tube M in The other end of the blocking inductor is connected with one end of the grounding capacitor, and the other end of the grounding capacitor is grounded; the output amplifying circuit further comprises a bias resistor, an output coupling capacitor, a load inductor and a load capacitor, the other end of the inter-stage coupling capacitor and one end of the bias resistor are connected with the grid electrode of the NMOS tube Mo, the other end of the blocking inductor is also connected with the source electrode of the NMOS tube Mo, the drain electrode of the NMOS tube Mo is connected with one end of the output coupling capacitor, one end of the load inductor and one end of the load capacitor, the other end of the output coupling capacitor outputs an output signal, and the other ends of the load inductor, the load capacitor and the bias resistor receive power supply voltage.
Further, the device also comprises a bias circuit for applying bias voltage to the NMOS tube M in A bias voltage is provided.
Further, the current control module comprises a first current pump, a second current pump and a digital-to-analog conversion circuit, wherein the digital-to-analog conversion circuit comprises an input end for receiving the control signal and outputting a first control signal and a second control signal according to the control signal, wherein the first control signal is output to the input end of the first current pump, and the first current pump outputs a first current to the NMOS tube M of the input amplifying circuit according to the first control signal in The second control signal is output to the input end of the second current pump, and the second current pump outputs a second current to the drain electrode of the NMOS tube Mo of the output amplifying circuit according to the second control signal.
Further, the first current pump comprises a first potentiometer and a first NMOS tube Mn1The first end of the first potentiometer is connected with the drain electrode of the first NMOS tube Mn1, the control end of the first potentiometer is connected with the grid electrode of the first NMOS tube Mn1 and the grid electrode of the first PMOS tube MP1, the source electrode of the first NMOS tube Mn1 is connected with the source electrode of the first PMOS tube MP1, the drain electrode of the first PMOS tube MP1 is grounded, the grid electrode of the first PMOS tube MP1 is grounded through a first capacitor, and the common node of the source electrode of the first NMOS tube Mn1 and the source electrode of the first PMOS tube MP1 forms the output end of the first current pump to output a first current; the second current pump comprises a second potentiometer, a second NMOS tube Mn2 and a second PMOS tube MP2, the first end of the second potentiometer receives the second control signal, the second end of the second potentiometer is connected with the drain electrode of the second NMOS tube Mn2, and the second potentiometer R T1 The control end of the second NMOS transistor Mn2 is connected with the grid electrode of the second PMOS transistor MP2, the source electrode of the second NMOS transistor Mn2 is connected with the source electrode of the second PMOS transistor MP2, the drain electrode of the second PMOS transistor MP2 is grounded, the grid electrode of the second PMOS transistor MP2 is connected with the drain electrode of the second PMOS transistor MP2 through a second capacitor, and the common node of the source electrode of the second NMOS transistor Mn2 and the source electrode of the second PMOS transistor MP2 forms the output end of the second current pump to output second current.
Further, the first current is positive or negative, and the second current is positive or negative.
Further, the first current pump comprises a first potentiometer, a first NMOS tube Mn1 and a first PMOS tube MP1, wherein a first end of the first potentiometer receives the first control signal, a second end of the first potentiometer is connected with a drain electrode of the first NMOS tube Mn1, a control end of the first potentiometer is connected with a grid electrode of the first NMOS tube Mn1 and a grid electrode of the first PMOS tube MP1, a source electrode of the first NMOS tube Mn1 is connected with a source electrode of the first PMOS tube MP1, a drain electrode of the first PMOS tube MP1 is grounded, a common node of the source electrode of the first NMOS tube Mn1 and the source electrode of the first PMOS tube MP1 forms an output end of the first current pump to output first current; the second current pump comprises a second potentiometer and a second NMOS tube Mn2, the first end of the second potentiometer receives the second control signal, the second end of the second potentiometer is connected with the drain electrode of the second NMOS tube Mn2, the second end of the second potentiometer is connected with the first end of the second potentiometerTwo potentiometer R T1 The control end of the second NMOS transistor Mn2 is connected with the grid electrode of the second NMOS transistor Mn2, the grid electrode of the second NMOS transistor Mn2 is grounded through a second capacitor, and the source electrode of the second NMOS transistor Mn2 forms the output end of the second current pump to output second current.
Further, the first current is a positive current or a negative current, and the second current is a positive current.
Further, the first control signal and the second control signal are voltage signals.
Further, the control signal is a digital signal, and the digital-to-analog conversion circuit converts the control signal from the digital signal to an analog first control signal and a second control signal.
The invention provides a current multiplexing variable gain low noise amplifier, which is characterized in that a current control module is added in the current multiplexing variable gain low noise amplifier comprising an input amplifying circuit and an output amplifying circuit, the current control module outputs a first current Ic1 and a second current Ic2 according to a received control signal, the first current Ic1 is output to a drain electrode D of an NMOS tube Min of the input amplifying circuit so as to control a current I flowing through the NMOS tube Min Min Thereby controlling the transconductance Gm of the NMOS tube Min, further controlling the gain of the input amplifying circuit, and outputting the second current Ic2 to the drain electrode D of the NMOS tube Mo of the output amplifying circuit to control the current I flowing through the NMOS tube Mo Mo Therefore, the transconductance Gm of the NMOS tube Mo is controlled, the gain of the output amplifying circuit is controlled, the gains of the input amplifying circuit and the output amplifying circuit are respectively and independently controlled, the high variable gain and the high dynamic range signal receiving can be realized, and the system is simple in design and low in cost.
Drawings
Fig. 1 is a circuit diagram of a low noise amplifier.
Fig. 2 is a schematic diagram of a current multiplexing low noise amplifier.
Fig. 3 is a schematic diagram of a current multiplexing variable gain low noise amplifier according to an embodiment of the invention.
Fig. 4 is a schematic diagram of a current multiplexing variable gain low noise amplifier according to an embodiment of the invention.
Fig. 5 is a schematic diagram of a circuit details of a current multiplexing variable gain low noise amplifier according to an embodiment of the invention.
Fig. 6 is a schematic diagram of a circuit details of a current multiplexing variable gain low noise amplifier according to an embodiment of the invention.
Fig. 7 is a schematic diagram of a simulation of the current multiplexing variable gain low noise amplifier shown in fig. 6.
The main element reference numerals in the drawings are explained as follows:
210. an input amplifying circuit; 220. an output amplifying circuit; 230. a bias circuit; 240. an inter-stage coupling circuit; 250. and a current control module.
Detailed Description
The following description of the embodiments of the present invention will be made more apparent and fully hereinafter with reference to the accompanying drawings, in which some, but not all embodiments of the invention are shown. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1, fig. 1 is a circuit diagram of a low noise amplifier. As shown in fig. 1, the Low Noise Amplifier (LNA) includes an input amplifying circuit 110, an output amplifying circuit 120, and a bias circuit 130. Wherein the input amplifying circuit 110 is composed of an NMOS tube M in An input coupling capacitor Cg, a compensation capacitor Cex and a feedback inductance Ls for inputting the input signal RF in Performing preliminary amplification; the output amplifying circuit 120 is composed of an NMOS tube Mo, an output coupling capacitor Co, a bias resistor Rb, a load inductance Ld and a load capacitance Cd for amplifying the output of the input amplifying circuit 110 and outputting an output signal RF out The method comprises the steps of carrying out a first treatment on the surface of the The bias circuit 130 is composed of a bias inductance Lg for applying a bias voltage Vb to the NMOS transistor M in A bias voltage is provided. Wherein the grid G of the NMOS tube Mo is connected to the power supply voltage Vdd through a bias resistor Rb, the drain D of the NMOS tube Mo is connected to the power supply voltage Vdd through a load inductance Ld and a load capacitance Cd, and the NMOS tube M in The drain electrode D of the NMOS tube Mo is connected with the source electrode S of the NMOS tube Mo. The low noise amplifier shown in figure 1 uses a source inductance for negative feedback,the gain is low, and the method is not suitable for low-power consumption and high-sensitivity application.
Referring to fig. 2, fig. 2 is a schematic diagram of a current multiplexing low noise amplifier, and based on the circuit of the low noise amplifier shown in fig. 1, as shown in fig. 2, the current multiplexing low noise amplifier further includes an inter-stage coupling circuit 140 between the input amplifying circuit 110 and the output amplifying circuit 120, which includes an inter-stage coupling capacitor Cc and a blocking inductance L i Ground capacitor C gnd For transmitting the output of the input amplifying circuit 110 to the input of the output amplifying circuit 120 and performing current multiplexing. Specifically, the inter-stage coupling capacitor Cc is connected to the gate G of the NMOS transistor Mo and the NMOS transistor M in Blocking inductance L between drains D of (a) i Is connected with a source S and a substrate of an NMOS tube Mo and an NMOS tube M in A ground capacitance C between the drains D of (2) gnd Is connected between the source S of the NMOS tube Mo and the ground GND. The current-multiplexed low noise amplifier shown in fig. 2 can achieve high gain, suitable for low power consumption high sensitivity applications, but its high gain is fixed, limiting the received signal strength and thus the acceptable dynamic range.
In one embodiment of the present invention, a current multiplexing variable gain low noise amplifier is provided. Specifically, referring to fig. 3, fig. 3 is a schematic diagram of a current multiplexing variable gain low noise amplifier according to an embodiment of the invention. The current multiplexing variable gain low noise amplifier according to an embodiment of the present invention includes:
the input amplifying circuit 210 includes an NMOS transistor M in For receiving input signals RF in And input signal RF in Performing preliminary amplification;
the output amplifying circuit 220 includes an NMOS tube Mo for receiving the signal output from the input amplifying circuit 210 and further amplifying the signal output from the input amplifying circuit 210 to output an output signal RF out ；
An inter-stage coupling circuit 240 coupled between the input amplifying circuit 210 and the output amplifying circuit 220, for transmitting the signal output from the input amplifying circuit 210 to the input terminal of the output amplifying circuit 220 and performing current multiplexing;
the current control module 250 receives a control signal N-bits and outputs a first current Ic1 to the NMOS transistor M of the input amplifying circuit 210 according to the control signal N-bits in And the drain D of the NMOS transistor Mo outputting the second current Ic2 to the output amplifying circuit 220 to control the flowing of the NMOS transistor M in Is the current I of (2) Min And a current I flowing through NMOS tube Mo Mo 。
As described above, by adding the current control module into the current multiplexing variable gain low noise amplifier circuit, the current multiplexing variable gain low noise amplifier circuit outputs the first current Ic1 and the second current Ic2 according to the received control signal N-bits, and the first current Ic1 is output to the NMOS tube M of the input amplifying circuit in To control the flow through the NMOS transistor M in Is the current I of (2) Min Thereby controlling NMOS tube M in I.e. control the gain of the input amplifying circuit 210; the second current Ic2 is output to the drain D of the NMOS transistor Mo of the output amplifying circuit 220 to control the current I flowing through the NMOS transistor Mo Mo Therefore, the transconductance Gm of the NMOS Mo is controlled, that is, the gain of the output amplifying circuit 220 is controlled, so that the gains of the input amplifying circuit 210 and the output amplifying circuit 220 are respectively and independently controlled, that is, the high variable gain and the high dynamic range signal reception can be realized, and the system is simple in design and low in cost.
In an embodiment, as shown in fig. 3, the first current Ic1 may be positive or negative, that is, the first current Ic1 may be bidirectional. When the first current Ic1 is positive, it is directed to the NMOS transistor M of the input amplifying circuit 210 in Sinking current, when the first current Ic1 can be negative current, from the NMOS transistor M of the input amplifying circuit 210 in Drawing out current. Specifically, as shown in FIG. 3, I Mo ＝I Min +Ic1, I for the input amplifying circuit 210 Mo At a constant value, when the first current Ic1 is a positive current, it is directed to the NMOS transistor M of the input amplifying circuit 210 in Pouring current to flow through NMOS tube M in Is the current I of (2) Min When the transconductance Gm of the NMOS transistor Min decreases, the Gain 1=gm (I Min )R Lin Becomes smaller, wherein R Lin Is the equivalent impedance of the input amplifying circuit 210; when the first isWhen the current Ic1 is negative, it is input from the NMOS transistor M of the amplifying circuit 210 in Pulling out current to make current I flowing through NMOS tube Min Min When the transconductance Gm of the NMOS transistor Min increases, the Gain 1=gm (I Min )R Lin And becomes larger, thereby achieving the effect of controlling the Gain1 of the input amplifying circuit 210. Likewise, in an embodiment, as shown in fig. 3, the second current Ic2 may be positive or negative, that is, the second current Ic2 may be bidirectional. When the second current Ic2 is positive, it sinks current into the NMOS Mo of the output amplifier circuit 220, and when the second current Ic2 is negative, it pulls current from the NMOS Mo of the output amplifier circuit 220. Specifically, as shown in fig. 3, IMo =i 0 +ic2, I for the output amplifying circuit 220 0 When the second current Ic2 is a positive current, it sinks a current into the NMOS transistor Mo of the output amplifying circuit 220 to make a current I flowing through the NMOS transistor Mo Mo When the transconductance Gm of the NMOS transistor Mo increases, the Gain 2=gm (I Mo )R Lo Become larger, wherein R Lo Equivalent impedance of the output amplifying circuit 220; when the second current Ic2 is negative, it pulls current from the NMOS transistor Mo of the output amplifying circuit 220 to make the current I flow through the NMOS transistor Mo Mo When the transconductance Gm of the NMOS transistor Mo decreases, the Gain 2=gm (I Mo )R Lo And becomes smaller to thereby achieve the effect of controlling the gain of the output amplifying circuit 220. The Gain gain=gain 1 of the current multiplexing variable Gain low noise amplifier is controlled in this way. And the effect that the gains of the input amplifying circuit 210 and the output amplifying circuit 220 are respectively independently controlled is achieved as described above, and the magnitude of the gain of the variable gain low noise amplifier can be controlled by controlling the magnitudes of the first current Ic1 and the second current Ic2. Therefore, the gain range of the current multiplexing variable gain low noise amplifier is enlarged, the signal receiving with high variable gain and high dynamic range is realized, and the system is simple in design and low in cost.
Specifically, as shown in fig. 3, in one embodiment, the input amplifying circuit 210 further includes an input coupling capacitor Cg, a compensation capacitor Cex, and a feedback circuitInductance Ls, in which the input signal RF in Is connected to one end of the input coupling capacitor Cg, and the other end of the input coupling capacitor Cg is connected to one end of the compensation capacitor Cex and the NMOS tube M in Gate G, NMOS tube M in The source S and the substrate of the (B) are connected with one end of a feedback inductor Ls and the other end of a compensation capacitor Cex, the other end of the feedback inductor Ls is connected with the ground GND, and an NMOS tube M in The drain D of (a) constitutes the output of the input amplifying circuit 210; the inter-stage coupling circuit 240 includes an inter-stage coupling capacitor Cc and a blocking inductance L i And a grounding capacitor C gnd In which the inductance L is blocked i And one end of the inter-stage coupling capacitor Cc are connected with an NMOS tube M in Drain D of (C), blocking inductance L i The other end of (C) is connected with a grounding capacitor C gnd Is grounded to one end of capacitor C gnd The other end of the first electrode is grounded; the output amplifying circuit 220 further comprises a bias resistor Rb, an output coupling capacitor Co, a load inductor Ld and a load capacitor Cd, wherein the other end of the inter-stage coupling capacitor Cc and one end of the bias resistor Rb are connected with the grid G of the NMOS tube Mo, and the blocking inductor L i The other end of the NMOS transistor Mo is also connected with a source electrode S of the NMOS transistor Mo, a drain electrode D of the NMOS transistor Mo is connected with one end of an output coupling capacitor Co, a load inductance Ld and a load capacitor Cd, and the other end of the output coupling capacitor Co outputs an output signal RF out The other end of the load inductance Ld, the load capacitance Cd and the bias resistance Rb receives the power supply voltage Vdd.
In one embodiment, the current multiplexing variable gain low noise amplifier further comprises a bias circuit 230 for applying a bias voltage Vb to the NMOS transistor M in A bias voltage is provided. In one embodiment, the bias circuit 230 includes a bias inductor or a bias resistor. As shown in fig. 3, the bias circuit 230 includes a bias inductor Lg, one end of which is connected to the NMOS transistor M in The other end of the bias inductor receives a bias voltage Vb.
Specifically, referring to fig. 4, fig. 4 is a schematic diagram of a current multiplexing variable gain low noise amplifier according to an embodiment of the invention, and as shown in fig. 4, the current control module 250 includes a first current pump 251, a second current pump 252 and a digital-to-analog conversion circuit (DAC) 253, and the DAC 253 includes an input terminal for receiving a control signal N-bits, and outputs a first control signal K1 and a second control signal K2 according to the control signal N-bits, wherein the first control signal K1 is output to the input end of the first current pump 251, and the first current pump 251 outputs a first current Ic1 to the NMOS tube M of the input amplifying circuit according to the first control signal K1 in The second control signal K2 is output to the input terminal of the second current pump 252, and the second current pump 252 outputs the second current Ic2 to the drain D of the NMOS transistor Mo of the output amplifying circuit 220 according to the second control signal K2.
In an embodiment, the first control signal K1 and the second control signal K2 are voltage signals. In one embodiment, the control signal N-bits is a digital signal, and the digital-to-analog conversion circuit 253 converts the control signal N-bits from a digital signal to an analog first control signal K1 and a second control signal K2. Typically the control signal N-bits comes from a radio frequency receiver.
Specifically, referring to fig. 5, fig. 5 is a schematic diagram showing details of a current multiplexing variable gain low noise amplifier according to an embodiment of the invention, as shown in fig. 5, the first current pump 251 includes a first potentiometer R T1 A first NMOS tube Mn1, a first PMOS tube MP1, a first potentiometer R T1 The first end of the first potentiometer R receives the first control signal K1 T1 The second end of the first NMOS tube Mn1 is connected with the drain electrode D of the first NMOS tube, and the first potentiometer R T1 The control end of the first NMOS transistor Mn1 is connected with the grid G of the first PMOS transistor MP1, the source S of the first NMOS transistor Mn1 is connected with the source S of the first PMOS transistor MP1, the drain D of the first PMOS transistor MP1 is grounded, the grid G of the first PMOS transistor MP1 is grounded through a first capacitor C1, and the common node of the source S of the first NMOS transistor Mn1 and the source S of the first PMOS transistor MP1 forms the output end of the first current pump 251 to output a first current Ic1. In an embodiment, the first control signal K1 controls the first NMOS transistor Mn1 to be turned on and controls the first PMOS transistor Mp1 to be turned off, so that the first current pump 251 directs the first current pump 251 to the NMOS transistor M of the input amplifying circuit 210 in The sink current, that is, the first current Ic1 is a positive current, so that the Gain1 of the input amplifying circuit 210 becomes small. In an embodiment, the first control signal K1 controls the first NMOS transistor Mn1 to turn off and controls the first PMOS transistor Mp1 to turn on to makeThe first current pump 251 pulls a current from the NMOS transistor Min of the input amplifying circuit 210, that is, the first current Ic1 is a negative current, so that the Gain1 of the input amplifying circuit 210 is increased.
Also, as shown in FIG. 5, in one embodiment, the second current pump 252 includes a second potentiometer R T2 A second NMOS tube Mn2, a second PMOS tube MP2, a second potentiometer R T2 The first end of the second potentiometer R receives the second control signal K2 T2 A second end of the second NMOS tube Mn2 is connected with a drain electrode D of the second NMOS tube, and a second potentiometer R T1 The control end of the second NMOS transistor Mn2 is connected with the grid G of the second PMOS transistor MP2, the source S of the second NMOS transistor Mn2 is connected with the source S of the second PMOS transistor MP2, the drain D of the second PMOS transistor MP2 is grounded, the grid G of the second PMOS transistor MP2 is connected with the drain D of the second PMOS transistor MP2 through the second capacitor C2, and the common node of the source S of the second NMOS transistor Mn2 and the source S of the second PMOS transistor MP2 forms the output end of the second current pump 252 to output the second current Ic2. The working principle is the same as that of the first current pump 251, and will not be described again.
Preferably, in an embodiment, the first current Ic1 may be positive or negative, and the second current Ic2 is only positive, that is, the first current pump 251 may supply the NMOS transistor M of the input amplifying circuit 210 with in NMOS tube M for sinking current or inputting current into amplifying circuit 210 in The second current pump 252 can only sink current into the NMOS Mo of the output amplifier circuit 220. This can improve the stability of the output amplifying circuit 220.
Specifically, referring to fig. 6, fig. 6 is a detailed schematic diagram of a current multiplexing variable gain low noise amplifier according to an embodiment of the invention. As shown in fig. 6, the structure and principle of the first current pump 251 are the same as those of the first current pump 251 shown in fig. 5, and will not be described again. In contrast, the second current pump 252 shown in fig. 6 includes a second potentiometer R T2 And a second NMOS tube Mn2, a second potentiometer R T2 The first end of the second potentiometer R receives the second control signal K2 T2 A second end of the second NMOS tube Mn2 is connected with a drain electrode D of the second NMOS tube, and a second potentiometer R T1 Is connected with the control end of (a)The gate G of the second NMOS transistor Mn2 is grounded through the second capacitor C2, and the source S of the second NMOS transistor Mn2 forms the output terminal of the second current pump 252 to output the second current Ic2. In an embodiment, the second control signal K2 controls the second NMOS transistor Mn2 to be turned on, so that the second current pump 251 pumps current into the NMOS transistor Mo of the output amplifying circuit 220, thereby making the Gain2 of the output amplifying circuit 220 larger, and controlling the magnitude of the Gain2 of the output amplifying circuit 220 by controlling the magnitude of the second current Ic2.
Referring to fig. 7, fig. 7 is a schematic diagram of a current multiplexing variable gain low noise amplifier shown in fig. 6. As shown in fig. 7, the first and second current pumps 251 and 252 output different first and second currents Ic1 and Ic2 according to different control signals N-bits, so as to obtain a first gain curve 710, a second gain curve 720, a third gain curve 730 and a fourth gain curve 740. As shown in fig. 7, the minimum gain of the current multiplexing variable gain low noise amplifier may be about 18dB, and the maximum gain may be about 30dB, that is, the gain of the current multiplexing variable gain low noise amplifier may vary between about 18dB and about 30dB, so that the high variable gain is realized, and the control is flexible, the power consumption is low, and the system design is simple.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.
Claims (9)
1. A current multiplexing variable gain low noise amplifier, comprising:
the input amplifying circuit comprises an NMOS tube Min and is used for receiving an input signal and primarily amplifying the input signal;
the output amplifying circuit comprises an NMOS tube Mo, is used for receiving the signal output by the input amplifying circuit, and further amplifies the signal output by the input amplifying circuit and outputs an output signal;
the interstage coupling circuit is coupled between the input amplifying circuit and the output amplifying circuit and is used for transmitting signals output by the input amplifying circuit to the input end of the output amplifying circuit and carrying out current multiplexing;
the current control module receives a control signal, outputs a first current to the drain electrode of the NMOS tube Min of the input amplifying circuit and outputs a second current to the drain electrode of the NMOS tube Mo of the output amplifying circuit according to the control signal so as to respectively control the current flowing through the NMOS tube Min and the current flowing through the NMOS tube Mo;
the current control module comprises a first current pump, a second current pump and a digital-to-analog conversion circuit, wherein the digital-to-analog conversion circuit comprises an input end and is used for receiving a control signal and outputting a first control signal and a second control signal according to the control signal, the first control signal is output to the input end of the first current pump, the first current pump outputs a first current to the drain electrode of an NMOS tube Min of the input amplifying circuit according to the first control signal, the second control signal is output to the input end of the second current pump, and the second current pump outputs a second current to the drain electrode of an NMOS tube Mo of the output amplifying circuit according to the second control signal.
2. The current multiplexing variable gain low noise amplifier according to claim 1, wherein the input amplifying circuit further comprises an input coupling capacitor, a compensation capacitor and a feedback inductor, wherein the input signal is connected to one end of the input coupling capacitor, the other end of the input coupling capacitor is connected to one end of the compensation capacitor and the gate of the NMOS tube Min, the source and the substrate of the NMOS tube Min are connected to one end of the feedback inductor and the other end of the compensation capacitor, the other end of the feedback inductor is connected to the ground, and the drain of the NMOS tube Min forms the output end of the input amplifying circuit; the inter-stage coupling circuit comprises an inter-stage coupling capacitor, a blocking inductor and a grounding capacitor, wherein one end of the blocking inductor and one end of the inter-stage coupling capacitor are both connected with the drain electrode of the NMOS tube Min, the other end of the blocking inductor is connected with one end of the grounding capacitor, and the other end of the grounding capacitor is grounded; the output amplifying circuit further comprises a bias resistor, an output coupling capacitor, a load inductor and a load capacitor, the other end of the inter-stage coupling capacitor and one end of the bias resistor are connected with the grid electrode of the NMOS tube Mo, the other end of the blocking inductor is also connected with the source electrode of the NMOS tube Mo, the drain electrode of the NMOS tube Mo is connected with one end of the output coupling capacitor, one end of the load inductor and one end of the load capacitor, the other end of the output coupling capacitor outputs an output signal, and the other ends of the load inductor, the load capacitor and the bias resistor receive power supply voltage.
3. The current multiplexing variable gain low noise amplifier according to claim 1, further comprising a bias circuit for providing a bias voltage to the NMOS transistor Min by the bias voltage.
4. The current multiplexing variable gain low noise amplifier according to claim 1, wherein the first current pump comprises a first potentiometer, a first NMOS transistor Mn1 and a first PMOS transistor Mp1, a first end of the first potentiometer receives the first control signal, a second end of the first potentiometer is connected to a drain electrode of the first NMOS transistor Mn1, a control end of the first potentiometer is connected to a gate electrode of the first NMOS transistor Mn1 and a gate electrode of the first PMOS transistor Mp1, a source electrode of the first NMOS transistor Mn1 is connected to a source electrode of the first PMOS transistor Mp1, a drain electrode of the first PMOS transistor Mp1 is grounded, a gate electrode of the first PMOS transistor Mp1 is grounded through a first capacitor, and a common node of the source electrode of the first NMOS transistor Mn1 and a source electrode of the first PMOS transistor Mp1 forms an output end of the first current pump to output a first current;
the second current pump comprises a second potentiometer, a second NMOS tube Mn2 and a second PMOS tube MP2, wherein the first end of the second potentiometer receives the second control signal, the second end of the second potentiometer is connected with the drain electrode of the second NMOS tube Mn2, the control end of the second potentiometer RT1 is connected with the grid electrode of the second NMOS tube Mn2 and the grid electrode of the second PMOS tube MP2, the source electrode of the second NMOS tube Mn2 is connected with the source electrode of the second PMOS tube MP2, the drain electrode of the second PMOS tube MP2 is grounded, the grid electrode of the second PMOS tube MP2 is connected with the drain electrode of the second PMOS tube MP2 through a second capacitor, and the common node of the source electrode of the second NMOS tube Mn2 and the source electrode of the second PMOS tube MP2 forms the output end of the second current pump to output a second current.
5. The current multiplexing variable gain low noise amplifier of claim 4, wherein the first current is positive or negative and the second current is positive or negative.
6. The current multiplexing variable gain low noise amplifier according to claim 1, wherein the first current pump comprises a first potentiometer, a first NMOS transistor Mn1 and a first PMOS transistor Mp1, a first end of the first potentiometer receives the first control signal, a second end of the first potentiometer is connected to a drain electrode of the first NMOS transistor Mn1, a control end of the first potentiometer is connected to a gate electrode of the first NMOS transistor Mn1 and a gate electrode of the first PMOS transistor Mp1, a source electrode of the first NMOS transistor Mn1 is connected to a source electrode of the first PMOS transistor Mp1, a drain electrode of the first PMOS transistor Mp1 is grounded, a gate electrode of the first PMOS transistor Mp1 is grounded through a first capacitor, and a common node of the source electrode of the first NMOS transistor Mn1 and a source electrode of the first PMOS transistor Mp1 forms an output end of the first current pump to output a first current;
the second current pump comprises a second potentiometer and a second NMOS tube Mn2, the first end of the second potentiometer receives the second control signal, the second end of the second potentiometer is connected with the drain electrode of the second NMOS tube Mn2, the control end of the second potentiometer RT1 is connected with the grid electrode of the second NMOS tube Mn2, the grid electrode of the second NMOS tube Mn2 is grounded through a second capacitor, and the source electrode of the second NMOS tube Mn2 forms the output end of the second current pump to output a second current.
7. The current multiplexing variable gain low noise amplifier of claim 6, wherein the first current is a positive current or a negative current and the second current is a positive current.
8. The current multiplexing variable gain low noise amplifier of claim 1, wherein the first control signal and the second control signal are voltage signals.
9. The current multiplexing variable gain low noise amplifier of claim 1, wherein the control signal is a digital signal and the digital-to-analog conversion circuit converts the control signal from the digital signal to the analog first control signal and the second control signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010385255.XA CN111628730B (en) | 2020-05-09 | 2020-05-09 | Current multiplexing variable gain low noise amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010385255.XA CN111628730B (en) | 2020-05-09 | 2020-05-09 | Current multiplexing variable gain low noise amplifier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111628730A CN111628730A (en) | 2020-09-04 |
| CN111628730B true CN111628730B (en) | 2023-08-18 |
Family
ID=72272697
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010385255.XA Active CN111628730B (en) | 2020-05-09 | 2020-05-09 | Current multiplexing variable gain low noise amplifier |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111628730B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113206646B (en) * | 2021-04-14 | 2024-02-06 | 上海华虹宏力半导体制造有限公司 | Radio frequency amplifier |
| CN113783537A (en) * | 2021-08-12 | 2021-12-10 | 上海华虹宏力半导体制造有限公司 | Low noise amplifier |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101013911A (en) * | 2007-02-13 | 2007-08-08 | 鼎芯通讯（上海）有限公司 | Control circuit of radio-frequency variable gain amplifier and gain control method |
| CN102832885A (en) * | 2012-09-07 | 2012-12-19 | 电子科技大学 | Low-noise variable-gain mixer |
| CN109088604A (en) * | 2018-08-06 | 2018-12-25 | 上海华虹宏力半导体制造有限公司 | A kind of variable gain low-noise amplifier |
-
2020
- 2020-05-09 CN CN202010385255.XA patent/CN111628730B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101013911A (en) * | 2007-02-13 | 2007-08-08 | 鼎芯通讯（上海）有限公司 | Control circuit of radio-frequency variable gain amplifier and gain control method |
| CN102832885A (en) * | 2012-09-07 | 2012-12-19 | 电子科技大学 | Low-noise variable-gain mixer |
| CN109088604A (en) * | 2018-08-06 | 2018-12-25 | 上海华虹宏力半导体制造有限公司 | A kind of variable gain low-noise amplifier |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111628730A (en) | 2020-09-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7315211B1 (en) | Sliding bias controller for use with radio frequency power amplifiers | |
| US6259321B1 (en) | CMOS variable gain amplifier and control method therefor | |
| JP4956059B2 (en) | Variable gain amplifier | |
| KR100705326B1 (en) | Feedback-type variable gain amplifier and method of controlling the same | |
| US7812641B2 (en) | Wireline transmission circuit | |
| JP4664835B2 (en) | Regulator structure with variable amplifier | |
| US8279004B2 (en) | System for driver amplifier | |
| CN111628730B (en) | Current multiplexing variable gain low noise amplifier | |
| CN110808714B (en) | Radio frequency power amplifier for realizing multi-band switching and anti-saturation | |
| US20090072905A1 (en) | Variable gain amplifier having wide gain variation and wide bandwidth | |
| CN109951161B (en) | Complementary digital variable gain amplifier | |
| US6496067B1 (en) | Class AB voltage current convertor having multiple transconductance stages and its application to power amplifiers | |
| WO2016152267A1 (en) | Amplifier and electronic circuit | |
| CN110808721B (en) | Anti-saturation current-mode control radio frequency power amplifier | |
| KR20030043892A (en) | Adaptive bias circuit for power amplifier | |
| US7378905B2 (en) | Differential driver circuit | |
| CN110808720B (en) | Anti-saturation radio frequency power amplifier | |
| US11362629B2 (en) | Transimpedance amplifier circuit | |
| US20070096827A1 (en) | Multi controlled output levels cmos power amplifier (pa) | |
| JP4252423B2 (en) | Variable amplifier and portable radio terminal using the same | |
| JP4444174B2 (en) | Frequency converter and radio | |
| US7688145B2 (en) | Variable gain amplifying device | |
| KR100864898B1 (en) | CMOS variable gain amplifier | |
| JP2007235525A (en) | Variable gain amplifier circuit, semiconductor integrated circuit, output power adjustment circuit, output power adjustment method, transmitter, receiver, and transceiver | |
| CN111697936B (en) | Low-power consumption complementary digital variable gain amplifier |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |