CN111625485A - Method for designing program downloader and program downloader system - Google Patents

Method for designing program downloader and program downloader system Download PDF

Info

Publication number
CN111625485A
CN111625485A CN201910150053.4A CN201910150053A CN111625485A CN 111625485 A CN111625485 A CN 111625485A CN 201910150053 A CN201910150053 A CN 201910150053A CN 111625485 A CN111625485 A CN 111625485A
Authority
CN
China
Prior art keywords
program
processor
combination
download
program downloader
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201910150053.4A
Other languages
Chinese (zh)
Inventor
马传宝
杨玉良
李占坤
刘春芳
熊雪峰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SAIC General Motors Corp Ltd
Pan Asia Technical Automotive Center Co Ltd
Original Assignee
SAIC General Motors Corp Ltd
Pan Asia Technical Automotive Center Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SAIC General Motors Corp Ltd, Pan Asia Technical Automotive Center Co Ltd filed Critical SAIC General Motors Corp Ltd
Priority to CN201910150053.4A priority Critical patent/CN111625485A/en
Publication of CN111625485A publication Critical patent/CN111625485A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/362Software debugging
    • G06F11/3648Software debugging using additional hardware
    • G06F11/3652Software debugging using additional hardware in-circuit-emulation [ICE] arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/362Software debugging
    • G06F11/3648Software debugging using additional hardware
    • G06F11/3656Software debugging using additional hardware using a specific debug interface
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

The present invention relates to electronic information technology, and more particularly, to a method for designing a program downloader, a program downloader system, a computer device implementing the method, and a computer-readable storage medium. A method for designing a program downloader according to an aspect of the present invention comprises the steps of: classifying the download ports according to their attributes; combining the download ports based on the classification results to integrate them in the same program downloader; and designing a corresponding plug based on the form of the download port.

Description

Method for designing program downloader and program downloader system
Technical Field
The present invention relates to electronic information technology, and more particularly, to a method for designing a program downloader, a program downloader system, a computer device implementing the method, and a computer-readable storage medium.
Background
With the rapid development of electronic information technology, various single-core or multi-core processor chips are layered in a large number. Due to the different internal structures and programming software used in various processors, the downloading modes are diversified, and the diversity is mainly reflected in the following aspects: different processors use different download ports; and the same processor has a number of different forms of download ports.
The above-mentioned diversity of the download port causes technicians to prepare various downloaders in the process of programming and debugging, which increases the debugging cost and the complexity of the work.
Disclosure of Invention
To achieve one or more of the above objects, the present invention provides the following technical solutions.
According to a first aspect of the present invention, there is provided a method for designing a program downloader, comprising the steps of: classifying the download ports according to their attributes; combining the download ports based on the classification results to integrate them in the same program downloader; and
and designing a corresponding plug based on the form of the download port.
According to an embodiment of the invention, the method for designing the program downloader comprises the following steps of: quantity, type, operating conditions and frequency of use.
A method for designing a program downloader according to another embodiment of the invention or any of the embodiments above, wherein the combination comprises one or more of the following: the combination of all-in-one for different download ports in different processors, the combination of all-in-one for specific conditions, the combination of all-in-one for different download ports in the same processor, and the combination of all-in-one for frequency of use.
According to a second aspect of the present invention, there is provided a program downloader system comprising: an emulator interface module connected to an emulator for communicatively coupling the emulator with the program downloader system; a signal integration module connected to the emulator interface module for receiving signals from the emulator interface module; and a processor interface module connected to the signal integration module to receive the signal from the signal integration module and transmit the signal to a processor.
The program downloader system according to an embodiment of the second aspect of the invention, wherein the emulator interface module is configured to classify download ports according to their number, kind, condition and frequency of use and combine the download ports based on the classification result to be integrated in the same program downloader system.
The program downloader system according to an embodiment of the second aspect of the invention or any of the embodiments above, wherein the combination comprises one or more of: the combination of all-in-one for different download ports in different processors, the combination of all-in-one for specific conditions, the combination of all-in-one for different download ports in the same processor, and the combination of all-in-one for frequency of use.
The program downloader system according to an embodiment of the second aspect of the invention or any of the embodiments above, wherein the emulator interface module is further configured to design a respective patch plug based on the form of the download port.
The program downloader system according to an embodiment of the second aspect of the invention or any of the embodiments above, wherein the program downloader system is communicatively coupled to the processor.
According to a third aspect of the present invention, there is provided a computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor executes the program to implement the method for designing a program downloader as described in any one of the embodiments of the first aspect of the present invention.
According to a fourth aspect of the present invention, there is provided a computer readable storage medium having stored thereon a computer program, wherein the program is capable, when executed by a processor, of implementing a method for designing a program downloader according to any of the embodiments of the first aspect of the present invention.
According to an aspect of the present invention, the method for designing a program downloader as described above may be adopted, and the method may multiplex download ports of various downloaders (e.g., single-core or multi-core processors such as MCU, DSP, etc.) based on similarity of internal software and hardware configurations, so as to avoid waste of resources and reduce complexity of work. In addition, corresponding plug is designed based on the interface forms of various download ports, so that the plug is convenient for a user to plug and unplug.
Other features and advantages of the methods and systems of the present invention will be more particularly apparent from or elucidated with reference to the drawings described herein, and the following detailed description of the embodiments used to illustrate certain principles of the invention.
Drawings
The above and/or other aspects and advantages of the present invention will become more apparent and more readily appreciated from the following description of the various aspects taken in conjunction with the accompanying drawings, in which like or similar elements are designated with like reference numerals. The drawings comprise:
FIG. 1 is a flowchart of a method for designing a program downloader according to an embodiment of the invention.
Fig. 2 is a schematic diagram of a program downloader system according to an embodiment of the invention.
Fig. 3a to 3d are schematic diagrams of a program downloader system according to an embodiment of the present invention.
FIG. 4 is a schematic block diagram of a computer device according to an embodiment of the present invention.
Detailed Description
In this specification, the invention is described more fully with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. This invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. The embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
Words such as "comprising" and "comprises" mean that, in addition to having elements or steps which are directly and explicitly stated in the description, the solution of the invention does not exclude other elements or steps which are not directly or explicitly stated. Terms such as "first" and "second" do not denote an order of the elements in time, space, size, etc., but rather are used to distinguish one element from another.
The present invention is described below with reference to flowchart illustrations, block diagrams, and/or flow diagrams of methods and systems according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block and/or flow diagram block or blocks.
These computer program instructions may be stored in a computer-readable memory that can direct a computer or other programmable processor to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function/act specified in the flowchart and/or block diagram block or blocks.
The computer program instructions may be loaded onto a computer or other programmable data processor to cause a series of operational steps to be performed on the computer or other programmable processor to produce a computer implemented process such that the instructions which execute on the computer or other programmable processor provide steps for implementing the functions or acts specified in the flowchart and/or block diagram block or blocks. It should also be noted that, in some alternative implementations, the functions/acts noted in the blocks may occur out of the order noted in the flowcharts. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality/acts involved.
FIG. 1 is a flowchart of a method for designing a program downloader according to an embodiment of the invention.
As shown in fig. 1, in step 110, the download ports are classified according to their attributes. Optionally, the attributes of the download port include one or more of the following: quantity, type, operating conditions and frequency of use. Thereafter, step 120 is entered.
In step 120, the download ports are combined based on the classification result to be integrated in the same program downloader, wherein the combination mode comprises one or more of the following items: the combination of all-in-one for different download ports in different processors, the combination of all-in-one for specific conditions, the combination of all-in-one for different download ports in the same processor, and the combination of all-in-one for frequency of use. By way of example, two, three, etc. of the download ports (e.g., JTAG, SWD, DAP, ST-Link, etc. ports with similar functions) with high frequency of use may be grouped, or combined in multiple for different specific conditions and specific requirements, or combined in multiple for the same processor. Thereafter, step 130 is entered.
In step 130, a corresponding plug is designed based on the form of the download port. The form is associated with the combination in step 120.
Fig. 2 is a schematic diagram of a program downloader system according to an embodiment of the invention.
As shown in FIG. 2, the program downloader system 20 includes an emulator interface module 210 connected to the emulator for communicatively coupling the emulator with the program downloader system to functionally ensure that signals are communicatively transmitted between the emulator and the program downloader system; a signal integration module 220 connected to the simulator interface module 210 for receiving signals from the simulator interface module 210; and a processor interface module 230 connected to the signal integration module to receive the signal from the signal integration module and transmit the signal to a processor.
Specifically, the signal integration module 220 is configured to connect the simulator interface module 210 and the processor interface module 230, so as to collect signals received by the simulator interface module 210 from the simulator, and group and integrate the signals according to the requirements of specific conditions and devices, so as to multiplex the functional ports capable of being multiplexed according to the specific requirements of the specific conditions and devices, and simultaneously ensure that the signals are accurately transmitted to the processor interface module 230. The processor interface module 230 is used to connect the program downloader system 20 to the processor to functionally ensure that signals are communicated prior to the processor and the program downloader system 20. Optionally, the program downloader system 20 is communicatively coupled to the processor, and the coupling may be a wired connection, a wireless connection, or any other connection that enables reliable communication of signals.
Fig. 3a to 3d are schematic diagrams of a program downloader system according to an embodiment of the present invention. Based on the classification and combination for the download ports described in fig. 1, as an example, fig. 3a shows an all-in-one combination for different download ports in different processors, fig. 3b shows an all-in-one combination for a specific condition, fig. 3c shows an all-in-one combination for different download ports in the same processor, and fig. 3d shows an all-in-one combination for different download ports with higher frequency of use.
In fig. 3a, different download ports (e.g., JTAG, SWD, DAP, ST-Link, etc. with similar functions) of various processors are combined into one of two, three, four, etc. in a signal integration circuit according to specific requirements of operating conditions and devices, and signals are accurately transmitted to an output interface. In fig. 3b, different download ports (e.g., JTAG, SWD, DAP, ST-Link, etc. with similar functions) of various processors are combined into a signal integration circuit in a two-in-one, three-in-one, four-in-one, and so on for specific conditions, and simultaneously, signals are ensured to be accurately transmitted to the output interface. In fig. 3c, different ports of the same processor are combined into one of two-in-one, three-in-one, four-in-one, and so on in the signal integration circuit, and the signals are accurately transmitted to the output interface. In fig. 3d, the download port with higher frequency of use is combined into two-in-one, three-in-one, four-in-one, and so on in the signal integration circuit, and meanwhile, the signal is ensured to be accurately transmitted to the output interface.
FIG. 4 is a schematic block diagram of a computer device 40 according to an embodiment of the present invention. The computer device 40 comprises a memory 410, a processor 420 and a computer program 430 stored on said memory 410 and executable on said processor 420. The processor 420 runs the program to implement the method for designing a program downloader described above.
According to a further aspect of the present invention, there is also provided a computer-readable storage medium, on which a computer program is stored, which program, when being executed by a processor, is adapted to carry out the above-mentioned method for designing a program downloader.
According to the method for designing the program downloader, the concept of multiplexing the download ports is provided, and the download ports are multiplexed based on the similarity of the software and hardware structures of the program downloader, so that the waste of resources is avoided, and the complexity of the work of technicians is reduced.
The embodiments and examples set forth herein are presented to best explain the embodiments in accordance with the present technology and its particular application and to thereby enable those skilled in the art to make and utilize the invention. However, those skilled in the art will recognize that the foregoing description and examples have been presented for the purpose of illustration and example only. The description as set forth is not intended to cover all aspects of the invention or to limit the invention to the precise form disclosed.

Claims (10)

1. A method for designing a program downloader, comprising the steps of:
classifying the download ports according to their attributes;
combining the download ports based on the classification results to integrate them in the same program downloader; and
and designing a corresponding plug based on the form of the download port.
2. The method of claim 1, wherein the attributes of the download port include one or more of: quantity, type, operating conditions and frequency of use.
3. The method of claim 1, wherein the combination comprises one or more of: the combination of all-in-one for different download ports in different processors, the combination of all-in-one for specific conditions, the combination of all-in-one for different download ports in the same processor, and the combination of all-in-one for frequency of use.
4. A program downloader system, comprising:
an emulator interface module connected to an emulator for communicatively coupling the emulator with the program downloader system;
a signal integration module connected to the emulator interface module for receiving signals from the emulator interface module; and
a processor interface module connected to the signal integration module to receive the signal from the signal integration module and transmit the signal to a processor.
5. The system of claim 4, wherein the emulator interface module is configured to classify download ports according to their number, type, behavior, and frequency of use and combine the download ports based on the classification results to integrate them in the same program downloader system.
6. The system of claim 5, wherein the combination comprises one or more of: the combination of all-in-one for different download ports in different processors, the combination of all-in-one for specific conditions, the combination of all-in-one for different download ports in the same processor, and the combination of all-in-one for frequency of use.
7. The system of claim 4, wherein the emulator interface module is further configured to design a corresponding plug based on a form of the download port.
8. The system of any of claims 4 to 7, wherein the program downloader system is communicatively coupled with a processor.
9. A computer device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor executes the program to implement:
a method for designing a program downloader according to any one of claims 1 to 3.
10. A computer-readable storage medium on which a computer program is stored, the program being executable by a processor to perform:
a method for designing a program downloader according to any one of claims 1 to 3.
CN201910150053.4A 2019-02-28 2019-02-28 Method for designing program downloader and program downloader system Pending CN111625485A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910150053.4A CN111625485A (en) 2019-02-28 2019-02-28 Method for designing program downloader and program downloader system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910150053.4A CN111625485A (en) 2019-02-28 2019-02-28 Method for designing program downloader and program downloader system

Publications (1)

Publication Number Publication Date
CN111625485A true CN111625485A (en) 2020-09-04

Family

ID=72272433

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910150053.4A Pending CN111625485A (en) 2019-02-28 2019-02-28 Method for designing program downloader and program downloader system

Country Status (1)

Country Link
CN (1) CN111625485A (en)

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20050096302A (en) * 2004-03-30 2005-10-06 에스케이텔레텍주식회사 Method for recognizing universal serial bus in multi download in mobile phone having multi-processor and mobile phone implementing the same
CN202352145U (en) * 2011-11-21 2012-07-25 广州市风标电子技术有限公司 Single chip microcomputer experiment system based on Proteus
CN202534200U (en) * 2011-11-30 2012-11-14 运城学院 Experiment system based on CPLD/FPGA module
CN104021105A (en) * 2014-06-17 2014-09-03 成都联星微电子有限公司 Multifunctional interface expansion device and method based on ARM
CN105117248A (en) * 2015-08-20 2015-12-02 浙江中科领航汽车电子有限公司 Program downloader of multi-split TPMS main controller and download method
CN105204393A (en) * 2015-08-13 2015-12-30 彭增金 Single-chip microcomputer production research and development tool based on virtual nucleus single-chip microcomputer and realization method thereof
CN107341111A (en) * 2017-09-08 2017-11-10 北京奥博泰科技有限公司 A kind of multi-functional embedded system development tools of USB interface
CN207690069U (en) * 2017-12-29 2018-08-03 成都天可精创科技有限公司 A kind of Multifunctional downloader and converting system
CN109344022A (en) * 2018-07-22 2019-02-15 广州市星翼电子科技有限公司 The multi-functional downloading debugging apparatus of one kind and adjustment method

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20050096302A (en) * 2004-03-30 2005-10-06 에스케이텔레텍주식회사 Method for recognizing universal serial bus in multi download in mobile phone having multi-processor and mobile phone implementing the same
CN202352145U (en) * 2011-11-21 2012-07-25 广州市风标电子技术有限公司 Single chip microcomputer experiment system based on Proteus
CN202534200U (en) * 2011-11-30 2012-11-14 运城学院 Experiment system based on CPLD/FPGA module
CN104021105A (en) * 2014-06-17 2014-09-03 成都联星微电子有限公司 Multifunctional interface expansion device and method based on ARM
CN105204393A (en) * 2015-08-13 2015-12-30 彭增金 Single-chip microcomputer production research and development tool based on virtual nucleus single-chip microcomputer and realization method thereof
CN105117248A (en) * 2015-08-20 2015-12-02 浙江中科领航汽车电子有限公司 Program downloader of multi-split TPMS main controller and download method
CN107341111A (en) * 2017-09-08 2017-11-10 北京奥博泰科技有限公司 A kind of multi-functional embedded system development tools of USB interface
CN207690069U (en) * 2017-12-29 2018-08-03 成都天可精创科技有限公司 A kind of Multifunctional downloader and converting system
CN109344022A (en) * 2018-07-22 2019-02-15 广州市星翼电子科技有限公司 The multi-functional downloading debugging apparatus of one kind and adjustment method

Similar Documents

Publication Publication Date Title
CN104050068B (en) The method of FPGA Debugging and device in MCU chip
CN107203465B (en) System interface testing method and device
CN106598636A (en) Firmware upgrading method and device for unmanned aerial vehicle
CN108170626B (en) 1553B bus software dynamic configurable method
CN106598639B (en) Logic chip upgrading method and upgrading system
CN112948272A (en) Production environment-based data test system function method and device and related equipment
CN110235393A (en) Automated testing method and system
CN104050067A (en) Method and device for operation of FPGA (Field Programmable Gate Array) in MCU (Microprogrammed Control Unit) chip
CN108231132B (en) NAND flash memory verification device and verification system
CN109542794A (en) A kind of Software Automatic Testing Method applied to embedded system
CN110831049B (en) Network performance testing method and device
CN106708688B (en) Module test method and terminal
CN110569129A (en) Resource allocation method and device, storage medium and electronic device
CN111966597B (en) Test data generation method and device
CN111625485A (en) Method for designing program downloader and program downloader system
CN103176903B (en) The test method and equipment of MapReduce distributed system program
CN116341443A (en) Peripheral equipment distribution method and system based on multi-FPGA prototype verification cloud platform
CN110334000A (en) A kind of test method based on MOCK technology
CN106961023A (en) A kind of antenna compatible system
CN111147400B (en) Method and device for command line configuration synchronization and electronic equipment
CN111123727B (en) Unmanned vehicle simulation building method, device, equipment and computer readable medium
CN113992909A (en) System and method for testing MIPI D-PHY interface camera module
CN111061662A (en) Compiling system and method for expanding FPGA (field programmable Gate array) interconnected IO (input/output) based on connector
US9336011B2 (en) Server and booting method
CN115983192B (en) Verification system and method for configuring peripheral sub-card resources of verification system

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination