CN111614328A - Drive circuit structure for improving linearity - Google Patents
Drive circuit structure for improving linearity Download PDFInfo
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- CN111614328A CN111614328A CN202010314173.6A CN202010314173A CN111614328A CN 111614328 A CN111614328 A CN 111614328A CN 202010314173 A CN202010314173 A CN 202010314173A CN 111614328 A CN111614328 A CN 111614328A
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- H03—ELECTRONIC CIRCUITRY
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- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
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- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
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- H03F1/3205—Modifications of amplifiers to reduce non-linear distortion in field-effect transistor amplifiers
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Abstract
The embodiment of the application discloses a driving circuit structure for improving linearity, which comprises a first power tube and a second power tube; the second power tube is connected with the first power tube in parallel, and static bias points of the second power tube and the first power tube are located in different working areas, so that the second power tube is used for compensating transconductance nonlinearity of the first power tube; the working area is used for indicating the working state of the power tube, and the working state comprises a conducting state and a switching-off state; therefore, the transconductance nonlinearity of the first power tube is compensated through the second power tube, and the transconductance linearity of the driving circuit can be improved.
Description
Technical Field
The present application relates to the field of integrated circuits, and more particularly, to a driving circuit structure for improving linearity.
Background
With the development of digital communication technology, cmos power amplifiers have been widely used in communication technology due to their advantages of low cost, small area and high integration, but their high nonlinearity makes their design very challenging. The nonlinearity of the power amplifier not only causes spectrum spreading and interference with other channel signals, but also causes amplitude and phase distortion of a transmission signal, and thus it is very important in the design of the power amplifier to improve the linearity of the power amplifier. Meanwhile, the nonlinearity of the power amplifier is mainly caused by the transconductance nonlinearity of a power tube in the circuit, so that the improvement of the transconductance linearity of the driving circuit is the key point for solving the nonlinearity problem of the power amplifier.
Disclosure of Invention
In view of this, the embodiment of the present application provides a driving circuit structure for improving linearity, in which an auxiliary power tube is introduced to compensate for the nonlinearity of a main power tube, so as to improve transconductance linearity of the driving circuit.
The technical scheme of the embodiment of the application is realized as follows:
the embodiment of the application provides a driving circuit structure for improving linearity, which comprises a first power tube and a second power tube; wherein the content of the first and second substances,
the second power tube is connected with the first power tube in parallel, and static bias points of the second power tube and the first power tube are located in different working areas, so that the second power tube is used for compensating transconductance nonlinearity of the first power tube; the working area is used for indicating the working state of the power tube, and the working state comprises a conducting state and a switching-off state.
In the above scheme, the first power tube and the second power tube adopt a common source structure, so that the second power tube is used for compensating for transconductance nonlinearity of the first power tube.
In the above scheme, the operating current of the second power tube is smaller than the operating current of the first power tube.
In the above scheme, a third-order transconductance value corresponding to the second power tube is used to offset a third-order transconductance value corresponding to the first power tube, so that the second power tube is used to compensate for a transconductance nonlinearity of the first power tube; and the third-order transconductance value is obtained by calculating the third-order derivative of the transconductance of the power tube.
In the above scheme, a third-order transconductance value corresponding to the second power tube is controlled by adjusting a channel width-to-length ratio and/or a static bias point of the second power tube, so that the second power tube is used for compensating for a transconductance nonlinearity of the first power tube; wherein, the channel width-length ratio represents the ratio of the channel width and the channel length of the power tube.
In the above scheme, the working region includes at least a linear region and a subthreshold region; wherein the content of the first and second substances,
the static bias point of the first power tube is located in a linear region, so that the third-order transconductance value of the first power tube is a positive value;
and the static bias point of the second power tube is positioned in the subthreshold region, so that the third-order transconductance value of the second power tube is a negative value.
In the above scheme, the first power transistor is a metal oxide semiconductor field effect transistor, and pins of the first power transistor include a gate pin, a source pin and a drain pin;
the second power tube is a metal oxide semiconductor field effect transistor, and pins of the second power tube comprise a grid pin, a source pin and a drain pin.
In the above scheme, the drain pin of the first power tube is connected to the drain pin of the second power tube, the source pin of the first power tube is connected to the source pin of the second power tube, and the gates of the first power tube and the second power tube are biased in different states, so that the first power tube and the second power tube are connected in parallel.
In the above scheme, the driving circuit structure further includes a third power transistor; wherein the content of the first and second substances,
and the source pin of the third power tube is connected with the drain pin of the first power tube and the drain pin of the second power tube, so that power amplification is realized through the first power tube, the second power tube and the third power tube.
The embodiment of the present application further provides a power amplifier, where the power amplifier at least includes the foregoing driving circuit structure.
An embodiment of the present application further provides an electronic device, where the electronic device at least includes the foregoing power amplifier.
The embodiment of the application provides a driving circuit structure for improving linearity, which comprises a first power tube and a second power tube; the second power tube is connected with the first power tube in parallel, and static bias points of the second power tube and the first power tube are located in different working areas, so that the second power tube is used for compensating transconductance nonlinearity of the first power tube; the working area is used for indicating the conducting state of the power tube; therefore, the transconductance nonlinearity of the first power tube is compensated through the second power tube, the transconductance linearity of the driving circuit structure can be improved, and the interference of other channel signals caused by spectrum expansion is avoided; meanwhile, the linearity of the power amplifier can be improved by introducing the second power tube, the circuit area of the power amplifier is not additionally increased, and the bias current of the power amplifier is not increased.
Drawings
Fig. 1 is a schematic diagram of operating characteristics and transconductance of an MOS transistor according to a related art;
fig. 2 is a schematic diagram of a high-order transconductance curve of an MOS transistor according to the related art;
fig. 3 is a schematic structural diagram of a driving circuit according to an embodiment of the present disclosure;
fig. 4 is a schematic diagram of a third order transconductance curve of a driving circuit according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of another driving circuit provided in the embodiment of the present application;
fig. 6 is a schematic structural diagram of a power amplifier according to an embodiment of the present disclosure;
fig. 7 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.
With the development of digital communication technology, a Power Amplifier (PA), referred to as CMOS PA for short, of a Complementary Metal Oxide Semiconductor (CMOS) Power Amplifier has the advantages of low cost, small area and high integration level, but the CMOS PA has the characteristic of high nonlinearity, so that the design of the CMOS PA is very challenging. The nonlinearity of the power amplifier not only causes spectrum spreading and interference with other channel signals, but also causes amplitude and phase distortion of a transmission signal, and thus it is very important in the design of the power amplifier to improve the linearity of the power amplifier.
In the power amplifier, a power transistor mainly plays a role in power amplification, and may generally include a triode or a MOS transistor. For the triode, three electrodes of an emitter, a base and a collector exist, and when the voltage of the emitter is smaller than the conduction voltage, the triode is in a cut-off state; when the emitting electrode is conducted in the forward direction and the collecting electrode is conducted in the reverse direction, the triode is in an amplifying state; when the emitter is conducted in the forward direction and the collector is also conducted in the forward direction, the triode is in a saturation state. For a MOS transistor, there are three electrodes, namely a source (S-stage), a drain (D-stage) and a gate (G-stage), and when the MOS transistor is in different voltage states, there are also different operating states. Preferably, the power transistor is a MOS transistor for example.
(1) When V isgs<VtnIn which V isgsRepresenting the voltage between gate and source, VtnRepresenting threshold voltage, theoretically, no channel is generated in the MOS tube at the moment, no drain current exists, and the MOS tube is in a turn-off state, so that the MOS tube is called a cut-off region; further, when Vgs<VtnAnd V isgsGradually rise to close to VtnIn the method, although a conducting channel is not generated in the MOS tube, a weak inversion layer on the surface is generated, so that current flowing from a drain to a source is generated and is called as sub-threshold current, and the region is called as a sub-threshold region;
(2) when V isgs≥VtnAnd V isds<Vgs-VtnWherein V isdsRepresenting the voltage between the drain and the source, the MOS transistor starts to generate a channel in a conducting state, and the current is at the momentIncreases with increasing gate voltage, so called the linear region;
(3) when V isgs≥VtnAnd V isds>Vgs-VtnWhen V isdsThe current is saturated by increasing the channel so that it is pinched off at the drain terminal, at which point the current no longer increases as the gate voltage increases, so called the saturation region.
In practical use, in order to reduce dc bias and not reduce rf gain, the static operating point of the power transistor is generally biased in a linear region, and at this time, transconductance of the power transistor is non-linear, see fig. 1, which shows an operating characteristic and transconductance diagram of an MOS transistor in a related art scheme, where an X axis (i.e., a horizontal axis) represents a voltage of a gate relative to a source, i.e., VgsThe Y-axis (i.e. vertical axis) represents the drain current IdAnd transconductance gmThe transconductance is IdAnd VgsThe ratio of (A) to (B); as shown in FIG. 1, gmWith VgsThe increase in (b) exhibits a non-linear variation. The transconductance nonlinearity of the power tube causes nonlinearity of the power amplifier, thereby generating third-order intermodulation distortion of signals, wherein the intermodulation is that signals of different channels interfere with each other. The intermodulation interference signal has components of third, fifth, seventh and more orders, but the interference degree is strongest due to the largest component of the third order intermodulation, so the nonlinearity of the radio frequency device is generally measured by the third order intermodulation. Referring to fig. 2, a schematic diagram of a high-order transconductance curve of a MOS transistor provided in the related art is shown, wherein an X-axis (i.e., a horizontal axis) represents a voltage of a gate with respect to a source, i.e., VgsThe Y axis (vertical axis) represents the second-order transconductance value g of the MOS tubem2And third-order transconductance value g of MOS tubem3The third-order transconductance nonlinearity of the MOS transistor is a main cause of third-order intermodulation distortion generated by the signal.
At present, there are many methods for improving the transconductance linearity of the driving circuit, such as a feed-forward technique, a Cartesian (Cartesian) feedback technique, and a predistortion technique, where the feed-forward technique is a main technique for improving the linearity of the power amplifier, but because the feed-forward technique is an open-loop system, the feed-forward technique is relatively sensitive to load, environment, or device changes, and complicated digital and analog modules are required for calibration, thereby increasing the power consumption of the power amplifier. The Cartesian feedback technique requires complex circuitry and is therefore more suitable for baseband rather than handheld devices, and the feedback loop of the Cartesian feedback technique limits the signal bandwidth and introduces instability factors; the predistortion technology is simple in design, does not increase the circuit area basically, and is widely applied to improving the linearity of the power amplifier. However, the above techniques are all to cancel the nonlinearity of the power tube itself by adding an additional nonlinear device.
Based on this, the embodiment of the application provides a driving circuit structure for improving linearity, where the driving circuit structure includes a first power tube and a second power tube; the second power tube is connected with the first power tube in parallel, and static bias points of the second power tube and the first power tube are located in different working areas, so that the second power tube is used for compensating transconductance nonlinearity of the first power tube; the working area is used for indicating the working state of the power tube, and the working state comprises a conducting state and a switching-off state; therefore, the transconductance nonlinearity of the first power tube is compensated through the second power tube, the transconductance linearity of the driving circuit structure can be improved, and the interference of other channel signals caused by spectrum expansion is avoided; meanwhile, the linearity of the power amplifier can be improved by introducing the second power tube, the circuit area of the power amplifier is not additionally increased, and the bias current of the power amplifier is not increased.
The present application will be described in further detail with reference to the following drawings and specific embodiments.
Referring to fig. 3, a structural schematic diagram of a driving circuit 10 provided in the embodiment of the present application is shown, and as shown in fig. 3, the driving circuit 10 may include a first power transistor 101 and a second power transistor 102; wherein the content of the first and second substances,
the second power tube 102 is connected in parallel with the first power tube 101, and the static bias points of the second power tube 102 and the first power tube 101 are located in different working regions, so that the second power tube 102 is used for compensating the transconductance nonlinearity of the first power tube 101; the working area is used for indicating the working state of the power tube, and the working state comprises a conducting state and a switching-off state.
Fig. 3 shows an example of the configuration of the driver circuit 10, which may be referred to as a driver circuit configuration. In this driving circuit configuration, in order to compensate for the nonlinearity of the first power transistor 101, a second power transistor 102, which is also a nonlinear device, is connected in parallel with the first power transistor 101. At this time, the transconductance value g of the circuit after the first power tube 101 and the second power tube 102 are connected in parallelmTransconductance value g of the first power tube 101m_MN1And third order transconductance value g of the second power tube 102m_MN2There is a relationship as shown in formula (1):
gm＝gm_MN1+gm_MN2(1)
in this way, the transconductance value of the driving circuit 10 can be adjusted by using the second power tube 102, so that the transconductance linearity of the entire driving circuit is improved, and the third-order intermodulation distortion of the signal is reduced.
In some embodiments, the operating current of the second power transistor 102 is smaller than the operating current of the first power transistor 101.
It should be noted that the second power transistor 102 is only used for compensating the third-order transconductance value of the first power transistor 101 to improve the transconductance linearity of the driving circuit 10, and the main element of the driving circuit 10 is still the first power transistor 101, so that the working current of the second power transistor 102 needs to be controlled to be smaller than that of the first power transistor 101, so that no additional bias current is added after the first power transistor 101 and the second power transistor 102 are connected in parallel.
In some embodiments, a third order transconductance value corresponding to the second power tube 102 is used to offset a third order transconductance value corresponding to the first power tube 101, so that the second power tube 102 is used to compensate for a transconductance nonlinearity of the first power tube 101; and the third-order transconductance value is obtained by calculating the third-order derivative of the transconductance of the power tube.
It should be noted that theoretically, the maximum influence of the nonlinearity of the driving circuit on the signal is the third-order intermodulation distortionThe compensation of the transconductance nonlinearity of the first power tube 101 by using the second power tube 102 actually means the compensation of a third-order transconductance value, that is, the third-order transconductance value is obtained by calculating a third-order derivative of the transconductance of the power tube. After the first power tube 101 and the second power tube 102 are connected in parallel, the third order transconductance value g of the driving circuitm3Third-order transconductance value g of first power tube 101m3_MN1And third order transconductance value g of the second power tube 102m3_MN2There is a relationship as shown in formula (2):
gm3＝gm3_MN1+gm3_MN2(2)
in some embodiments, by adjusting the channel width-to-length ratio and/or the static bias point of the second power tube 102, the third order transconductance value corresponding to the second power tube 102 is controlled, so that the second power tube 102 is used to compensate the transconductance nonlinearity of the first power tube 101; wherein, the channel width-length ratio represents the ratio of the channel width and the channel length of the power tube.
It should be noted that, for a power transistor, there are many factors that determine the third-order transconductance value of the power transistor, mainly the channel width-to-length ratio, which is the ratio of the width to the length of the conductive channel in the power transistor, and the bias current. The larger the channel width-length ratio is, the larger the output current of the power tube is under the same input voltage; the bias current is bias current provided by the bias circuit for the power tube, so that the working state of the power tube is determined. For the second power tube 102 to function only as an auxiliary in the circuit, the determination needs to be made based on the conditions of the existing circuit. That is, the second power transistor 102 may be selected according to the bias current provided by the driving circuit 10 (the bias current determines the quiescent operating point) and the third order transconductance value of the first power transistor 101.
In some embodiments, the first power transistor 101 is a metal oxide semiconductor field effect transistor, and the pins of the first power transistor 101 include a gate pin, a source pin, and a drain pin;
the second power transistor 102 is a metal oxide semiconductor field effect transistor, and the pins of the second power transistor 102 include a gate pin, a source pin, and a drain pin.
It should be noted that, in actual use, a common power transistor may be an MOS transistor, so both the first power transistor 101 and the second power transistor 102 may be MOS transistors; for a MOS transistor, there are three pins, gate, source and drain. In addition, the MOS tube can also comprise an N-type MOS tube or a P-type MOS tube; besides the MOS transistor, a triode may also be used as a power transistor, and the embodiment of the present application is not limited.
In some embodiments, the first power transistor 101 and the second power transistor 102 adopt a common source structure, so that the second power transistor 102 is used for compensating for transconductance nonlinearity of the first power transistor 101.
It should be noted that, for the driving circuit 10 using the MOS transistor as the amplifying element, three basic forms of common source, common gate and common drain may be adopted, wherein the common source circuit has the widest utilization rate, and its equivalent circuit is equivalent to the source grounded, which can play a role of reverse amplification, and has high voltage gain.
In some embodiments, the drain pin of the first power transistor 101 is connected to the drain pin of the second power transistor 102, the source pin of the first power transistor 101 is connected to the source pin of the second power transistor 102, and the gates of the first power transistor 101 and the second power transistor 102 are biased in different states, so that the first power transistor 101 and the second power transistor 102 are connected in parallel.
It should be noted that, when the MOS transistor is used as the first power transistor 101, a common source structure may be adopted, in which a gate pin is connected to the input terminal, a source pin is grounded (in the case of multiple power sources, a source may also be connected to another power source), and a drain pin is connected to the output terminal; that is to say, the drain pin of the second power transistor 102 is connected to the drain pin of the first power transistor 101, the source pin of the second power transistor 102 is connected to the source pin of the first power transistor 101, and the gates of the first power transistor 101 and the second power transistor 102 are biased in different states, respectively, so that the first power transistor 101 and the second power transistor 102 are connected in parallel.
In this case, the first power transistor 101 and the second power transistor 102 each have a gate-to-source voltage as an input voltage and a drain current as an output current.
In some embodiments, the working region comprises at least a linear region and a sub-threshold region; wherein the content of the first and second substances,
the static bias point of the first power tube 101 is located in a linear region, so that the third-order transconductance value of the first power tube 101 is a positive value;
the static bias point of the second power transistor 102 is located in the subthreshold region, so that the third-order transconductance value of the second power transistor 102 is a negative value.
In the MOS transistor, the static bias point means that when the ac input signal is zero, the circuit is in a dc operating state, and is used to determine the static values of the voltage and the current of the driving circuit 10. As described above, for the MOS transistors, corresponding to different working regions in different voltage states, in order to reduce the dc bias and not reduce the rf gain, the first power transistor 101 is generally biased in a linear region, that is, the static bias point of the first power transistor 101 is located in a linear region, and at this time, the third-order transconductance of the first power transistor 101 is a positive value; in order to counteract the third-order transconductance of the first power transistor 101, the second power transistor 102 must provide a negative third-order transconductance, so the quiescent bias point of the second power transistor 102 needs to be located in the subthreshold region, and the drain current generated by the second power transistor 102 is very small, and in this structure, the second power transistor 102 does not substantially increase an additional direct current.
Based on this, refer to fig. 4, which shows a schematic diagram of a third-order transconductance curve of a driving circuit provided in an embodiment of the present application. As shown in FIG. 4, the X-axis (i.e., horizontal axis) represents the voltage of the gate relative to the source, i.e., VgsThe Y axis (vertical axis) represents the third-order transconductance value g of the MOS tubem3(ii) a Here, curve a is a third order transconductance curve, i.e., g, of the first power tube 101m3_MN1Curve b is the third order transconductance curve, g, of the second power tube 102m3_MN2Curve c is a third-order transconductance curve, i.e. g, output after the first power tube 101 and the second power tube 102 are connected in parallelm3(ii) a The shaded portion shown in fig. 4 represents the voltage range (i.e., V) in which the drive circuit operatesgs) The third order transconductance at the shaded portion exists as in equation (3)The relationship shown is:
gm3＝gm3_MN1+gm3_MN2≈0 (3)
from the above, the essence of the third-order transconductance compensation is to connect an additional second power tube 102 in parallel to the main amplified first power tube 101, and control the operating state thereof by compensating the gate bias voltage of the first power tube 101, so that the third-order transconductance value g of the main amplified first power tube 101m3_MN1And third order transconductance value g of the second power tube 102m3_MN2After superposition, the value is approximately 0, and therefore the transconductance linearity of the driving circuit is improved.
Therefore, the transconductance linearity of the driving circuit is improved mainly by using the two common-source power tubes in the embodiment. The nonlinearity of the driving circuit mainly comes from the nonlinearity of transconductance of the power tube, and the caused third-order intermodulation distortion is mainly generated by the third-order nonlinearity of transconductance, so the third-order nonlinearity of transconductance needs to be reduced to improve the linearity of transconductance of the driving circuit. In the subthreshold region, the third-order nonlinearity of the MOS tube transconductance is a positive value and is larger; in general, in order to reduce the dc bias without reducing the rf gain, the main tube is typically biased in the linear region, and the third-order nonlinearity of the transconductance is positive at this time, an auxiliary tube is connected in parallel beside the main tube, and the third-order nonlinearity of the main tube transconductance is compensated by adjusting the aspect ratio and the static bias point of the auxiliary tube. Because the auxiliary tube is smaller than the main tube and is biased in the subthreshold region, this configuration adds substantially no additional dc current.
It should be noted that, when constructing the driving circuit 10, it is necessary to select the first power transistor 101 and the usage environment (mainly, the range of the input voltage, i.e., V) of the first power transistor 101 according to the selected usage environmentgs) It should be noted that, since the input voltage of the first power tube 101 is generally a range, the third transconductance value is essentially a curve that varies with the input voltage, and is based on the third transconductance value of the first power tube 101, then the third transconductance value of the second power tube 102 that can cancel the third transconductance value is determined, and then the second power tube 102 is selected.
In some embodiments, on the basis of the driving circuit 10 shown in fig. 3, refer to fig. 5, which shows a schematic structural diagram of another driving circuit 10 provided in the embodiments of the present application. As shown in fig. 5, the driving circuit 10 may further include a third power transistor 103; wherein the content of the first and second substances,
the source pin of the third power tube 103 is connected to the drain pin of the first power tube 101 and the drain pin of the second power tube 102, so as to achieve power amplification through the first power tube 101, the second power tube 102 and the third power tube 103.
Fig. 5 shows another example of the structure of the driving circuit 10, which may be referred to as another driving circuit structure. In the driving circuit structure, the transconductance nonlinearity of the first power tube 101 is compensated through the second power tube 102, so that the transconductance linearity of the driving circuit can be improved, and meanwhile, the power amplification effect can be realized through the first power tube 101, the second power tube 102 and the third power tube 103.
The embodiment of the application provides a driving circuit, which comprises a first power tube and a second power tube; the second power tube is connected with the first power tube in parallel, and static bias points of the second power tube and the first power tube are located in different working areas, so that the second power tube is used for compensating transconductance nonlinearity of the first power tube; the working area is used for indicating the conducting state of the power tube; therefore, the transconductance nonlinearity of the first power tube is compensated through the second power tube, the transconductance linearity of the driving circuit can be improved, and the interference of other channel signals caused by spectrum expansion is effectively avoided.
In another embodiment of the present application, refer to fig. 6, which shows a schematic structural diagram of a power amplifier provided in an embodiment of the present application. As shown in fig. 6, the power amplifier 20 at least includes the driving circuit 10 of any one of the previous embodiments.
In the embodiment of the present application, the power amplifier 20 may be integrated with the driving circuit 10, and the driving circuit 10 may include a first power transistor and a second power transistor, and the second power transistor is connected in parallel with the first power transistor; therefore, the transconductance nonlinearity of the first power tube is compensated through the second power tube, the transconductance linearity of the driving circuit can be improved, and the interference of other channel signals caused by spectrum expansion is avoided; meanwhile, the transconductance nonlinearity of the first power tube is reduced by introducing the second power tube, so that the linearity of the power amplifier can be improved; in addition, the linearity of the power amplifier is improved by introducing the second power tube, so that the circuit area of the power amplifier is not increased additionally, and the bias current of the power amplifier is not increased.
In another embodiment of the present application, see fig. 7, which shows a schematic structural diagram of an electronic device provided in an embodiment of the present application. As shown in fig. 7, the electronic device 30 includes at least the power amplifier 20 according to the foregoing embodiment. Therefore, the transconductance nonlinearity of the first power tube is compensated through the second power tube, the transconductance linearity of the driving circuit can be improved, and the interference of other channel signals caused by spectrum expansion is effectively avoided; meanwhile, the linearity of the power amplifier can be improved by introducing the second power tube, the circuit area of the power amplifier is not additionally increased, and the bias current of the power amplifier is not increased.
It should be noted that, in the present application, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The above-mentioned serial numbers of the embodiments of the present application are merely for description and do not represent the merits of the embodiments.
The methods disclosed in the several method embodiments provided in the present application may be combined arbitrarily without conflict to obtain new method embodiments.
Features disclosed in several of the product embodiments provided in the present application may be combined in any combination to yield new product embodiments without conflict.
The features disclosed in the several method or apparatus embodiments provided in the present application may be combined arbitrarily, without conflict, to arrive at new method embodiments or apparatus embodiments.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (11)
1. A drive circuit structure for improving linearity is characterized in that the drive circuit structure comprises a first power tube and a second power tube; wherein the content of the first and second substances,
the second power tube is connected with the first power tube in parallel, and static bias points of the second power tube and the first power tube are located in different working areas, so that the second power tube is used for compensating transconductance nonlinearity of the first power tube; the working area is used for indicating the working state of the power tube, and the working state comprises a conducting state and a switching-off state.
2. The drive circuit arrangement according to claim 1,
the first power tube and the second power tube adopt a common source structure, so that the second power tube is used for compensating the transconductance nonlinearity of the first power tube.
3. The drive circuit arrangement according to claim 1,
the working current of the second power tube is smaller than that of the first power tube.
4. The drive circuit arrangement according to claim 1,
the third-order transconductance value corresponding to the second power tube is used for offsetting the third-order transconductance value corresponding to the first power tube, so that the second power tube is used for compensating the transconductance nonlinearity of the first power tube; and the third-order transconductance value is obtained by calculating the third-order derivative of the transconductance of the power tube.
5. The drive circuit arrangement according to claim 4,
controlling a third-order transconductance value corresponding to the second power tube by adjusting a channel width-to-length ratio and/or a static bias point of the second power tube, so that the second power tube is used for compensating the transconductance nonlinearity of the first power tube; wherein, the channel width-length ratio represents the ratio of the channel width and the channel length of the power tube.
6. The drive circuit structure according to claim 1, wherein the operating region includes at least a linear region and a subthreshold region; wherein the content of the first and second substances,
the static bias point of the first power tube is located in a linear region, so that the third-order transconductance value of the first power tube is a positive value;
and the static bias point of the second power tube is positioned in the subthreshold region, so that the third-order transconductance value of the second power tube is a negative value.
7. The drive circuit arrangement according to claim 1,
the first power tube is a metal oxide semiconductor field effect transistor, and pins of the first power tube comprise a grid pin, a source pin and a drain pin;
the second power tube is a metal oxide semiconductor field effect transistor, and pins of the second power tube comprise a grid pin, a source pin and a drain pin.
8. The drive circuit structure according to claim 7,
the drain pin of the first power tube is connected with the drain pin of the second power tube, the source pin of the first power tube is connected with the source pin of the second power tube, and the grids of the first power tube and the second power tube are respectively biased in different states, so that the first power tube and the second power tube are connected in parallel.
9. The driving circuit structure according to any one of claims 1 to 8, further comprising a third power transistor; wherein the content of the first and second substances,
and the source pin of the third power tube is connected with the drain pin of the first power tube and the drain pin of the second power tube, so that power amplification is realized through the first power tube, the second power tube and the third power tube.
10. A power amplifier characterized in that it comprises at least a driver circuit arrangement according to any of claims 1-9.
11. An electronic device, characterized in that the electronic device comprises at least a power amplifier according to claim 10.
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|---|---|---|---|---|
| CN1790894A (en) * | 2005-12-28 | 2006-06-21 | 华东师范大学 | Differential superimposed RF CMOS low noise amplifier |
| US20090243724A1 (en) * | 2008-03-28 | 2009-10-01 | Viatcheslav Igorevich Suetinov | Third Order Derivative Distortion Cancellation for Ultra Low Power Applications |
| CN103618504A (en) * | 2013-12-18 | 2014-03-05 | 上海艾为电子技术有限公司 | Amplifier circuit and control circuit and control method thereof |
| CN104539242A (en) * | 2014-04-21 | 2015-04-22 | 上海华虹宏力半导体制造有限公司 | Current multiplexing low noise amplifier |
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2020
- 2020-04-20 CN CN202010314173.6A patent/CN111614328A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1790894A (en) * | 2005-12-28 | 2006-06-21 | 华东师范大学 | Differential superimposed RF CMOS low noise amplifier |
| US20090243724A1 (en) * | 2008-03-28 | 2009-10-01 | Viatcheslav Igorevich Suetinov | Third Order Derivative Distortion Cancellation for Ultra Low Power Applications |
| CN103618504A (en) * | 2013-12-18 | 2014-03-05 | 上海艾为电子技术有限公司 | Amplifier circuit and control circuit and control method thereof |
| CN104539242A (en) * | 2014-04-21 | 2015-04-22 | 上海华虹宏力半导体制造有限公司 | Current multiplexing low noise amplifier |
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