CN111614235A - Wide bandgap MOSFET drive circuit - Google Patents
Wide bandgap MOSFET drive circuit Download PDFInfo
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- CN111614235A CN111614235A CN202010486521.8A CN202010486521A CN111614235A CN 111614235 A CN111614235 A CN 111614235A CN 202010486521 A CN202010486521 A CN 202010486521A CN 111614235 A CN111614235 A CN 111614235A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
- H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
- H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/689—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors with galvanic isolation between the control circuit and the output circuit
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0038—Circuits or arrangements for suppressing, e.g. by masking incorrect turn-on or turn-off signals, e.g. due to current spikes in current mode control
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0048—Circuits or arrangements for reducing losses
- H02M1/0054—Transistor switching losses
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention relates to the field of MOS tube driving, in particular to a wide bandgap MOSFET tube driving circuit, which comprises: the signal generation module is used for reconstructing the edges of the input PWM signals by utilizing a plurality of groups of reconstructed pulse signals to generate PWM signals with step waveforms at the edges; the signal processing module is used for processing the generated PWM signal into a driving signal of a wide-bandgap MOSFET; and the signal generation module is connected with the input end of the signal processing module. The wide bandgap MOSFET switching performance can be improved, the phenomena of grid voltage oscillation, voltage spike overshoot, ringing and the like are effectively avoided, and the anti-interference capability is strong.
Description
Technical Field
The invention relates to the field of MOS (metal oxide semiconductor) tube driving, in particular to a wide bandgap MOSFET tube driving circuit.
Background
Silicon carbide and gallium nitride materials are widely used because of their advantages of large forbidden band width, high critical breakdown field strength, large thermal conductivity, high saturated electron drift velocity, low dielectric constant, etc. In recent years, companies such as CREE corporation, ROHM corporation, japan, and the like have introduced commercially available wide bandgap MOSFET (SiC, GaN, and the like) transistors that have excellent properties such as low on-resistance, high thermal conductivity, high breakdown voltage, and high saturation velocity, and that can improve the conversion efficiency of a power converter and reduce the power density thereof, and that can save space, reduce weight, and reduce heat dissipation requirements. The wide bandgap MOSFET has the characteristic of small positive threshold voltage and negative safe voltage, is easily influenced by the Miller effect in the high-frequency switching process, causes grid voltage oscillation to cause false turn-on or grid source breakdown, and damages a switching tube in serious cases.
In addition, when the wide bandgap MOSFET is applied to high-frequency and high-power occasions, voltage spike overshoot, ringing and other phenomena are generated in the switching process of the wide bandgap MOSFET, and the system operation is seriously damaged. Different from a conventional silicon device, the grid electrode of the wide bandgap MOSFET can be completely switched on only when the switching-on voltage of the grid electrode of the wide bandgap MOSFET reaches 18-20V, and the advantage of low switching-on loss of the wide bandgap MOSFET is exerted.
Currently, research into the driver and switching characteristics of wide bandgap MOSFETs has become a hotspot. How to improve the switching performance of the wide bandgap MOSFET, it is very critical to design a driver with the characteristics of strong anti-interference capability, small switching peak, high reliability, and the like.
Disclosure of Invention
The wide bandgap MOSFET tube driving circuit provided by the invention can improve the switching performance of the wide bandgap MOSFET, effectively avoids the phenomena of grid voltage oscillation, voltage spike overshoot, ringing and the like, and has strong anti-interference capability.
The invention provides a wide bandgap MOSFET drive circuit, comprising:
the signal generation module is used for reconstructing the edges of the input PWM signals by utilizing a plurality of groups of reconstructed pulse signals to generate PWM signals with step waveforms at the edges;
the signal processing module is used for processing the generated PWM signal into a driving signal of a wide-bandgap MOSFET;
and the signal generation module is connected with the input end of the signal processing module.
Further, the signal generation module includes:
the digital signal processor is used for tracking the input PWM signals and generating a plurality of groups of reconstructed pulse signals for reconstructing the input PWM signals;
the gain amplifier is used for carrying out voltage amplification on each group of reconstructed pulse signals;
the signal superposition processor is used for superposing the amplified groups of reconstructed pulse signals to form a PWM signal with step waveform at the edge;
the digital signal processor, the gain amplifier and the signal superposition processor are connected in sequence.
Still further, the reconstructing the pulse signal includes: an up reconstructed pulse and a down reconstructed pulse;
the digital signal processor is specifically configured to:
tracking the rising edge and the falling edge of an input pulse PWM signal by adopting a hardware input synchronous locking mechanism and a micro-edge positioning technology;
and correspondingly constructing an ascending reconstruction pulse and a descending reconstruction pulse in sequence according to the time sequence.
Still further, the signal generating module further includes:
a buffer unit for generating a tracking signal tracking a rising edge and a falling edge of an input PWM signal and transferring to a digital signal processor;
the buffer unit is connected with the digital signal processor.
In the above technical solution, the signal processing module includes:
a PWM level conversion circuit for converting a PWM signal having a step waveform into a positive-negative level PWM signal;
the high-frequency signal amplifying circuit is used for amplifying the positive and negative level PWM signals to reach the amplitude for driving the wide bandgap MOSFET;
the high-speed signal isolation circuit is used for carrying out electrical isolation transmission and output current enhancement on the amplified positive and negative level PWM signals to obtain isolated PWM signals;
the output push-pull circuit is used for further improving the output current capability of the isolated PWM signal;
the PWM level conversion circuit, the high-frequency signal amplification circuit, the high-speed signal isolation circuit and the output push-pull circuit are connected in sequence.
Further, the signal processing module further includes:
the linear power supply conversion circuit is used for supplying power to the PWM level conversion circuit;
the linear power supply conversion circuit is connected with the PWM level conversion circuit;
the PWM level shift circuit comprises: the circuit comprises a first resistor, a second resistor, a third resistor and a fourth resistor;
one end of the first resistor is connected with the output end of the signal generation module, and the other end of the first resistor is connected with one end of the third resistor;
the other end of the third resistor is connected with the input end of the high-frequency signal amplifying circuit;
one end of the second resistor is connected with the other end of the first resistor, and the other end of the second resistor is connected with the output end of the linear power supply conversion circuit;
and one end of the fourth resistor is connected with the other end of the third resistor, and the other end of the fourth resistor is connected with the output end of the linear power supply conversion circuit.
Still further, the high-frequency signal amplifying circuit includes: the high-speed operational amplifier comprises a high-speed operational amplifier, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first capacitor, a third capacitor and a fourth capacitor;
one end of the fifth resistor is grounded, and the other end of the fifth resistor is connected with a pin 2 of the high-speed operational amplifier;
one end of the seventh resistor is connected with the output end of the PWM level conversion circuit, and the other end of the seventh resistor is connected with a pin 3 of the high-speed operational amplifier;
the pin 2 of the high-speed operational amplifier is connected with the output end of the high-frequency signal amplifying circuit after being sequentially connected with the sixth resistor and the first capacitor;
the pin 3 of the high-speed operational amplifier is connected with the eighth resistor and then grounded;
the pin 4 of the high-speed operational amplifier is respectively connected with a-8V power supply and grounded through a fourth capacitor;
the pin 6 of the high-speed operational amplifier is connected with the output end of the high-frequency signal amplifying circuit;
and the pins 7 of the high-speed operational amplifier are respectively connected with a +23V power supply and grounded through a third capacitor.
Still further, the high-speed signal isolation circuit includes: a photoelectric coupler and a ninth resistor;
one end of the ninth resistor is connected with the output end of the high-frequency signal amplifying circuit, and the other end of the ninth resistor is connected with a pin 2 of the photoelectric coupler;
and a pin 1 of the photoelectric coupler is connected with a +23V power supply, a pin 4 is connected with a-8V power supply, and a pin 6 is connected with an output push-pull circuit.
Still further, the output push-pull circuit includes: the first triode, the second triode, the first transient diode, the second transient diode, the fifth capacitor, the sixth capacitor, the tenth resistor, the eleventh resistor, the twelfth resistor and the thirteenth resistor;
one end of the tenth resistor is connected with a pin 6 of the photoelectric coupler, and the other end of the tenth resistor is respectively connected with the base electrode of the first triode and the base electrode of the second triode;
the collector of the first triode is respectively connected with a +23V power supply and grounded through a fifth capacitor, and the emitter is connected with the grid electrode of the wide bandgap MOSFET through an eleventh resistor;
an emitter of the second triode is connected with a grid electrode of the wide bandgap MOSFET through a twelfth resistor, and a collector of the second triode is respectively connected with a-8V power supply and grounded through a sixth capacitor;
one end of the thirteenth resistor is connected with one end of the eleventh resistor, which is far away from the first triode, and the other end of the thirteenth resistor is connected with a-8V power supply;
the anodes of the first transient diode and the second transient diode are respectively connected;
the cathode of the first transient diode is connected with the gate of the wide bandgap MOSFET;
and the cathode of the second transient diode is connected with the source of the wide bandgap MOSFET.
Still further, the linear power conversion circuit includes: the second capacitor, the third triode, the fourteenth resistor and the third transient diode;
the input end of the linear power supply conversion circuit is respectively connected with a-8V power supply, the collector of the third triode and one end of the fourteenth resistor;
the emitter of the third triode is connected with a-5V output power supply, and the base of the third triode is respectively connected with the other end of the fourteenth resistor and the anode of the third transient diode;
the cathode of the third transient diode is grounded;
one end of the second capacitor is connected with a-5V output power supply, and the other end of the second capacitor is grounded.
According to the invention, the signal generation module can be used for generating a PWM signal with a step waveform at the edge of a pulse switch, and then the signal processing module converts the PWM signal with the step waveform into a driving signal; therefore, the switching peak voltage can be effectively reduced, and the switching noise and the electromagnetic radiation can be reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic circuit diagram according to an embodiment of the present invention;
FIG. 2 is a waveform diagram of an input PWM signal and a falling reconstruction pulse according to an embodiment of the present invention;
FIG. 3 is a waveform diagram of an input PWM signal and an amplified falling reconstruction pulse according to an embodiment of the present invention;
FIG. 4 is a waveform diagram of an input PWM signal and rising reconstruction pulses according to an embodiment of the present invention;
FIG. 5 is a schematic waveform diagram of an input PWM signal and an amplified rising reconstruction pulse according to an embodiment of the present invention;
FIG. 6 is a schematic waveform diagram of an input PWM signal and a PWM signal according to an embodiment of the present invention;
FIG. 7 is a schematic structural diagram of a signal processing module according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a linear power conversion circuit according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1, the wide bandgap MOSFET driving circuit provided in this embodiment includes:
the signal generating module 1 is used for reconstructing the edges of input PWM signals by utilizing a plurality of groups of reconstructed pulse signals to generate PWM signals with step waveforms at the edges;
the signal processing module 2 is used for processing the generated PWM signal into a driving signal of a wide-bandgap MOSFET;
the signal generating module 1 is connected with the input end of the signal processing module 2.
In this embodiment, the signal generating module 1 is used to generate a PWM signal with a step waveform at the edge of a pulse switch, and then the signal processing module 2 converts the PWM signal with the step waveform at the edge into a driving signal; therefore, the switching peak voltage can be effectively reduced, and the switching noise and the electromagnetic radiation can be reduced.
The signal generation module 1 includes:
a digital signal processor 11, configured to track an input PWM signal and generate multiple groups of reconstructed pulse signals for reconstructing the input PWM signal;
the gain amplifier 12 is used for carrying out voltage amplification on each group of reconstructed pulse signals;
a signal superposition processor 13, configured to superpose the amplified groups of reconstructed pulse signals to form a PWM signal with a step waveform at an edge;
the digital signal processor 11, the gain amplifier 12 and the signal superposition processor 13 are connected in sequence.
As shown in fig. 1, in the present embodiment, the model of the digital signal processor 11 is TMS320F 28335.
The reconstructed impulse signal comprises: an up reconstructed pulse and a down reconstructed pulse;
as shown in fig. 1, 2 and 4, in the present embodiment, there are six reconstructed impulse signals, which are: HRPWM 1-HRPWM 6; wherein HRPWM 1-HRPWM 3 are rising reconstruction pulses for reconstructing the rising edge of the input PWM signal (PWM IN); HRPWM4 through HRPWM6 are falling reconstruction pulses for reconstructing the falling edges of the input PWM signal. In the present embodiment, HRPWM1, HRPWM2, HRPWM4 through HRPWM6 are five sets of narrow pulse signals, and HRPWM3 is also used to track the input PWM signals.
As shown in fig. 1 to 6, the digital signal processor 11 is specifically configured to:
tracking the rising edge and the falling edge of an input pulse PWM signal by adopting a hardware input synchronous locking mechanism and a micro-edge positioning technology;
and correspondingly constructing an ascending reconstruction pulse and a descending reconstruction pulse in sequence according to the time sequence.
In the present embodiment, first, a reconstruction pulse signal for reconstructing an input PWM signal is sequentially generated in time series;
then, tracking is performed for the rising and falling edges of the input PWM signal:
when the rising edge of the input PWM signal is detected, acquiring rising reconstruction pulses which can be coincided with the rising edge from each reconstruction pulse signal;
when a falling edge of the input PWM signal is detected, a falling reconstruction pulse that can coincide with the falling edge is obtained from each reconstructed pulse signal.
In the embodiment, a voltage source in a PSPICE program is adopted to simulate a rising edge or a falling edge waveform of a multi-level reconstruction PWM signal, and a MOSFET tube and a converter model are built to optimize a pulse edge; then, in order to meet the requirements of tracking and reconstructing pulse edges of various MOSFET driving signals such as silicon carbide, gallium nitride and the like, a digital signal processor TMS320F28335 is adopted, and a pulse width modulation wave HRPWM with the precision of 100ps is generated through an enhanced pulse width modulator EPWM integrated on a chip and a supporting hardware input synchronous interface EPWMSYNCI, so that the tracking of PWM signals with the frequency of 1MHz is realized; and finally, sequentially generating six paths of high-precision reconstruction pulses for reconstructing the PWM edges according to a time sequence, performing voltage amplification on each path of reconstruction pulses by adopting a wide dynamic range and high-speed digital control VGA interface, and performing signal superposition processing to form a PWM signal with step waveforms at the edge. And the time sequence, the pulse width and the amplitude of the reconstructed pulse are preset according to PSPICE optimized data, and are corrected according to the measured data.
The signal generating module 1 further includes:
a buffer unit 14 for generating a tracking signal tracking a rising edge and a falling edge of the input PWM signal and transferring to the digital signal processor 11;
the buffer unit 14 is connected to the digital signal processor 11.
As shown in fig. 1, the buffer unit 14 includes: in-phase Schmitt buffers SN74LVC1G17-Q1 and anti-phase Schmitt buffers SN74LVC1G 14-Q1.
In order to realize the functions, the specific embodiment is as follows:
step 4, setting a main timer clock of the digital signal processor 11 as a synchronous time base of an internal clock timer of each EPWM module; the timers corresponding to the six groups of reconstructed pulse signals all adopt a continuous counting increasing mode;
step 5, setting a TBPRD period register value and a TBPHS comparison register value corresponding to the reconstructed pulse signal according to the pulse width, the time base and the pulse timing sequence;
step 6, when the digital signal processor 11 detects a synchronous pulse signal at the rising edge moment, acquiring two groups of narrow pulse signals of HRPWM1 and HRPWM2 and an HRPWM3 signal from the PHSDIR direction position 1;
HRPWM3 is used to track the input PWM signal, as shown in FIG. 4;
step 7, waiting for the digital signal processor 11 to detect the synchronization pulse signal at the falling edge moment, generating a low level at the PHSDIR direction position of 0, and obtaining three groups of narrow-pulse HRPWM signals of HRPWM4, HRPWM5 and HRPWM6, as shown in fig. 2;
step 8, the gain amplifier 12 acquires pre-optimized parameters from the digital signal processor by adopting a wide dynamic range, high-speed and digital control VGA interface through a 6-bit parallel communication and latch interface, and performs voltage amplification on each path of reconstructed pulse signals, as shown in figures 3 and 5;
step 9, the signal superposition processor 13 superposes the amplified groups of reconstructed pulse signals to form a PWM signal with a step waveform at the edge, as shown in fig. 6.
As shown in fig. 7, the signal processing module 2 includes:
a PWM level conversion circuit 21 for converting a PWM signal having a step waveform into a positive-negative level PWM signal;
the high-frequency signal amplifying circuit 22 is used for amplifying the positive and negative level PWM signals to reach the amplitude for driving the wide bandgap MOSFET;
the high-speed signal isolation circuit 23 is used for performing electrical isolation transmission and output current enhancement on the amplified positive and negative level PWM signals to obtain isolated PWM signals;
an output push-pull circuit 24 for further improving the output current capability of the isolated PWM signal;
the PWM level conversion circuit 21, the high-frequency signal amplification circuit 22, the high-speed signal isolation circuit 23 and the output push-pull circuit 24 are connected in sequence.
As shown in fig. 8, the signal processing module 2 further includes:
a linear power supply conversion circuit 25 for supplying power to the PWM level conversion circuit 21;
the linear power conversion circuit 25 is connected to the PWM level conversion circuit 21.
In this embodiment, firstly, the +15V input power source generates +23V and-8V power sources through the flyback converter, and then the-8V power source generates a-5V precision power source through the linear power conversion circuit 25 to supply power to each circuit of the signal processing module 2. A PWM signal with a step on the switching edge is generated by adopting a digital signal processor 11, a gain amplifier 12 and a signal superposition processor 13, a PWM level conversion circuit 21, a high-frequency signal amplification circuit 22, a high-speed signal isolation circuit 23 and an output push-pull circuit 24 are designed, the PWM signal with the step on the switching edge generated at the previous stage is subjected to voltage amplification, current amplification and electrical isolation, and finally a driving signal of a wide-bandgap MOSFET is generated.
The PWM level conversion circuit 21 includes: a first resistor R1, a second resistor R2, a third resistor R3 and a fourth resistor R4;
one end of the first resistor R1 is connected with the output end of the signal generating module 1, and the other end of the first resistor R1 is connected with one end of the third resistor R3;
the other end of the third resistor R3 is connected with the input end of the high-frequency signal amplifying circuit 22;
one end of the second resistor R2 is connected with the other end of the first resistor R1, and the other end of the second resistor R2 is connected with the output end of the linear power supply conversion circuit 25;
one end of the fourth resistor R4 is connected to the other end of the third resistor R3, and the other end is connected to the output end of the linear power conversion circuit 25.
The high-frequency signal amplifying circuit 22 includes: a high-speed operational amplifier U1, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first capacitor C1, a third capacitor C3 and a fourth capacitor C4;
one end of the fifth resistor R5 is grounded, and the other end of the fifth resistor R5 is connected with a pin 2 of a high-speed operational amplifier U1;
one end of the seventh resistor R7 is connected with the output end of the PWM level conversion circuit 21, and the other end is connected with a pin 3 of a high-speed operational amplifier U1;
the pin 2 of the high-speed operational amplifier U1 is connected with the output end of the high-frequency signal amplifying circuit 22 after being sequentially connected with a sixth resistor R6 and a first capacitor C1;
the pin 4 of the high-speed operational amplifier U1 is respectively connected with a-8V power supply and grounded through a fourth capacitor C4;
pin 6 of the high-speed operational amplifier U1 is connected with the output end of the high-frequency signal amplifying circuit 22;
the pin 7 of the high-speed operational amplifier U1 is connected to the +23V power supply and to ground through a third capacitor C3, respectively.
The high-speed signal isolation circuit 23 includes: a photocoupler U2 and a ninth resistor R9;
one end of the ninth resistor R9 is connected with the output end of the high-frequency signal amplifying circuit 22, and the other end of the ninth resistor R9 is connected with a pin 2 of a photoelectric coupler U2;
and a pin 1 of the photoelectric coupler U2 is connected with a +23V power supply, a pin 4 is connected with a-8V power supply, and a pin 6 is connected with the output push-pull circuit 24.
In the present embodiment, the model of the high-speed operational amplifier U1 is LM 7121; the model of the photoelectric coupler U2 is MOC 3010.
The output push-pull circuit 24 includes: the circuit comprises a first triode Q1, a second triode Q2, a first transient diode D1, a second transient diode D2, a fifth capacitor C5, a sixth capacitor C6, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12 and a thirteenth resistor R13;
one end of the tenth resistor R10 is connected with a pin 6 of a photoelectric coupler U2, and the other end of the tenth resistor R10 is respectively connected with the base electrode of the first triode Q1 and the base electrode of the second triode Q2;
the collector of the first triode Q1 is respectively connected with a +23V power supply and grounded through a fifth capacitor C5, and the emitter is connected with the grid of the wide bandgap MOSFET through an eleventh resistor R11;
an emitter of the second triode Q2 is connected with a grid electrode of the wide bandgap MOSFET through a twelfth resistor R12, and a collector of the second triode Q2 is respectively connected with a-8V power supply and grounded through a sixth capacitor C6;
one end of the thirteenth resistor R13 is connected with one end of the eleventh resistor R11 far away from the first triode Q1, and the other end of the thirteenth resistor R13 is connected with a-8V power supply;
the anodes of the first transient diode D1 and the second transient diode D2 are respectively connected;
the cathode of the first transient diode D1 is connected with the gate of the wide bandgap MOSFET;
the cathode of the second transient diode D2 is connected to the wide bandgap MOSFET source.
In this embodiment, the PWM level conversion circuit 21 uses a pair of voltage dividing resistors to pull down a PWM signal with a step waveform at the edge of +5V/0V level to a-5V power supply, converts the PWM signal with positive level into a PWM signal with positive and negative level, and realizes accurate setting of the output level of the PWM signal through a two-stage series regulation. The high-frequency signal amplifying circuit 22 adopts a high-speed operational amplifier U1 to amplify the voltage of the PWM signal with positive and negative levels in a differential operational amplification mode to reach the +20V/-5V level suitable for driving a wide-bandgap MOSFET. The high-speed signal isolation circuit 23 adopts a silicon controlled output photocoupler U2 to carry out electrical isolation transmission and output current enhancement on the PWM signal with the +20V/-5V level. The output push-pull circuit 24 uses a pair of transistors to improve the output current capability.
As shown in fig. 8, the linear power conversion circuit 25 includes: a second capacitor R2, a third triode Q3, a fourteenth resistor R14 and a third transient diode D3;
the input end of the linear power supply conversion circuit 25 is respectively connected with a-8V power supply, the collector of a third triode Q3 and one end of a fourteenth resistor R14;
an emitter of the third triode Q3 is connected with a-5V output power supply, and a base of the third triode Q3 is connected with the other end of the fourteenth resistor R14 and the anode of the third transient diode D3 respectively;
the cathode of the third transient diode D3 is grounded;
one end of the second capacitor R2 is connected with a-5V output power supply, and the other end is grounded.
In the present embodiment, the first transistor Q1 and the second transistor Q2 in the output push-pull circuit 24 are NPN transistors; the third transistor Q3 in the linear power conversion circuit 25 is a PNP transistor.
The embodiment is realized as follows: firstly, a +15V input power supply generates +23V and-8V power supplies through a flyback converter, and then the-8V power supply generates a-5V precision power supply through a linear power supply conversion circuit 25 to supply power to other circuits in the signal processing module 1.
The preceding stage captures an input PWM signal using the digital signal processor 11 and generates a plurality of groups of reconstructed pulse signals for reconstructing the input pulse signal; then, the gain amplifier 12 is adopted to amplify the voltage of each group of reconstructed pulse signals; then, the reconstructed pulse signals of each group are superimposed by a signal superimposing processor (HC4051)13 to form a PWM signal with a switching edge having a step waveform.
The back stage adopts a PWM level conversion circuit 21 to convert PWM signals with step waveforms at the edges of +5V/0V level into positive and negative level PWM signals with the same amplitude, the positive and negative level PWM signals are converted into +20V/-5V level PWM signals through a high-frequency signal amplification circuit 22, and signal isolation and output current amplification are carried out through a high-speed signal isolation circuit 23 and an output push-pull circuit 24.
The Miller effect of the MOSFET in the switching process can be effectively reduced by methods of changing the series resistance of the gate pole in a combined mode or forming the switching edge by multi-level superposition and the like, but the flexibility of the methods is limited by parameter adjustment according to the characteristics of the MOSFET. In this embodiment, the driving circuit can reconfigure the pulse edge waveform of the PWM signal according to the MOSFET characteristics by software, which can effectively reduce the switching spike voltage, and reduce the switching noise and electromagnetic radiation.
Compared with the prior art, the wide bandgap MOSFET transistor driving circuit described in this embodiment has the following advantages:
1. the switching peak voltage and the switching loss are effectively reduced;
2. the anti-interference capability is strong, and the safety and the reliability are high;
3. the parameter adjustment is convenient, and the application range is wide.
It should be understood that the specific order or hierarchy of steps in the processes disclosed is an example of exemplary approaches. Based upon design preferences, it is understood that the specific order or hierarchy of steps in the processes may be rearranged without departing from the scope of the present disclosure. The accompanying method claims present elements of the various steps in a sample order, and are not intended to be limited to the specific order or hierarchy presented.
In the foregoing detailed description, various features are grouped together in a single embodiment for the purpose of streamlining the disclosure. This method of disclosure is not to be interpreted as reflecting an intention that the claimed embodiments of the subject matter require more features than are expressly recited in each claim. Rather, as the following claims reflect, invention lies in less than all features of a single disclosed embodiment. Thus, the following claims are hereby expressly incorporated into the detailed description, with each claim standing on its own as a separate preferred embodiment of the invention.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. To those skilled in the art; various modifications to these embodiments will be readily apparent, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the disclosure. Thus, the present disclosure is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
What has been described above includes examples of one or more embodiments. It is, of course, not possible to describe every conceivable combination of components or methodologies for purposes of describing the aforementioned embodiments, but one of ordinary skill in the art may recognize that many further combinations and permutations of various embodiments are possible. Accordingly, the embodiments described herein are intended to embrace all such alterations, modifications and variations that fall within the scope of the appended claims. Furthermore, to the extent that the term "includes" is used in either the detailed description or the claims, such term is intended to be inclusive in a manner similar to the term "comprising" as "comprising" is interpreted when employed as a transitional word in a claim. Furthermore, any use of the term "or" in the specification of the claims is intended to mean a "non-exclusive or".
The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are merely exemplary embodiments of the present invention, and are not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (10)
1. A wide bandgap MOSFET driver circuit, comprising:
the signal generating module (1) is used for reconstructing the edges of input PWM signals by utilizing a plurality of groups of reconstructed pulse signals to generate PWM signals with step waveforms at the edges;
the signal processing module (2) is used for processing the generated PWM signal into a driving signal of a wide-bandgap MOSFET;
the signal generating module (1) is connected with the input end of the signal processing module (2).
2. The wide bandgap MOSFET transistor driving circuit according to claim 1, wherein the signal generating module (1) comprises:
a digital signal processor (11) for tracking the input PWM signal and generating a plurality of sets of reconstructed pulse signals for reconstructing the input PWM signal;
the gain amplifier (12) is used for carrying out voltage amplification on each group of reconstructed pulse signals;
a signal superposition processor (13) for superposing the amplified groups of reconstructed pulse signals to form a PWM signal with step waveform at the edge;
the digital signal processor (11), the gain amplifier (12) and the signal superposition processor (13) are connected in sequence.
3. The wide bandgap MOSFET transistor driving circuit as claimed in claim 2, wherein the reconstructing the pulse signal comprises: an up reconstructed pulse and a down reconstructed pulse;
the digital signal processor (11) is specifically configured to:
tracking the rising edge and the falling edge of an input pulse PWM signal by adopting a hardware input synchronous locking mechanism and a micro-edge positioning technology;
and correspondingly constructing an ascending reconstruction pulse and a descending reconstruction pulse in sequence according to the time sequence.
4. The wide bandgap MOSFET transistor driving circuit according to claim 2, wherein the signal generating module (1) further comprises:
a buffer unit (14) for generating a tracking signal for tracking a rising edge and a falling edge of an input PWM signal and transferring to a digital signal processor (11);
the buffer unit (14) is connected to the digital signal processor (11).
5. The wide bandgap MOSFET transistor driving circuit according to claim 1, wherein the signal processing module (2) comprises:
a PWM level conversion circuit (21) for converting a PWM signal having a step waveform into a positive-negative level PWM signal;
the high-frequency signal amplification circuit (22) is used for amplifying the positive and negative level PWM signals to reach the amplitude for driving the wide bandgap MOSFET;
the high-speed signal isolation circuit (23) is used for carrying out electrical isolation transmission and output current enhancement on the amplified positive and negative level PWM signals to obtain isolated PWM signals;
an output push-pull circuit (24) for further improving the output current capability of the isolated PWM signal;
the PWM level conversion circuit (21), the high-frequency signal amplification circuit (22), the high-speed signal isolation circuit (23) and the output push-pull circuit (24) are connected in sequence.
6. The wide bandgap MOSFET transistor driving circuit according to claim 5, wherein the signal processing module (2) further comprises:
a linear power conversion circuit (25) for supplying power to the PWM level conversion circuit (21);
the linear power supply conversion circuit (25) is connected with the PWM level conversion circuit (21);
the PWM level shift circuit (21) includes: a first resistor (R1), a second resistor (R2), a third resistor (R3), and a fourth resistor (R4);
one end of the first resistor (R1) is connected with the output end of the signal generation module (1), and the other end of the first resistor (R1) is connected with one end of the third resistor (R3);
the other end of the third resistor (R3) is connected with the input end of the high-frequency signal amplifying circuit (22);
one end of the second resistor (R2) is connected with the other end of the first resistor (R1), and the other end of the second resistor (R2) is connected with the output end of the linear power supply conversion circuit (25);
one end of the fourth resistor (R4) is connected with the other end of the third resistor (R3), and the other end of the fourth resistor (R4) is connected with the output end of the linear power supply conversion circuit (25).
7. The wide bandgap MOSFET transistor driving circuit according to claim 5, wherein the high frequency signal amplifying circuit (22) comprises: a high-speed operational amplifier (U1), a fifth resistor (R5), a sixth resistor (R6), a seventh resistor (R7), an eighth resistor (R8), a first capacitor (C1), a third capacitor (C3) and a fourth capacitor (C4);
one end of the fifth resistor (R5) is grounded, and the other end of the fifth resistor (R5) is connected with a pin 2 of a high-speed operational amplifier (U1);
one end of the seventh resistor (R7) is connected with the output end of the PWM level switching circuit (21), and the other end of the seventh resistor is connected with a pin 3 of a high-speed operational amplifier (U1);
a pin 2 of the high-speed operational amplifier (U1) is connected with a sixth resistor (R6) and a first capacitor (C1) in sequence and then is connected with the output end of the high-frequency signal amplifying circuit (22);
the pin 3 of the high-speed operational amplifier (U1) is connected with an eighth resistor (R8) and then grounded;
the pin 4 of the high-speed operational amplifier (U1) is respectively connected with a-8V power supply and is grounded through a fourth capacitor (C4);
a pin 6 of the high-speed operational amplifier (U1) is connected with the output end of the high-frequency signal amplifying circuit (22);
the pin 7 of the high-speed operational amplifier (U1) is respectively connected with a +23V power supply and is grounded through a third capacitor (C3).
8. The wide bandgap MOSFET transistor driving circuit according to claim 5, wherein the high speed signal isolation circuit (23) comprises: a photocoupler (U2) and a ninth resistor (R9);
one end of the ninth resistor (R9) is connected with the output end of the high-frequency signal amplifying circuit (22), and the other end of the ninth resistor is connected with a pin 2 of a photoelectric coupler (U2);
pin 1 of the photoelectric coupler (U2) is connected with a +23V power supply, pin 4 is connected with a-8V power supply, and pin 6 is connected with an output push-pull circuit (24).
9. The wide bandgap MOSFET transistor driving circuit according to claim 8, wherein the output push-pull circuit (24) comprises: the circuit comprises a first triode (Q1), a second triode (Q2), a first transient diode (D1), a second transient diode (D2), a fifth capacitor (C5), a sixth capacitor (C6), a tenth resistor (R10), an eleventh resistor (R11), a twelfth resistor (R12) and a thirteenth resistor (R13);
one end of the tenth resistor (R10) is connected with a pin 6 of a photoelectric coupler (U2), and the other end of the tenth resistor (R10) is respectively connected with the base electrode of the first triode (Q1) and the base electrode of the second triode (Q2);
the collector electrode of the first triode (Q1) is respectively connected with a +23V power supply and grounded through a fifth capacitor (C5), and the emitter electrode of the first triode is connected with the grid electrode of the wide bandgap MOSFET through an eleventh resistor (R11);
an emitter of the second triode (Q2) is connected with the grid of the wide bandgap MOSFET through a twelfth resistor (R12), and a collector of the second triode is respectively connected with a-8V power supply and grounded through a sixth capacitor (C6);
one end of the thirteenth resistor (R13) is connected with one end of the eleventh resistor (R11) far away from the first triode (Q1), and the other end of the thirteenth resistor (R13) is connected with a-8V power supply;
the anodes of the first transient diode (D1) and the second transient diode (D2) are respectively connected;
the cathode of the first transient diode (D1) is connected with the gate of the wide bandgap MOSFET;
the cathode of the second transient diode (D2) is connected to the source of the wide bandgap MOSFET.
10. The wide bandgap MOSFET transistor driving circuit according to claim 6, wherein the linear power conversion circuit (25) comprises: a second capacitor (R2), a third triode (Q3), a fourteenth resistor (R14) and a third transient diode (D3);
the input end of the linear power supply conversion circuit (25) is respectively connected with a-8V power supply, the collector of a third triode (Q3) and one end of a fourteenth resistor (R14);
the emitter of the third triode (Q3) is connected with a-5V output power supply, and the base of the third triode is respectively connected with the other end of the fourteenth resistor (R14) and the anode of the third transient diode (D3);
the cathode of the third transient diode (D3) is grounded;
one end of the second capacitor (R2) is connected with a-5V output power supply, and the other end of the second capacitor is grounded.
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| CN206283426U (en) * | 2016-12-22 | 2017-06-27 | 中国电子科技集团公司第二十一研究所 | Multichannel superposing type high-frequency and high-voltage power supply based on DSP2812 |
| CN110212754A (en) * | 2019-06-21 | 2019-09-06 | 南京工业大学 | A kind of rechargeable switching capacity high bandwidth envelope tracking power circuit of relay |
| CN110995225A (en) * | 2019-11-21 | 2020-04-10 | 全球能源互联网研究院有限公司 | Drive control circuit and method for optimizing switching characteristics of power semiconductor device |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN206283426U (en) * | 2016-12-22 | 2017-06-27 | 中国电子科技集团公司第二十一研究所 | Multichannel superposing type high-frequency and high-voltage power supply based on DSP2812 |
| CN110212754A (en) * | 2019-06-21 | 2019-09-06 | 南京工业大学 | A kind of rechargeable switching capacity high bandwidth envelope tracking power circuit of relay |
| CN110995225A (en) * | 2019-11-21 | 2020-04-10 | 全球能源互联网研究院有限公司 | Drive control circuit and method for optimizing switching characteristics of power semiconductor device |
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