CN111613531A - 一种提高二极管开关速度的方法 - Google Patents
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- 229910052697 platinum Inorganic materials 0.000 claims abstract description 29
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- 239000002131 composite material Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 229910001385 heavy metal Inorganic materials 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 239000012299 nitrogen atmosphere Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010893 electron trap Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
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- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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Abstract
本发明公开了一种提高二极管开关速度的方法,属于微电子制作领域。本发明的提高二极管开关速度的方法,在硅片背面进行铂扩散,即在800~1100℃、惰性气体下退火30~120min,二极管的反向恢复时间在IF=1.0A、VR=30V时,可控制在20~80ns,在IF=25A、VR=160V时,可控制在25~100ns,本发明通过掺铂控制少子寿命,本发明的方法制造的硅基半导体分立器件具有开关速度快、漏电流小、可靠性高的特点。
Description
技术领域
本发明属于微电子制作领域,尤其是一种提高二极管开关速度的方法。
背景技术
目前,半导体分立器件为提高开关速度需要降低少子寿命,主要方法有电子辐照、轻离子注入和重金属掺杂等。寿命控制技术的原理是向器件内部引入空间分布适当的复合中心,以有效减小少子寿命,提高器件开关速度。对复合寿命的研究主要集中在复合中心的能级位置,电子俘获系数,空穴俘获系数,退火温度等方面。
重金属掺杂、电子辐照、轻离子注入在硅禁带中形成不止一个能带,其中一个能带起主要作用,四种少子寿命控制的复合中心能带图如图1所示,金在硅禁带中EC-0.54eV能级起主要少子复合作用,铂在硅禁带中EV+0.42eV起主要少子复合作用,电子辐照、轻离子辐照在硅禁带中的EC-0.42eV能级起主要少子复合作用。其中,扩金器件拥有最好的VF-trr特性曲线,扩铂器件次之,电子辐照器件最差;但是扩金器件的漏电流远大于扩铂和电子辐照器件。
发明内容
本发明的目的在于解决现有二极管开关速度与正向导通压降不能兼顾的缺点,提供一种提高二极管开关速度的方法。
为达到上述目的,本发明采用以下技术方案予以实现:
一种提高二极管开关速度的方法,在PN结或PIN结周围进行铂扩散;
其中,铂扩散处理的条件为:在惰性气体的环境下,在800~1100℃退火30~120min。
进一步的,包括以下步骤:
1)将硅片进行氧化,按照设计方案在氧化后的硅片上进行基区光刻;
2)采用注入杂质的方法对基区进行掺杂;
3)在1100~1200℃的温度下进行杂质再分布,形成PN结;
4)在硅片背面进行蒸铂,在惰性气体下进行退火处理。
进一步的,基区的掺杂浓度为1×1015~1×1016cm-3。
进一步的,步骤4)中,在硅片背面蒸铂形成的铂层厚度为10~200nm。
与现有技术相比,本发明具有以下有益效果:
本发明的提高二极管开关速度的方法,在硅片背面进行铂扩散,即在800~1100℃、惰性气体下退火30~120min,二极管的反向恢复时间在IF=1.0A、VR=30V时,可控制在20~80ns,在IF=25A、VR=160V时,可控制在25~100ns,本发明通过掺铂控制少子寿命,铂在硅中为快扩散杂质,在800~1100℃的氮气气氛中扩散让铂原子快速扩入整个硅片,此时,铂在硅中有两种状态,即间铂原子和替位铂原子,其中,替位铂原子才能起到复合中心的作用;扩散初期替位铂原子的比例较低,在设定温度中退火30~120min,能够使更多的铂原子进入硅晶格中,形成替位铂原子,成为复合中心降低少子寿命;铂在硅禁带中有4个能级,两个施主能级和两个受主能级,其中,受主能级EV+0.42ev靠近禁带中心起主要少子复合作用;PN结或PIN结掺铂后,铂复合中心会对快恢复二极管基区进行杂质补偿导致基区有效浓度降低,因此,器件的反向击穿电压会较大幅度提高,正向压降略有提升;同时,由于铂复合能级距离硅禁带中心较远,因此,高温下PN结或PIN结漏电流小,稳定性高;本发明的方法制造的硅基半导体分立器件具有开关速度快、漏电流小、可靠性高的特点。
附图说明
图1为硅中复合中心的能带图;
图2为实施例1的PN结在铂扩散前后的结构示意图,其中,图2(a)为扩散前的PN结,图2(b)为扩散后的PN结;
图3为实施例2的PIN结的结构示意图,其中,图3(a)为快恢复二极管结构图,图3(b)为快恢复二极管浓度分布图。
具体实施方式
为了使本技术领域的人员更好地理解本发明方案,下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分的实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都应当属于本发明保护的范围。
需要说明的是,本发明的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象,而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换,以便这里描述的本发明的实施例能够以除了在这里图示或描述的那些以外的顺序实施。此外,术语“包括”和“具有”以及他们的任何变形,意图在于覆盖不排他的包含,例如,包含了一系列步骤或单元的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元,而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。
下面结合附图对本发明做进一步详细描述:
实施例1
在PN结周围掺铂,具体步骤如下:
1)首先对硅材料进行氧化,然后按照设计方案进行基区光刻,采用注入的方法对基区掺杂,基区的掺杂浓度为1×1015~1×1016cm-3;
2)然后在1100℃下进行杂质再分布形成PN结;
3)在硅片背面蒸铂,厚度为50-100nm;
4)在氮气环境中,800℃下退火50min。
参见图2,图2(a)掺杂铂前的PN结的结构示意图,图2(b)为掺杂铂后PN结的结构示意图,显示铂扩散到了PN内。
实施例2
在PIN结周围掺铂,具体步骤如下:
在PIN结的硅片背面蒸铂,厚度为10~50nm,之后在氮气的环境中进行退火,退火温度为900℃,退火时间为50min。
实施例2的二极管的结构示意图参见图3(a),采用PIN结构即高浓度掺杂的阳极P+区、低浓度掺杂的I(N-)区、高浓度掺杂的阴极N+区;其中,N-区厚度为15~20μm,电阻率为5~7Ω·cm;N+区的厚度为200~220μm,电阻率为0.001~0.005Ω·cm;基区P+的结深为5~10μm,表面浓度为1×1017~1×1018cm-3。
参见图3(b),图3(b)为快恢复二极管的浓度分布图,N-区厚度15-20μm,电阻率为5-7Ω.cm;N+区厚度200-220μm,电阻率为0.001-0.005Ω.cm;基区P+结深5-10μm,表面浓度为1×1017-1×1018cm-3。
从表1可以看出,实施例2的二极管耐压200V,额定电流为25A,反向恢复时间小于35ns,以上各项参数均满足快恢复二极管的要求。
表1实施例制造的器件的参数
以上内容仅为说明本发明的技术思想,不能以此限定本发明的保护范围,凡是按照本发明提出的技术思想,在技术方案基础上所做的任何改动,均落入本发明权利要求书的保护范围之内。
Claims (4)
1.一种提高二极管开关速度的方法,其特征在于,在PN结或PIN结周围进行铂扩散;
其中,铂扩散处理的条件为:在惰性气体的环境下,在800~1100℃退火30~120min。
2.根据权利要求1所述的提高二极管开关速度的方法,其特征在于,包括以下步骤:
1)将硅片进行氧化,按照设计方案在氧化后的硅片上进行基区光刻;
2)采用注入杂质的方法对基区进行掺杂;
3)在1100~1200℃的温度下进行杂质再分布,形成PN结;
4)在硅片背面进行蒸铂,在惰性气体下进行退火处理。
3.根据权利要求2所述的提高二极管开关速度的方法,其特征在于,步骤2)中,基区的掺杂浓度为1×1015~1×1016cm-3。
4.根据权利要求2所述的提高二极管开关速度的方法,其特征在于,步骤4)中,在硅片背面蒸铂形成的铂层厚度为10~200nm。
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CN113394095A (zh) * | 2021-06-18 | 2021-09-14 | 江苏晟驰微电子有限公司 | 一种超快恢复器件芯片制造工艺 |
CN115458583A (zh) * | 2022-09-01 | 2022-12-09 | 扬州国宇电子有限公司 | 一种快恢复二极管的金铂双掺杂方法 |
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JP2000223719A (ja) * | 1999-01-27 | 2000-08-11 | Shindengen Electric Mfg Co Ltd | 半導体装置 |
US6358825B1 (en) * | 2000-11-21 | 2002-03-19 | Fairchild Semiconductor Corporation | Process for controlling lifetime in a P-I-N diode and for forming diode with improved lifetime control |
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CN115458583A (zh) * | 2022-09-01 | 2022-12-09 | 扬州国宇电子有限公司 | 一种快恢复二极管的金铂双掺杂方法 |
CN115458583B (zh) * | 2022-09-01 | 2023-12-08 | 扬州国宇电子有限公司 | 一种快恢复二极管的金铂双掺杂方法 |
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