CN111585553A - Short-circuit protection structure and protection method for wide bandgap semiconductor SiC MOSFET - Google Patents

Abstract

The invention relates to a short-circuit protection structure and a short-circuit protection method for a wide-bandgap semiconductor SiC MOSFET (metal-oxide-semiconductor field effect transistor), which comprise a comparison and logic turn-off circuit, an RCD (resistor-capacitor-diode) integrating circuit and a reset circuit, wherein the RCD integrating circuit comprises an integrating capacitor C_fIntegrating resistor R_fBlocking diode D_bloEarth resistance R_groGround resistance R_groConnected in parallel to a blocking diode D_bloTwo-terminal, blocking diode D_bloThe positive terminal of the positive electrode is connected with an integrating resistor R in sequence_fIntegrating capacitor C_f(ii) a Integrating capacitor C_fIs grounded at the other end V_sIntegral capacitance C_fThe ground terminal of the blocking diode is connected with the Kelvin source electrode of the SiC MOSFET_bloThe negative electrode end of the SiC MOSFET is connected with the power source electrode of the SiC MOSFET; output end of RCD integrating circuit is from integrating capacitor C_fAnd an integrating resistor R_fAnd the output end of the comparator is respectively connected into the comparison and logic turn-off circuit and the reset circuit. The huge detection error of the conventional di/dt-RC detection in the case of load short-circuit fault is reduced. In thatUnder the FUL fault, the short-circuit protection error is reduced from 51.3% to 6.4%, and the protection time is shortened by 50 ns.

Description

Short-circuit protection structure and protection method for wide bandgap semiconductor SiC MOSFET

Technical Field

The invention relates to a short-circuit protection structure and a short-circuit protection method for a wide bandgap semiconductor SiC MOSFET.

Background

SiC MOSFET short circuit protection strategies are more important and difficult than IGBTs. There are three reasons for this. First, SiCMOSFET workplaces face more serious electromagnetic interference (EMI) problems, which can lead to errors in the control signal portion and ultimately to short circuit failures. Secondly, SiC MOSFETs have higher short circuit currents and smaller chip sizes, and therefore have shorter short circuit withstand times than IGBTs. Third, the static characteristics of SiC MOSFETs change more with temperature, which makes the reliability of most widely used desaturation detection techniques less reliable.

At present, most of short-circuit protection of SiC MOSFETs (metal oxide semiconductor field effect transistors) is realized by means of IGBT (insulated gate bipolar transistor) short-circuit protection modes, which mainly comprise desaturation detection, current sensor detection, sampling resistor detection and di/dt detection. Wherein the conventional di/dt detection uses the parasitic inductance of the SiC MOSFET itself for current collection. The current waveform is restored using an RC integration circuit (low pass filter). And finally, adding comparison, latching and logic turn-off to realize short-circuit protection of the SiC MOSFET. However, di/dt detection presents some problems in the case of a load short circuit Fault (FUL), as will be described in detail below.

Conventional di/dt detection principle

For the purpose of distinction from the inventive detection method, the conventional di/dt detection is hereafter referred to collectively as di/dt-RC detection.

A. Rationale and calculation

The general principle of di/dt-RC detection is shown in FIG. 1. From right to left, three parts are formed: the circuit comprises a differentiating circuit, an integrating circuit and a comparing and logic shutdown circuit. These three circuits will be described below.

In a differentiating circuitThrough a parasitic inductance L between the Kelvin source and the power source of the SiC MOSFET_SsObtaining a drain-source current i_DSThe differential information of (1). Parasitic inductance L_SsThe voltages at both ends are:

wherein di_DSThe drain-source current i is represented by/dt_DSDifferential of (V)_SsIs the parasitic inductance voltage.

In the integrating circuit, the parasitic inductance voltage V obtained by the differentiating circuit is used_SsIntegrating the signal to obtain the current i between the drain and the source_DSProportional integrating capacitor output voltage V_oAnd the proportionality coefficient of the two is about A, and the proportionality coefficient is obtained according to the formula (2):

in the above formula, R_f、C_fAnd V_oRespectively, the output voltage of the integrating resistor, the integrating capacitor and the integrating capacitor of the RC integrator, and A is defined as the output voltage of the integrator (the output voltage V of the integrating capacitor)_o) And the actual current (drain-source current i)_DS) The proportional value of (c).

Because the current rises sharply under short circuit conditions, only a high frequency integrator is needed to reflect the current information at short circuit. A passive RC low pass filter is usually used as the high frequency integrator. When short circuit occurs, drain-source current i_DSRises sharply, corresponding to the output voltage V of the integrating capacitor_oThe absolute value of (a) also rises sharply.

In a comparison and logic turn-off circuit, the integrating capacitor outputs a voltage V_oA preset threshold voltage V connected to the positive terminal of the comparator_(th)Is connected to the negative terminal of the comparator. In determining parasitic inductance L_SsIntegrating resistor R_fAnd an integrating capacitor C_fAfter the setting of (c), it is possible to select different threshold voltages V_(th)To adjust the short circuit current protection threshold. Turn-off MOSFET using SR latchM_soAnd a turn-off resistance R_soTo achieve the function of turning off the SiC MOSFET required for short circuit protection, as shown in the left part of fig. 1.

Problem of RC integrating circuit

Indeed, faster, simpler di/dt-RC detection has not been widely used for short circuit protection of SiC MOSFETs. Because it has the following problems.

Before explaining the problem, first, classification (two types in total) of short-circuit of SiC MOSFETs needs to be described. The short circuit fault that occurs when the SiCMOSFET is turned on is referred to as a Hard Switching Fault (HSF). A short fault occurring at a certain time after the SiC MOSFET is fully turned on is called a load short Fault (FUL). Under three conditions of no fault, HSF and FUL, the drain-source current i_DSAnd integrating capacitor output voltage V_oThe waveform of (2) is shown in fig. 2. Wherein, time t₁Time t₄Peak voltage V of integrating capacitor under HSF_HSFPeak voltage V of integrating capacitor under sum FUL_FULRespectively showing the time when two short circuits occur and the output voltage V of the integrating capacitor_oThe peak that can be reached. Peak value of drain-source current i under HSF_HSFAnd peak value of drain-source current i under FUL_FULIs and V_HSFAnd V_FULCorresponding drain-source current i_DSThe value of (c). Fault-free drain-source current i_NorIs the drain-source current i after the device is turned on in the absence of a fault_DS. Output voltage V of integral capacitor without fault_NorIs the device turn-on transient without failure (t of (b) in fig. 2)₂Time of day) of the output voltage V of the integrating capacitor_o。

When the di/dt-RC short circuit detection method is used, under the same short circuit current peak value condition, the peak voltage V of the integral capacitor under HSF_HSFIn contrast, peak voltage V of integral capacitance under FUL_FULHas huge detection error V'_errAs shown in fig. 2 (b). The reason is that the SiC MOSFET is normally turned on for time t₂The time of day. At time t₂To time t₃Integrating capacitor output voltage V in time period_oThrough parasitic inductance L_SsAnd an integrating resistor R_fDischarged until it became 0V. Thus, at time t₃Thereafter, RC integratesThe device will generate a large error voltage V_errError voltage V_errAnd a fault-free drain-source current i_NorIs in direct proportion. In the case of FUL fault, this error voltage V_errPeak voltage V of integrating capacitor under FUL_FULIs reflected as a detection error V'_errTherefore, an error V 'is detected'_errApproximately equal to error voltage V_err. Since the HSF failure occurs during the SiC MOSFET start-up, no large detection error occurs. In summary, in the case of FUL fault, the current detected by the RC integrator is i compared with the actual current_NorThe detection error of (2).

Due to this detection error, the threshold voltage V at the positive terminal of the comparator in FIG. 1_(th)The design is difficult. If the threshold voltage V is_(th)Is greater than the peak voltage V of the integrating capacitor under FUL_FULObviously, the protection function cannot be activated under the full condition. If the threshold voltage V is_(th)Is less than or equal to peak voltage V of integrating capacitor under HSF_HSFThe absolute value of (d) may cause false protection due to current oscillation at SiC MOSFET switching transients.

Disclosure of Invention

The invention aims to provide a short-circuit protection structure for a wide bandgap semiconductor SiC MOSFET and a protection method thereof. An RCD integrating circuit is provided in the protection structure, so that the error of the RC integrating circuit is compensated, and the purpose of improving the di/dt detection accuracy is achieved. The invention is hereafter referred to as di/dt-RCD detection short circuit protection.

In order to achieve the purpose, the technical scheme of the invention is as follows:

a short-circuit protection structure for a wide bandgap semiconductor SiC MOSFET comprises a comparison and logic turn-off circuit, and is characterized by further comprising an RCD integrating circuit and a reset circuit,

the RCD integrating circuit comprises an integrating capacitor C_fIntegrating resistor R_fBlocking diode D_bloEarth resistance R_groGround resistance R_groConnected in parallel to a blocking diode D_bloTwo-terminal, blocking diode D_bloIs turning toThe extreme ends are connected with an integrating resistor R in sequence_fIntegrating capacitor C_f(ii) a Integrating capacitor C_fIs grounded at the other end V_sIntegral capacitance C_fThe ground terminal of the diode is connected with a Kelvin source electrode and a blocking diode D_bloThe negative electrode end of the power source is connected with the power source electrode; output end of RCD integrating circuit is from integrating capacitor C_fAnd an integrating resistor R_fThe output end of the comparator is respectively connected into the comparison and logic turn-off circuit and the reset circuit;

the reset circuit is used for outputting the voltage V of the integrating capacitor when the SiC MOSFET is switched off_oAnd the voltage is reduced to zero, so that the function of forcibly resetting the integral capacitor is realized.

The reset circuit comprises a comparator U2, wherein the positive input end of the comparator U2 is connected with a resistor R₃And a resistance R₄At the junction of (3), resistance R₃The other end is connected with a-5V power supply and a resistor R₄The other end is connected with a +15V power supply; operating voltage V of comparator U2_(comp)Ensuring that the voltage is less than the turn-on voltage of the protected SiC MOSFET; the negative input terminal of the comparator U2 passes through the resistor R₅Connected to the drive pulse V_gsAnd a gate resistance R_gWhile the negative input of the comparator U2 passes through the resistor R₆Grounding V_s(ii) a The comparator U2 is powered by-5V and + 15V;

the output end of the comparator U2 passes through a reset capacitor C_REAre respectively connected with reset resistors R_REOne terminal of, reset MOSFET M_resetThe gate of (1), the reset resistor R_REIs connected at the other end to a reset MOSFET M_resetIs connected to ground V_s(ii) a Resetting a mosfet m_resetIs connected to the output of the RCD integration circuit, i.e. the integration capacitor C_fAnd an integrating resistor R_fIn the meantime.

The circuit of the comparison and logic turn-off circuit is as follows: integrating capacitor output voltage V_oIs connected to the positive input terminal of a comparator U1, and the negative input terminal of a comparator U1 is connected to a resistor R₁And a resistance R₂The connection point of (a); resistance R₁The other end is connected to-5V, a resistor R₂The other end is connected to the ground V_s(0V)；

Comparator U1 output connectionTo the 2S 'end of SR latch U3, the 2R' end of SR latch U3 is connected to ground V_sA terminal; 2Q end connecting resistor R of SR latch U3₇Resistance R₇The other end is connected with and disconnected with the MOSFET M_soGate of turn-off MOSFET M_soIs a small MOSFET of a signal level, the turn-off MOSFET M_soAnd the GND terminal of SR latch U3 are both connected to-5V; when the 2Q output of SR latch U3 is positive, indicating that short-circuit protection is triggered, the 2Q of SR latch U3 turns off MOSFET M_soOpening; turn-off MOSFET M_soDrain electrode of (3) is connected to the turn-off resistor R_soOff resistance R_soIs connected to the drive pulse V at the other end_gsAnd a gate resistance R_gThe joint of (a); turn-off MOSFET M_soDrive pulse V of handle after opening_gsBy turning off the resistor R_soAnd turn off MOSFET M_soThe drain source of (a) is connected to-5V.

The short-circuit protection method for the wide-bandgap semiconductor SiC MOSFET adopts the short-circuit protection structure, and is characterized in that an RCD (resistor-capacitor-diode) integrating circuit is used for accurately measuring the short-circuit drain-source current i of the SiC MOSFET_DSWhen the drain-source current i_DSWhen the short-circuit current is larger than the set short-circuit current action value, the voltage signal output by the RCD integrating circuit enables the comparison and logic turn-off circuit to act to turn off the SiC MOSFET; whether the switch-off is in short circuit or normal state, the reset circuit is responsible for outputting voltage V to the integrating capacitor in the RCD integrating circuit after the SiC MOSFET is switched off every time_oTo 0V.

When the device is normally switched on and transient or short-circuited, the RCD integrating circuit plays a role in converting the parasitic inductance voltage V_SsThe signal is integrated, and the output of the integration result is the output voltage V of the integrating capacitor_o；

During the period of time after the normal turn-on transient of the protected SiC MOSFET but not until the turn-off time, when the integrating capacitor outputs the voltage V_oOn release, the diode D is blocked_bloIn a blocking state and a ground resistance R_groIs set to a large resistance, so that the integrating capacitor outputs a voltage V_oCan not be released; if the short circuit occurs in the time period, the integrating capacitor outputs a voltage V_oThe current can be increased from the normal value, the normal short-circuit current can be reflected, and the comparison and logic turn-off at the back can accurately identify the short-circuit fault, so that the device can be effectively protected;

threshold voltage V on negative terminal of comparator U1 in comparison and logic shutdown circuit_(th)Through a ground resistor R_groAnd a differential resistor R_difForm loop current to prevent integrating capacitor C_fQuilt V_(th)Mis-charging, resulting in an output voltage V_oThe occurrence of a false raise condition;

when driving pulse V_gsWhen the voltage is less than 0V, the SiC MOSFET is turned off, the negative input end of a comparator U2 in the reset circuit is also less than 0V, and the output potential of the comparator U2 is inverted from-5V to +15V until a driving pulse V_gsWhen the voltage is more than 0V again, the SiCMOS is started again; reset capacitor C in reset circuit_REReset resistor R_REThe step signal which is output by the comparator U2 and is inverted from-5V to +15V is converted into a reset pulse time t_resetMagnitude of single pulse signal at reset resistor R_RETwo-terminal output, reset pulse time t_resetCalculated according to the formula (3);

reset resistor R_REConnected to the reset MOSFET M_resetAt the reset pulse time t_resetReset MOSFET M in time_resetIn the on state, the voltage V of the integrating capacitor is generated_oAnd forcibly reducing the temperature to zero.

A double-pulse experiment (DPT) platform integrating di/dt-RCD detection comprises an oscilloscope, a pulse generator, a low-voltage power supply and a load inductor L_loadThe experimental platform also comprises an upper tube, a lower tube, an RCD integrating circuit, a reset circuit, a comparison and logic turn-off circuit, a driving circuit and a half-bridge circuit consisting of the upper tube and the lower tube; high voltage power supply V_DCSupplying power to the half-bridge circuit, connecting a load inductor L in parallel with the upper tube_loadKelvin source and work of the lower tubeParasitic inductance L in series between rate source electrodes_SsThe RCD integrating circuit, the reset circuit and the comparison and logic turn-off circuit adopt the structure to form a short-circuit protection circuit PCB, the short-circuit protection circuit PCB is provided with three power interfaces, an RCD integrating positive interface, an RCD integrating negative interface and a protection turn-off interface, and the three power interfaces are respectively connected with +15V and ground V provided by a low-voltage power supply_sA voltage interface of (0V) and a voltage interface of-5V, an RCD integral positive interface, an RCD integral negative interface and a protection turn-off interface are respectively and correspondingly connected with a Kelvin source electrode, a power source electrode and a driving pulse V of a lower tube_gs(ii) a The oscillograph obtains the recorded waveform data as follows: drain-source current i of lower tube_DSOutput voltage V of integrating capacitor of RCD integrating circuit_oTurn-off MOSFET M in a compare and logic turn-off circuit_soGate voltage V of_{GS_MOFF}；

The lower tube is a wide bandgap semiconductor SiC MOSFET to be protected, and the upper tube is a SiC MOSFET with rated current value larger than that of the lower tube;

the pulse generator is used for generating control pulses of the upper tube and the lower tube, and the pulses generate driving pulses V through the driving circuit_gs0、V_gsTwo grid resistors are respectively arranged in the driving circuit corresponding to the upper tube and the lower tube, and the upper tube and the lower tube are respectively connected with one grid resistor R_g0、R_g，V_gs0、R_g0、V_gsAnd R_gUsed for controlling the on and off of the upper and lower tubes.

The DPT experimental platform is used for completing a protection test method for di/dt-RCD detection under the FUL fault, and the test method comprises the following steps:

firstly, a low-voltage power supply supplies power to enable a low-voltage part of the device to operate; setting the pulse of the pulse generator and the voltage of the driving circuit, so that the upper tube and the lower tube are switched on and off according to the set pulse sequence;

setting a high voltage supply V_DCThe output is 300V, the load inductance is 200uH, a trigger button of the pulse generator is pressed, the upper tube and the lower tube can be switched on and off according to a set pulse sequence, and specifically:

at t_{1_1}To t_{1_2}Time period, lower tube is open and highPiezoelectric power supply and load inductor L_loadAnd a lower tube forming a path through which a path current i flows_loadStarts to increase from zero, and makes the path current i_loadWhen the rated current value of the lower tube is reached, the grid leakage voltage of the lower tube in the time period is always 15V;

at t_{1_2}To t_{1_3}Time period, the lower tube is in a closed state, and the load inductance L_loadOn the path current i_loadFreewheeling through the body diode of the upper tube, the current magnitude being maintained substantially at t_{1_2}The time is such that the lower tube is completely closed and at t_{1_3}Starting the circuit all the time, wherein the drain voltage of the lower tube grid in the time period is always-5V;

at t_{1_3}To t_{1_4}In the time period, the lower tube is opened again, and the high-voltage power supply and the load inductor L are connected_loadAnd the lower tube forms a path again, the current i of the path_loadFrom t_{1_2}The current magnitude continues to increase; at t_{1_4}At a moment, the upper pipe is opened, which corresponds to t_{1_3}The lower pipe is suddenly short-circuited after being opened at any moment, namely FUL short-circuit fault of the lower pipe is simulated, and t_{1_3}To t_{1_4}The time interval is used for opening the upper pipe after the lower pipe is completely opened; t is t_{1_3}To t_{1_4}The gate-drain voltage of the lower tube in the time period is 15V, t_{1_1}To t_{1_4}The gate leakage voltage of the transistor on the time segment is-5V, t_{1_4}The gate leakage voltage of the upper tube is changed into 15V at any moment;

t_{1_4}to t_{1_5}Time period for performing protection circuit test, at t_{1_5}And closing the upper pipe and the lower pipe at the same time, and finishing the test.

Compared with the prior art, the invention has the beneficial effects that:

after the normal turn-on transient state of the device, the parasitic inductance voltage V of the existing RC integral circuit_SsBecomes zero, resulting in an output voltage V of the integrating capacitor_oThrough parasitic inductance L_SsAnd an integrating resistor R_fIs released to zero, which results in: if a short circuit (or FUL fault) occurs during a time period after the normal turn-on transient of the device (but not until the turn-off time), the integrating capacitor outputs a voltage V_oWill increase from zero (due to the previous voltage release) causing the short circuit current it reflects to be smaller; such detection errors may cause the following comparison and logic shutdown to fail to accurately identify the short-circuit fault, so that the device is not effectively protected. The invention introduces the RCD integrating circuit therein, obviously reduces the detection error of di/dt detection in the case of load short circuit Fault (FUL), and effectively shortens the short circuit protection time.

Drawings

FIG. 1 is a schematic diagram of a di/dt-RC detection protection circuit.

FIG. 2 shows the drain-source current i of the di/dt-RC detection under normal (no fault), HSF fault and FUL fault conditions_DSAnd integrating capacitor output voltage V_oWherein (a) is a drain-source current i_DSWaveform diagram with time, (b) is output voltage V of integrating capacitor_oIs plotted against time.

FIG. 3 is a schematic diagram of a circuit for short-circuit protection of a wide bandgap semiconductor SiC MOSFET according to the present invention (di/dt-RCD detection short-circuit protection method). The PCB circuit board manufactured completely according to this figure is the circuit board corresponding to the proposed short circuit protection.

FIG. 4 is a comparison of waveforms for an HSF fault and a FUL fault for a di/dt-RCD test and a di/dt-RC test according to the present invention, where (a) is a drain-source current i_DSWaveform diagram with time, (b) is output voltage V of integrating capacitor_oIs plotted against time.

Fig. 5 is a simplified diagram of a comparator in a differentiating circuit, an integrating circuit and a comparing and logic shutdown circuit in the structure of the present invention (di/dt-RCD detection short-circuit protection method). In order to simplify the analysis, a part of fig. 3 was separately extracted.

FIG. 6 integrates the DPT experimental platform for di/dt-RCD detection. In order to verify the correctness of the invention, a verification experimental device is built.

FIG. 7 integrates the corresponding schematic of the DPT experimental platform for di/dt-RCD detection.

Fig. 8 is a pulse sequence used to simulate an FUL short fault.

FIG. 9 is a di/dt-RCD assay of the present inventionAnd comparing waveforms of verification experiments carried out by the short-circuit protection method and the di/dt-RC detection short-circuit protection method. Wherein (a) is the experimental result of the method for detecting the short-circuit protection by di/dt-RCD, and (b) is the experimental result of the method for detecting the short-circuit protection by di/dt-RC. Wherein the gate voltage V_{GS_MOFF}The waveform refers to the gate voltage waveform of the turn-off MOSFET Mso of the signal stage used to turn off the SiC MOSFET.

Detailed Description

The present invention is further explained with reference to the following examples and drawings, but the scope of the present invention is not limited thereto.

The inventive short-circuit protection structure for a wide bandgap semiconductor SiC MOSFET (see fig. 3) comprises an RCD integration circuit, a reset circuit, a comparison and logic turn-off circuit,

for convenience of explanation of the above three sections, the actual SiC MOSFET driving circuit will be used with the driving pulse V at the upper left corner_gsAnd a gate resistance R_gSimple structural representation of the composition.

Parasitic inductance L between Kelvin source and power source by SiC MOSFET with Kelvin source structure_SsAs a pick-up sensor for current signals. The RCD integrating circuit comprises an integrating capacitor C_fIntegrating resistor R_fBlocking diode D_bloEarth resistance R_gro. Ground resistance R_groConnected in parallel to a blocking diode D_bloTwo-terminal, blocking diode D_bloThe positive terminal of the positive electrode is connected with an integrating resistor R in sequence_fIntegrating capacitor C_f. Integrating capacitor C_fIs grounded at the other end V_sIntegral capacitance C_fThe ground terminal of the diode is connected with a Kelvin source electrode and a blocking diode D_bloThe negative electrode end of the power source is connected with the power source electrode; output end of RCD integrating circuit is from integrating capacitor C_fAnd an integrating resistor R_fThe output end of the comparator is respectively connected into the comparison and logic turn-off circuit and the reset circuit;

the parameters of the components are as follows, wherein the grounding resistance R_groCan be selected in the range of 20-50k Ω, preferably 30k Ω:

TABLE 1

LSs	Vs	Dblo	Rgro	Cf	Rf
						3nH	0V	Lbas70	30kΩ	470pF	300Ω

Wherein the parasitic inductance L_SsThe parameters inherent to the SiC MOSFET are not set manually.

When the SiC MOSFET is in normal on transient state or short circuit, the parasitic inductance L_SsGenerating a parasitic inductance voltage V with positive top and negative bottom_Ss. According to formula (1)

It can be seen that this voltage is related to the drain-source current i_DSThe differential of magnitude is proportional, the proportionality coefficient being the parasitic inductance L_SsSize.

The invention is in parasitic inductance L_SsThe two ends of the RCD integration circuit are connected to restore the current. When the device is normally switched on in transient state or short circuit, the parasitic inductance voltage V_SsThe generated current is induced by the parasitic inductance L_SsThe positive terminal (SiC MOSFET Kelvin source) passes through an integrating capacitor C_fIntegrating resistor R_fAnd a blocking diode D_bloParallel grounding resistor R_groFinally reaches the parasitic inductance L_SsNegative terminal (power source). Since the diode is now in a forward conducting state, the diode D can be blocked_bloParallel grounding resistor R_groTo be seen as a short circuit condition. In summary, the effect of the RCD integrator is the same as that of the RC integrator when the device is normally switched on and transited or short-circuited, so that the parasitic inductive voltage V is achieved_SsThe signal is integrated, and the output of the integration result is the output voltage V of the integrating capacitor_o. According to the formula:

knowing the output voltage V of the integrating capacitor_oAnd drain-source current i_DSProportional, the scaling factor is about a. Therefore, the RCD integrating circuit realizes the drain-source current i when the device is normally switched on and transited or short-circuited_DSReducing the effect according to the proportion.

The RCD integrating circuit of the invention is added with a blocking diode D_bloParallel grounding resistor R_gro. Integrating capacitor output voltage V_oNeed to pass through parasitic inductance L_SsIntegrating resistor R_fAnd a blocking diode D_bloParallel grounding resistor R_groCan be released to zero. But when the integrating capacitor outputs a voltage V_oOn release, the diode D is blocked_bloIn a blocking state and a ground resistance R_groA large resistance of 30k ohms is set. So that the integrating capacitor outputs a voltage V_oIs not released. Thus, when a short circuit occurs during the time period after the normal turn-on transient (but not until the turn-off time), the integrating capacitor in the RCD integrating circuit outputs a voltage V compared to the RC integrating circuit_oWill increase from a normal size (since the previous voltage was not released). Therefore, it correctly reflects the magnitude of the short-circuit current, and makes the comparison andthe logic is switched off, so that the short-circuit fault is accurately identified, and the device can be effectively protected.

The RCD integrating circuit in the invention adds a grounding resistor R_groThe reason for (A) is to avoid the integrating capacitance C_fComparator with back connection to capacitor C_fResulting in the occurrence of false protection.

The reset circuit is used for outputting the voltage V of the integrating capacitor when the SiC MOSFET is switched off_oAnd the capacitance is reduced to zero, so that the effect of forcibly resetting the capacitance is achieved. Comprises a comparator U2, wherein the positive input end of the comparator U2 is connected with a resistor R₃And a resistance R₄At the junction of (3), resistance R₃The other end is connected with a-5V power supply and a resistor R₄The other end is connected with a +15V power supply; this serves to set the operating voltage of comparator U2, resistor R being used here₃Is 1k omega, resistance R₄Is 3k omega, the comparator U2 acts on the voltage V_(comp)Is 0V (comparator U2 action voltage V)_(comp)To ensure less than the turn-on voltage of the protected SiC MOSFET).

The negative input terminal of the comparator U2 passes through the resistor R₅Connected to the drive pulse V_gsAnd a gate resistance R_gWhile the negative input of the comparator U2 passes through the resistor R₆Grounding V_s(ii) a The comparator U2 is powered by-5V and + 15V;

the output end of the comparator U2 passes through a reset capacitor C_REAre respectively connected with reset resistors R_REOne terminal of, reset MOSFET M_resetThe gate of (1), the reset resistor R_REIs connected at the other end to a reset MOSFET M_resetThe drain electrode of the transistor is grounded; reset MOSFET M_resetIs connected to the output of the RCD integration circuit, i.e. the integration capacitor C_fAnd an integrating resistor R_fIn the meantime.

When driving pulse V_gsWhen the voltage is less than 0V (when the SiC MOSFET is turned off), the negative input end of the comparator U2 is also less than 0V, and the output potential of the comparator U2 is inverted to +15V from-5V until the driving pulse V is reached_gsAgain greater than 0V (when the SiC MOSFET is turned on again). Reset capacitor C_REReset resistor R_REThe step signal which is output by the comparator U2 and is inverted from-5V to +15VConversion into on-time as reset pulse time t_resetMagnitude of single pulse signal at reset resistor R_REAnd outputting at two ends. Reset pulse time t_resetThe calculation is shown in formula (3)

Reset resistor R_REConnected to the reset MOSFET M_resetAt the reset pulse time t_resetReset MOSFET M in time_resetIs in an on state, thereby realizing the integration capacitor C_fThe effect of the voltage drop being zero.

It should be noted that although the reset resistor R is present_REConnected to the reset MOSFET M_resetInstead of the gate-source, but it is also possible to turn on the reset MOSFET M_reset. Because of the reset MOSFET M_resetThe maximum drain-source voltage of the reset MOSFET M is only 1-2V, but the grid-drain voltage can reach 15V when the reset MOSFET M is started, so that the grid-source voltage can reach 13-14V, and the reset MOSFET M can be completely started_reset。

The parameters of each component in the reset circuit are as follows:

TABLE 2

R3

R4

R5

R6

U2

CRE

RRE

Mreset

1kΩ

3kΩ

1kΩ

1kΩ

THS4631D

100pF

250Ω

BSS138P

The comparison and logic turn-off circuit is responsible for comparing the output voltage V of the integrating capacitor in the RCD integrating circuit_oAnd a set threshold voltage V_(th)Then state latching and shorting device turn off. The specific principle is as follows:

integrating capacitor output voltage V_oIs connected to the positive input terminal of a comparator U1, and the negative input terminal of a comparator U1 is connected to a resistor R₁And a resistance R₂The connection point of (a). Resistance R₁The other end is connected to-5V, a resistor R₂The other end is connected to ground V_s(0V). This serves to set the operating voltage of comparator U1, resistor R being used here₁3.2k omega, resistance R₂Is 1.8k omega, so the threshold voltage V of the comparator U1_(th)is-1.8V. Here, when the magnitude of the SiC MOSFET short circuit current exceeds 84.6A, the integrating capacitor outputs a voltage V due to the action of the RCD integrator_oFalls below-1.8V so the comparator U1 output is-5V and the comparator U1 output is connected to the 2S' terminal of SR latch U3. And because 2R' of SR latch U3 is connected to ground V_sTerminal, so the 2Q terminal output of SR latch U3 is positive and latching (the 2Q terminal output of SR latch U3 always goes positive). 2Q end connecting resistor R of SR latch U3₇Resistance R₇The other end is connected withTurn-off MOSFET M_soGate of turn-off MOSFET M_soIs a small MOSFET of a signal level, the turn-off MOSFET M_soAnd the GND terminal of SR latch U3 are both connected to-5V. When the 2Q output of SR latch U3 is positive, indicating that short-circuit protection is triggered, the 2Q of SR latch U3 turns off MOSFET M_soAnd (4) opening. Turn-off MOSFET M_soDrain electrode of (3) is connected to the turn-off resistor R_soOff resistance R_soIs connected to the drive pulse V at the other end_gsAnd a gate resistance R_gThe joint of (1). Turn-off mosfet m_soDrive pulse V of handle after opening_gsBy turning off the resistor R_soAnd turn off MOSFET M_soThe drain source of (a) is connected to-5V. The gate voltage of the SiC MOSFET to be protected is forced to be driven by the driving pulse V_gsThe voltage level drops to a level close to-5V (because of the off-resistance R_soAnd turn off MOSFET M_soThe on-resistance between the drain and the source of (1) is not completely at-5V). This turns off the SiC MOSFET in the short-circuited state. Thereby playing the role of short-circuit protection of the SiC MOSFET.

The component parameters of the comparison and logic turn-off circuit are as follows:

TABLE 3

R1

R2

U1

Rso

R7

Mso

U3

3.2kΩ

1.8kΩ

ADCMP600

100

1Ω

LBSS138

SN74LS279

So far, the overall structure and principle explanation of the RCD integrating circuit, the reset circuit and the comparison and logic turn-off circuit are completed.

The invention relates to a short-circuit protection method for a wide-bandgap semiconductor SiC MOSFET (Metal-oxide-semiconductor field Effect transistor). an RCD (capacitive coupled device) integrating circuit is used for accurately measuring the short-circuit drain-source current i of the SiC MOSFET_DSWhen short circuit occurs, the RCD integrating circuit passes through the parasitic inductance L_SsCapture short-circuit information and integrate the short-circuit information in an integrating capacitor C_fOutputting at two ends; when the drain-source current i_DSWhen the short-circuit current is larger than the set short-circuit current action value, the voltage signal output by the RCD integrating circuit enables the comparison and logic turn-off circuit to act (plays a role in turning off the SiC MOSFET); the reset circuit is responsible for outputting the voltage V of the integrating capacitor in the RCD integrating circuit after the SiC MOSFET is turned off (whether the SiC MOSFET is turned off in short circuit or in normal state)_oTo 0V. The comparison and logic turn-off circuit is responsible for collecting short circuit information captured by the RCD integrating circuit, realizing the latching of the information and finally turning off the SiC MOSFET.

The design core of the method is as follows:

as can be seen from FIG. 2, the root cause of the error of the RC integrator circuit when FUL fault occurs is the integrating capacitor C_fAt time t₂To time t₃Through an integrating resistor R during a time period_fAnd parasitic inductance L_SsIs released. To solve this problem, an RCD integration circuit as shown in fig. 3 is proposed. It adds a blocking diode D_bloA large ground resistance R_groAnd a reset circuit. The function of each part will be described in detail below.

A. Blocking diode

Added blocking diode D_bloAt the heart of the invention, it may prevent time t in FIG. 2₂Then integrating capacitor output voltage V_oIs released (integrating capacitance C)_fDischarge). At the same time, it integrates in the forward direction (integrating capacitance C)_fCharging) has substantially no effect. Fig. 4(b) shows a comparison of RC and RCD integration circuits. In ideal case, when at time t'₄When FUL occurs, the RCD integrator circuit is compared to the RC integrator circuit because of the blocking diode D_bloBy the action of integrating capacitor output voltage V_oPromote V_promSize (prom is the first four letters of the "promoted" English promoter). The output voltage V of the integrating capacitor respectively corresponding to the HSF and FUL faults under the same short-circuit current is achieved_oAre substantially the same (V)_{HSF_RCD}≈V_{FUL_RCD}) The purpose of (1). Thus, by adding a blocking diode D_bloThe formed RCD integrating circuit can basically compensate the error of the RC integrating circuit.

Blocking diode D_bloThe Schottky diode with low on-state voltage, low reverse recovery current and high switching speed needs to be selected, and the blocking diode D needs to be designed according to actual conditions_bloRated forward current of, current i flowing into the RCD integration circuit_{RCD_P}Can be estimated as

Wherein, V_{Ss_P}Is an inductance L_SsVoltage peaks at both ends, blocking diode D in order to reduce the effect of diode forward voltage on RC integral_bloShould be greater than i_{RCD_P}。

Because the blocking diode D_bloThe addition of (2) causes new problems. The following sections B and C are the explanation and solution of the problem.

B. Reset circuit

Blocking diode D_bloMakes up for the error of the RC integrating circuit, and simultaneously blocks the integrating capacitor C_fThis results in a discharge loop after the SiC MOSFET is turned off (time t'₅Time and after) integrating capacitor output voltage V_oThe reduction is not caused, as in the case of fig. 4(b), the reset flag does not appear. This results in an integrating capacitor output voltage V_oThe accumulation of (c) can lead to false protection after several switching cycles.

After the reset circuit is added, when the SiC MOSFET is turned off, the voltage of the capacitor is reset to zero by the reset circuit. The principle is that when the gate drive pulse V is applied_gsWhen the voltage is zero, the comparator U2 outputs a positive voltage. After the positive voltage passes through the CR high-pass filter, it will become the control reset MOSFET M_resetConducting pulse signal. Reset pulse time t_resetDetermined by the CR high pass filter.

Wherein, the reset capacitor C_REAnd a reset resistor R_REIs the resistance and capacitance of the CR high pass filter.

Despite the reset resistance R_REConnected to the Kelvin source of the SiC MOSFET (reset MOSFET M)_resetDrain of) instead of the reset MOSFET M_resetOf the substrate. But the difference between the two source voltages is only one to two volts. Therefore, it does not affect the reset MOSFET M_resetIs opened.

C. Grounding resistor

In order to realize the short circuit judgment function when short circuit occurs, the integrating capacitor C_fNeeds to be connected to a comparator U1 as shown in fig. 5. Between the two inputs of the comparator U1 there is a differential resistance R of several hundred k ohms_dif. Threshold voltage V on negative terminal of comparator U1_(th)By integrating capacitance C_fAnd a differential resistor R_difLoop current ① is formed, therefore, integrating capacitor output voltage V_oWill gradually increase until it equals the threshold voltage V_(th)Resulting in a false protection. Increase the grounding resistance R_groCan be shapedA loop current ②, which outputs a voltage V to the integrating capacitor_oAnd (5) pulling down.

Although the ground resistance R_groThe smaller the integral capacitor output voltage V_oThe closer to 0V. However, if the ground resistance R is_groToo small, blocking diode D_bloIt will be lost. Ground resistance R_groThe compromise is chosen to be 30k omega.

di/dt-RC detection and di/dt-RCD detection short-circuit protection test experiment:

and (3) experimental test:

the experiment uses a Double Pulse Test (DPT) circuit to simulate the FUL short-circuit fault, and the FUL short-circuit protection is realized through di/dt-RCD detection and di/dt-RC detection respectively. The comparison verifies the effect of the di/dt-RCD detection. Specific platform structures, test methods, key parameter settings, and experimental results are presented below.

The DPT experimental platform has the following structure:

TABLE 4

The DPT experimental platform integrated with di/dt-RCD detection is shown in FIG. 6. The experiment simulates FUL fault and protects the lower tube of the platform, and the experiment platform comprises an oscilloscope, a pulse generator, a low-voltage power supply and a load inductor L_loadThe high-voltage power supply comprises an upper tube, a lower tube, a high-voltage power supply, an RCD integrating circuit, a reset circuit and a comparison and logic turn-off circuit. Fig. 7 is a schematic diagram of fig. 6, and table 4 shows the correspondence relationship between the elements in the two diagrams. Wherein the high voltage power supply V_DCA half-bridge circuit is formed by an upper tube and a lower tube (an upper SiC MOSFET and a lower SiC MOSFET) for supplying power, and the upper tube is connected with a load inductor L in parallel_loadParasitic inductance L in series between the Kelvin source and the power source of the lower tube_SsThe RCD integrating circuit, the reset circuit, the comparison and logic turn-off circuit form a short-circuit protection circuit PCB according to the connection mode of figure 3, the short-circuit protection circuit PCB is provided with three power interfaces, an RCD integrating positive interface, an RCD integrating negative interface and a protection turn-off interface, wherein the three power interfaces are respectively connected with +15V, 0V and-5V voltage provided by a low-voltage power supply, and in addition, the RCD integrating negative interface and the protection turn-off interfaceThe positive distribution interface ①, the RCD integral negative interface ② and the protection turn-off interface ③ are respectively and correspondingly connected with a Kelvin source electrode, a power source electrode and a driving pulse V of a lower tube_gs(ii) a The oscilloscope is not shown in fig. 7, and the recorded waveform data are: drain-source current i of lower tube_DSOutput voltage V of integrating capacitor of RCD integrating circuit_oTurn-off MOSFET M in a compare and logic turn-off circuit_soGate voltage V of_{GS_MOFF}；

The lower tube is a wide bandgap semiconductor SiC MOSFET to be protected, and the upper tube is a SiC MOSFET with rated current value larger than that of the lower tube;

the pulse generator is used for generating control pulses of the upper tube and the lower tube (the pulse generator function can be realized by a DSP, a pulse generation analog circuit and other devices), and the pulses generate driving pulses V through a driving circuit_gs0、V_gs. The upper and lower tubes in the driving circuit are respectively provided with a grid resistor and are respectively connected with a grid resistor R_g0、R_g. FIG. 7 simplifies the pulse generator and drive circuit of FIG. 6 to V_gs0、R_g0、V_gsAnd R_gUsed for controlling the opening and closing of the upper and lower tubes. The specific structure of the driving circuit is the prior art, and is not described herein again.

The experiment simulates FUL fault of a lower tube (protected SiC MOSFET) and completes performance test of di/dt-RCD detection, and the test method and key parameters are set as follows:

first, the low voltage power supply supplies power to operate the low voltage circuit portion (both the driver and short circuit protection circuit PCB portions) of the device. The pulses of the pulse generator of fig. 6 and the voltage of the drive circuit are set according to the pulse sequence of fig. 8, so that the upper and lower tubes of fig. 6 are switched on and off according to the pulse sequence of fig. 8. In fig. 8, the time intervals of the pulses are set as shown in table 5, and the voltages of the pulses are set as shown in fig. 8.

TABLE 5

t1_1-t1_2	t1_2-t1_3	t1_3-t1_4	t1_4-t1_5
				20us	5us	1us	2us

It should be noted that the time interval in the experiment is not exactly consistent with that in table 5, but the experimental error does not affect the test result of the short-circuit protection.

Setting the high voltage power supply V in FIG. 6_DCThe output is 300V, and the load inductance is 200 uH. Pressing the trigger button of the pulse generator will turn the upper and lower tubes on and off according to the pulse sequence of fig. 8. Specifically, the method comprises the following steps:

at t_{1_1}To t_{1_2}In time period, the lower tube is in an open state, the high-voltage power supply and the load inductor L_loadAnd the lower tube forms a passageway. Current i flowing through the path_loadStarts to increase from zero, and makes the path current i_loadA rated current value t of the lower tube is reached_{1_1}-t_{1_2}The duration is set to about 20 us.

This is at t_{1_2}To t_{1_3}Time interval, the lower tube is in a closed state, and the load inductance L_loadOn the path current i_loadFreewheeling through the body diode of the upper tube, the current magnitude being maintained substantially at t_{1_2}The size of the time of day. t is t_{1_2}To t_{1_3}The time interval being such that the lower duct is completely switched off and then switched on, so that t_{1_2}-t_{1_3}The time interval is greater than 1 us.

At t_{1_3}At the moment, the lower tube is opened again, and the high-voltage power supply and the load inductor L are connected_loadAnd the lower tube forms a path again, the current i of the path_loadFrom t_{1_2}The magnitude of the current continues to increase. At t_{1_4}At the moment, the upper pipe is opened, which corresponds to the opening of the lower pipe (t)_{1_3}Time) after the low tube is suddenly short-circuited, i.e. the occurrence of the full short-circuit fault in the low tube is simulated. t is t_{1_3}To t_{1_4}The time interval being such that the upper tube is opened again after the lower tube has been completely opened, so that t_{1_3}To t_{1_4}The time interval is greater than 1 us.

The rated current value of the selected upper tube is larger than that of the lower tube, and the upper tube is turned on fast enough, so that the SiC MOSFET with larger rated current is selected as the upper tube. To avoid damage to the SiC MOSFET due to short-circuit protection circuit malfunction, at t_{1_5}The upper and lower tubes are closed at the same time. t is t_{1_4}To t_{1_5}The time interval is set to 2us, which both verifies the effect of the protection circuit and ensures that the device is not damaged.

In addition to the experimental methods described above, there are also parameters and calculations. First, all device parameters in the short-circuit protection circuit PCB have been listed in table 1, table 2, table 3. Second, the rated operating current of the SiC MOSFET for the short circuit test was 30A. Finally, according to equation (2), the integrating capacitor outputs a voltage V_oAnd drain-source current i_DSIs 1/47, the comparator U1 threshold voltage V is set here_(th)Set to-1.8V, corresponding to a threshold current of 84.6A (1.8 × 47).

After the DPT experiment platform is used for completing the di/dt-RCD detection protection test under the FUL fault, the di/dt-RCD detection protection test under the FUL fault needs to be carried out as comparison verification.

The realization method comprises the following steps: on the basis of the DPT experimental platform, a blocking diode D of an RCD circuit in the DPT experimental platform is used_blo(D_bloThe specific position is shown in figure 3) by short circuit at two ends. The reset circuit is not removed because it does not affect the di/dt-RC detection protection effect.

Oscillographic waveforms and test methods are identical to the di/dt-RCD test.

The experimental results are as follows:

the short-circuit protection test results in the case of FUL are shown in FIG. 9, where (a) and (b) are the test results of the proposed di/dt-RCD test and di/dt-RC test, respectively. For ease of viewing, the waveform of FIG. 9 only intercepts the second pulse (t in FIG. 8)_{1_3}To t_{1_5}Time period) and subdividing it into t₁、t₂、t₃、t₄、t₅And t₆These six time nodes.

In fig. 9: time t₁-t₂Is the rising process of the second pulse in DPT (SiC MOSFET on). At t₃Time of day (corresponding to t in FIG. 8)_{1_4}Moment), the upper pipe of the DPT experiment platform is opened, and the FUL fault is simulated. At t₄At the moment, the integrating capacitor outputs a voltage V_oThreshold voltage V to short-circuit protection setting_(th). In the experiment, the threshold voltage V of the short-circuit protection_(th)is-1.8V. According to equation (2), -1.8V corresponds to a threshold current of 84.6A (1.8 × 47). t is t₅At the moment of turning off the MOSFET M_SO(signal level MOSFET for controlling SiC MOSFET in short-circuit protection) gate voltage V_{GS_MOFF}The moment of starting to rise. Time t₄To t₅About 16ns, which is the logic delay time. At t₆While, the MOSFET M is turned off_SOHas been turned on and then the SiC MOSFET is turned off. The data of the protection effect of the two are shown in Table 6.

TABLE 6 comparison of RC and RCD integral circuit protection effects

Integrating circuit	Theoretical threshold current	Actual threshold current	Detecting errors	Short circuit limiting current	Total guard time
						RC	84.6A	128A	51.3％	150A	110ns
RCD	84.6A	90A	6.4％	132A	60ns

It can be seen that the proposed RCD integrator circuit can reduce the detection error by 44.9% in case of a full fault, compared to the RC integrator circuit, and protect the time (t in fig. 9)₃-t₆) Decreasing by 50 ns.

Furthermore, it should be noted that in order to enable the di/dt-RC detection to perform the short circuit protection function, the threshold current set during the entire experiment (including the di/dt-RC detection and the di/dt-RCD detection short circuit protection test experiment) is slightly less than three times the rated current. The inventive di/dt-RCD detection (with small detection error) can set the threshold current for short-circuit protection to four times the rated current. The larger threshold current reduces the transient source-drain current i of the switch of the SiC MOSFET to the maximum extent_DSThe oscillations pose a risk of false protection.

Nothing in this specification is said to apply to the prior art.

Claims (10)

1. A short-circuit protection structure for a wide bandgap semiconductor SiC MOSFET comprises a comparison and logic turn-off circuit, and is characterized by further comprising an RCD integrating circuit and a reset circuit,

the RCD integrating circuit comprises an integrating capacitor C_fIntegrating resistor R_fBlocking diode D_bloEarth resistance R_groGround resistance R_groConnected in parallel to a blocking diode D_bloTwo-terminal, blocking diode D_bloThe positive terminal of the positive electrode is connected with an integrating resistor R in sequence_fIntegrating capacitor C_f(ii) a Integrating capacitor C_fIs grounded at the other end V_sIntegral capacitance C_fThe ground terminal of the blocking diode is connected with the Kelvin source electrode of the SiC MOSFET_bloThe negative electrode end of the SiC MOSFET is connected with the power source electrode of the SiC MOSFET; output end of RCD integrating circuit is from integrating capacitor C_fAnd an integrating resistor R_fThe output end of the comparator is respectively connected into the comparison and logic turn-off circuit and the reset circuit;

the reset circuit is used for outputting the voltage V of the integrating capacitor when the SiC MOSFET is switched off_oAnd the voltage is reduced to zero, so that the function of forcibly resetting the integral capacitor is realized.

2. The short-circuit protection structure according to claim 1, wherein the ground resistance R_gro20-50k omega, blocking diode D_bloThe Schottky diode with reduced on-state voltage, small reverse recovery current and high switching speed is preferably ground resistor R_groIs 30k omega.

3. The short-circuit protection structure of claim 1, wherein the reset circuit comprises a comparator U2, a positive input terminal of the comparator U2 is connected to a resistor R₃And a resistance R₄At the junction of (3), resistance R₃The other end is connected with a-5V power supply and a resistor R₄The other end is connected with a +15V power supply; operating voltage V of comparator U2_(comp)Ensuring that the voltage is less than the turn-on voltage of the protected SiC MOSFET; the negative input terminal of the comparator U2 passes through the resistor R₅Connected to the drive pulse V_gsAnd a gate resistance R_gWhile the negative input of the comparator U2 passes through the resistor R₆Grounding V_s(ii) a The comparator U2 is powered by-5V and + 15V;

the output end of the comparator U2 passes through a reset capacitor C_REAre respectively connected with reset resistors R_REOne terminal of, reset MOSFET M_resetThe gate of (1), the reset resistor R_REIs connected at the other end to a reset MOSFET M_resetIs connected to ground V_s(ii) a Reset MOSFET M_resetIs connected to the output of the RCD integration circuit, i.e. the integration capacitor C_fAnd an integrating resistor R_fIn the meantime.

4. The short-circuit protection structure of claim 3, wherein the resistor R₃Is 1k omega, resistance R₄Is 3k omega, the comparator U2 acts on the voltage V_(comp)Is 0V, C_REIs 100pF, R_REAnd is 250 omega.

5. The short-circuit protection architecture of claim 1, wherein the circuitry of the compare and logic shutdown circuit is configured to: integrating capacitor output voltage V_oIs connected to the positive input terminal of a comparator U1, and the negative input terminal of a comparator U1 is connected to a resistor R₁And a resistance R₂The connection point of (a); resistance R₁The other end is connected to-5V, a resistor R₂The other end is connected to the ground V_s(0V)；

The output of comparator U1 is connected to the 2S 'terminal of SR latch U3, and the 2R' terminal of SR latch U3 is connected to ground V_sA terminal; 2Q end connecting resistor R of SR latch U3₇Resistance R₇The other end is connected with and disconnected with the MOSFET M_soGate of turn-off MOSFET M_soIs a small MOSFET of a signal level, the turn-off MOSFET M_soAnd the GND terminal of SR latch U3 are both connected to-5V; when the 2Q output of SR latch U3 is positive, indicating that short-circuit protection is triggered, the 2Q of SR latch U3 turns off MOSFET M_soOpening; turn-off MOSFET M_soDrain electrode of (3) is connected to the turn-off resistor R_soOff resistance R_soIs connected to the drive pulse V at the other end_gsAnd a gate resistance R_gThe joint of (a); turn-off MOSFET M_soDrive pulse V of handle after opening_gsBy turning off the resistor R_soAnd turn off MOSFET M_soThe drain source of (a) is connected to-5V.

6. The short-circuit protection structure of claim 5, wherein the resistor R₁3.2k omega, resistance R₂1.8k omega, the threshold voltage V of the comparator U1_(th)is-1.8V.

7. A short-circuit protection method for a wide bandgap semiconductor SiC MOSFET, the method employing the short-circuit protection structure of any one of claims 1 to 6, wherein the RCD integration circuit is used for accurately measuring the short-circuit drain-source current i of the SiC MOSFET_DSWhen the drain-source current i_DSWhen the short-circuit current is larger than the set short-circuit current action value, the voltage signal output by the RCD integrating circuit enables the comparison and logic turn-off circuit to act to turn off the SiC MOSFET; whether the switch-off is in short circuit or normal state, the reset circuit is responsible for outputting voltage V to the integrating capacitor in the RCD integrating circuit after the SiC MOSFET is switched off every time_oTo 0V.

8. Short-circuit protection method according to claim 7,

when the device is normally switched on and transient or short-circuited, the RCD integrating circuit plays a role in converting the parasitic inductance voltage V_SsThe signal is integrated, and the output of the integration result is the output voltage V of the integrating capacitor_o；

During the period of time after the normal turn-on transient of the protected SiC MOSFET but not until the turn-off time, when the integrating capacitor outputs the voltage V_oOn release, the diode D is blocked_bloIn a blocking state and a ground resistance R_groIs set to a large resistance, so that the integrating capacitor outputs a voltage V_oCan not be released; if the short circuit occurs in the time period, the integrating capacitor outputs a voltage V_oWill increase from normal size, can reflect normal short circuit current size, make the comparison and logic of the back side turn off accurate recognitionThe short circuit fault is eliminated, so that the device can be effectively protected;

threshold voltage V on negative terminal of comparator U1 in comparison and logic shutdown circuit_(th)Through a ground resistor R_groAnd a differential resistor R_difForm loop current to prevent integrating capacitor C_fQuilt V_(th)Mis-charging, resulting in an output voltage V_oThe occurrence of a false raise condition;

when driving pulse V_gsWhen the voltage is less than 0V, the SiC MOSFET is turned off, the negative input end of a comparator U2 in the reset circuit is also less than 0V, and the output potential of the comparator U2 is inverted from-5V to +15V until a driving pulse V_gsWhen the voltage is larger than 0V again, the SiC MOSFET is started again; reset capacitor C in reset circuit_REReset resistor R_REThe step signal which is output by the comparator U2 and is inverted from-5V to +15V is converted into a reset pulse time t_resetMagnitude of single pulse signal at reset resistor R_RETwo-terminal output, reset pulse time t_resetCalculated according to the formula (3);

reset resistor R_REConnected to the reset MOSFET M_resetAt the reset pulse time t_resetReset MOSFET M in time_resetIn the on state, the voltage V of the integrating capacitor is generated_oAnd forcibly reducing the temperature to zero.

9. A double-pulse experiment (DPT) platform integrating di/dt-RCD detection comprises an oscilloscope, a pulse generator, a low-voltage power supply and a load inductor L_loadThe experimental platform also comprises an upper tube, a lower tube, an RCD integrating circuit, a reset circuit, a comparison and logic turn-off circuit, a driving circuit and a half-bridge circuit consisting of the upper tube and the lower tube; high voltage power supply V_DCSupplying power to the half-bridge circuit, connecting a load inductor L in parallel with the upper tube_loadParasitic inductance L in series between the Kelvin source and the power source of the lower tube_SsRCD integrating circuitThe reset circuit, the comparison and logic turn-off circuit form a short-circuit protection circuit PCB by adopting the structure of any one of claims 1 to 6, the short-circuit protection circuit PCB is provided with three power interfaces, an RCD integral positive interface, an RCD integral negative interface and a protection turn-off interface, the three power interfaces are respectively connected with +15V, 0V and-5V voltage interfaces provided by a low-voltage power supply, and the RCD integral positive interface, the RCD integral negative interface and the protection turn-off interface are respectively and correspondingly connected with a Kelvin source electrode, a power source electrode and a driving pulse V of a lower tube_gs(ii) a The oscillograph obtains the recorded waveform data as follows: drain-source current i of lower tube_DSOutput voltage V of integrating capacitor of RCD integrating circuit_oTurn-off MOSFET M in a compare and logic turn-off circuit_soGate voltage V of_{GS_MOFF}；

The lower tube is a wide bandgap semiconductor SiC MOSFET to be protected, and the upper tube is a SiC MOSFET with rated current value larger than that of the lower tube;

the pulse generator is used for generating control pulses of the upper tube and the lower tube, and the pulses generate driving pulses V through the driving circuit_gs0、V_gsThe driving circuit is provided with a grid resistor corresponding to the upper and lower tubes, and the upper and lower tubes are respectively connected with a grid resistor R_g0、R_g，V_gs0、R_g0、V_gsAnd R_gUsed for controlling the on and off of the upper and lower tubes.

10. Use of the DPT experimental platform of claim 9 to perform a protection test method for di/dt-RCD detection under FUL failure, the steps of the test method being:

firstly, a low-voltage power supply supplies power to enable a low-voltage part of the device to operate; setting the pulse of the pulse generator and the voltage of the driving circuit, so that the upper tube and the lower tube are switched on and off according to the set pulse sequence;

setting a high voltage supply V_DCThe output is 300V, the load inductance is 200uH, a trigger button of the pulse generator is pressed, the upper tube and the lower tube can be switched on and off according to a set pulse sequence, and specifically:

at t_{1_1}To t_{1_2}Time period, low tube is in open state, high voltageSource and load inductance L_loadAnd a lower tube forming a path through which a path current i flows_loadStarts to increase from zero, and makes the path current i_loadWhen the rated current value of the lower tube is reached, the grid leakage voltage of the lower tube in the time period is always 15V;

at t_{1_2}To t_{1_3}Time period, the lower tube is in a closed state, and the load inductance L_loadOn the path current i_loadFreewheeling through the body diode of the upper tube, the current magnitude being maintained substantially at t_{1_2}The time is such that the lower tube is completely closed and at t_{1_3}Starting the circuit all the time, wherein the drain voltage of the lower tube grid in the time period is always-5V;

at t_{1_3}To t_{1_4}In the time period, the lower tube is opened again and kept in the opening state, and the high-voltage power supply and the load inductor L_loadAnd the lower tube forms a path again, the current i of the path_loadFrom t_{1_2}The current magnitude continues to increase; at t_{1_4}At that moment, the upper pipe is opened and the lower pipe continues to remain open, which corresponds to t_{1_3}The lower pipe is suddenly short-circuited after being opened at any moment, namely FUL short-circuit fault of the lower pipe is simulated, and t_{1_3}To t_{1_4}The time interval is used for opening the upper pipe after the lower pipe is completely opened; t is t_{1_3}To t_{1_4}The gate-drain voltage of the lower tube in the time period is 15V, t_{1_1}To t_{1_4}The gate leakage voltage of the transistor on the time segment is-5V, t_{1_4}The gate-drain voltage of the lower tube is kept at 15V and the gate-drain voltage of the upper tube is changed to 15V at the moment;

t_{1_4}to t_{1_5}Time period for performing protection circuit test, at t_{1_5}And closing the upper pipe and the lower pipe at the same time, and finishing the test.

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