CN111562456A - Relay protection enhancement type state sequence and relay protection test method and system - Google Patents

Relay protection enhancement type state sequence and relay protection test method and system Download PDF

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Publication number
CN111562456A
CN111562456A CN202010365121.1A CN202010365121A CN111562456A CN 111562456 A CN111562456 A CN 111562456A CN 202010365121 A CN202010365121 A CN 202010365121A CN 111562456 A CN111562456 A CN 111562456A
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state
relay protection
sequence
group
entering
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Inventor
何磊
赵宇皓
臧谦
王献志
张卫明
陈天英
严敬汝
周雪青
任波
冯自权
姜丽娟
卓露
朱江
毕玥
尹健
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Wuhan Zhongyuan Huadian Electric Power Equipment Co ltd
State Grid Corp of China SGCC
Electric Power Research Institute of State Grid Hebei Electric Power Co Ltd
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Wuhan Zhongyuan Huadian Electric Power Equipment Co ltd
State Grid Corp of China SGCC
Electric Power Research Institute of State Grid Hebei Electric Power Co Ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions

Abstract

The invention discloses a relay protection enhancement type state sequence and a relay protection test method and system, wherein the relay protection enhancement type state sequence comprises a series of continuous states, each state comprises an attribute stateID which is a unique identification number of the state, the state is integer, each relay protection test always starts from 1, 1 is sequentially increased for a plurality of continuous states, and each state comprises a plurality of setting elements. According to the invention, various special test functions can be constructed based on the enhanced state sequence, and meanwhile, a user only needs to perform secondary development facing the enhanced state sequence, so that the developed relay protection test method can greatly simplify a development interface and reduce development time.

Description

Relay protection enhancement type state sequence and relay protection test method and system
Technical Field
The invention relates to the field of relay protection tests, in particular to a relay protection enhanced state sequence and a relay protection test method and system based on the enhanced state sequence.
Background
The existing relay protection test device provides rich and various test functions and can complete the tests of various relay protection related functions and performances. However, because of the variety of test functions and the different implementation modes of different manufacturers, the test devices of different manufacturers cannot be interchanged, and the control needs to be performed by using corresponding special software, so that the universal test device is not universal. Therefore, when secondary development is performed on the basis of the relay protection test device, only the matched interface specification is used, and interfaces with various test functions need to be called correctly, so that the problems of long development period and poor transportability are caused.
Disclosure of Invention
The invention aims to provide a method and a system which can construct various special test functions, simultaneously, a user can directly carry out secondary development to carry out a relay protection experiment, a development interface can be greatly simplified, and the development time is reduced.
The technical scheme adopted by the invention for achieving the purpose is as follows:
providing a relay protection enhancement type state sequence, which comprises a series of continuous states, wherein each state comprises an attribute stateID, is a unique identification number of the state, is integer, always starts from 1 in each relay protection test, and sequentially increments by 1 for a plurality of continuous states, and each state comprises the following elements:
(1) SampledValue: the sampling value output is 1 to a plurality, each sampling value is formed by superposing 1 to a plurality of steady-state components and at most 1 attenuation direct-current component, wherein the sampling value is an analog quantity and is output to the tested relay protection device;
(2) KO: an opening amount of 1 to a plurality, each opening amount having a value of only 1 or 0;
(3) stateEnd: the number of the state ending conditions is only 1, and the state is ended after the conditions are met;
(4) jumpID: a maximum of 1 skip state ID; jumpID is used for designating a state, if the element does not exist, the state jumps to the next adjacent state or the test is finished, and if the element exists, the state jumps to the state designated by the jumpID or the test is finished after the end of the state caused by the designated reason;
(5) groupID: group status ID, up to 1; the groupID is used for designating a state, and the states from the state to the state designated by the groupID form a group state, and each internal state is called as a sub-state of the group state;
(6) group pEnd: group status end conditions, at most 1; and after the condition is met, the group state of the state is ended, the state and the rest states in the group are not continuously executed, and the next state adjacent to the state specified by the groupID is jumped to or the test is ended.
According to the technical scheme, the group state is free of nesting.
According to the technical scheme, the child state in the group state has no jumpID element.
According to the technical scheme, the stateEnd and the group include duration, the input volume turning and manual triggering, wherein the duration refers to that the state is finished after the state lasts for the duration, the input volume turning refers to that the state is finished after any or all of the specified input volumes are turned in the execution process of the state, and the manual triggering refers to that the state is finished after receiving a command sent by a user through an input interface of a keyboard and a touch screen.
Following the above technical solution, each steady-state component of SampledValue contains the following attributes: amplitude, phase angle, frequency, amplitude slip rate, phase angle slip rate, and frequency slip rate; the real-time waveform expression of the steady-state component is
Figure BDA0002476477200000021
Wherein A is amplitude, theta is phase angle, f is frequency,
Figure BDA0002476477200000022
in order for the amplitude to be a slip rate,
Figure BDA0002476477200000023
for the phase angle slip rate to be,
Figure BDA0002476477200000024
to the frequency slip rate, t is the current trial time.
In connection with the above technical solution, the real-time waveform expression of the attenuated DC component of SampledValue is
Figure BDA0002476477200000025
Wherein, SVF.iSampled values of the start time of the state, SVN.eIs the sample value of the last state ending time, tau is the time constant of the decaying DC component, t0Is the starting time of the state.
In the above technical solution, the SampledValue in the 1 st state does not include an attenuated dc component.
The relay protection test method based on the enhanced state sequence comprises the following steps:
the method comprises the following steps: setting the test starting time to be 0, and pointing the current state to the 1 st state of a preset relay protection enhancement type state sequence; the preset relay protection enhancement type state sequence is the relay protection enhancement type state sequence of the technical scheme;
step two: calculating the voltage, the current and the switching value of the relay protector at the moment and outputting the voltage, the current and the switching value to a tested relay protector, wherein the values are analog values;
step three: incrementing a specified time interval;
step four: if the current state is the sub-state, entering the step five, otherwise entering the step six;
step five: checking whether a group state ending condition is met, if so, entering a step ten, and otherwise, entering a step six;
step six: checking whether a state ending condition is met, if so, entering a seventh step, and if not, entering a second step;
step seven: if the element jumpID is not empty and the current state is finished due to the specified reason, entering the step eleven, and otherwise, entering the step eight;
step eight: the current state ID is incremented by 1;
step nine: checking whether the current state ID exists, if so, entering a second step, otherwise, ending the test;
step ten: the current state points to the next state adjacent to the state pointed by the groupID, and the step eight is entered;
step eleven: the current state points to the jumpID pointed state, and the step eight is entered;
the invention also provides a system for carrying out the relay protection test by utilizing the enhanced state sequence, and the system executes the relay protection test method based on the enhanced state sequence in the technical scheme.
The invention also provides a computer storage medium, in which a computer program executable by a processor is stored, and the computer program executes the relay protection test method based on the enhanced state sequence in the technical scheme.
The invention has the following beneficial effects: the invention discloses an enhanced state sequence of a relay protection test and a test method, various special test functions can be constructed based on the enhanced state sequence, meanwhile, a user only needs to carry out secondary development facing the enhanced state sequence, and the developed relay protection test method can greatly simplify a development interface and reduce development time.
Drawings
The invention will be further described with reference to the accompanying drawings and examples, in which:
FIG. 1 is a state diagram of an embodiment of the present invention;
FIG. 2 is a diagram of a sample value output structure according to an embodiment of the present invention;
FIG. 3 is a diagram of a state ending condition structure according to an embodiment of the present invention;
FIG. 4 is a flow chart of an enhanced status sequence based test method according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a state sequence for implementing manual testing according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a state sequence for implementing a full set of experiments according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of a sequence of states for implementing a step change test according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of a slip variation test procedure according to an embodiment of the present invention;
FIG. 9 is a schematic diagram of a state sequence for implementing a slip variation test according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The enhanced state sequence of the embodiment of the present invention is composed of a plurality of consecutive states (consecutive states refer to that each state ends and the next state is executed immediately, and the process specifically includes which states are related to the test to be performed, such as the tests illustrated in fig. 5 to 9), and the structure of each state is as shown in fig. 1, and includes an attribute stateID, which is a unique identification number of the state, and is integer, starting from 1, and the number of consecutive states should be sequentially incremented by 1. Meanwhile, each state contains the following elements:
(1)SampledValue
the sampling value output can be 1 to multiple, and each SampledValue contains the attributes name and inst. name is the name of the sampling value output, and the value can be Vol or Cur which respectively represents voltage and current; inst is the identifier of the output of the sampling value, and when there are a plurality of voltages or currents, the identifier starts from 1. The general relay protection test device comprises a processor, a memory, an input/output interface, a display and the like, wherein the output of the relay protection test device is connected with the input of the relay protection device, a sampling value is an analog quantity and is output to the tested relay protection device, and the final physical output form of the sampling value comprises an analog quantity and a digital quantity.
The structure of each sampling value output is shown in fig. 2, and the real-time waveform is the superposition of each component element from 1 to a plurality of Steady-state component elements Steady and at most 1 attenuated direct-current component element Transient.
The real-time waveform expression for each steady-state component of SampledValue is:
Figure BDA0002476477200000055
wherein A is amplitude, theta is phase angle, f is frequency,
Figure BDA0002476477200000051
in order for the amplitude to be a slip rate,
Figure BDA0002476477200000052
for the phase angle slip rate to be,
Figure BDA0002476477200000053
to the frequency slip rate, t is the current trial time.
The decaying dc component of SampledValue contains an attribute d, which is the time constant of the decaying dc component. The real-time waveform expression of the attenuated DC component is
Figure BDA0002476477200000054
Wherein, SVF.iSampled values of the start time of the state, SVN.eIs the sample value of the last state end time, d is the time constant of the decaying DC component, t0Is the starting time of the state.
Preferably, SampledValue of state 1 contains no attenuated dc component.
(2)KO
The output amounts, 1 to a plurality, each of which contains attributes inst and value. Inst is the mark of the opening quantity, and when a plurality of opening quantities exist, the mark is started from 1; value is the value of the output amount, and can be only 1 or 0.
(3)stateEnd
The number of the state ending conditions is only 1, and the state is ended after the conditions are met, wherein the state ending conditions comprise attribute type and timeout. the type is a type of a state ending condition, and the value of the type can be duration, input amount turning or manual triggering, wherein the duration refers to ending after the state lasts for the time, the input amount turning refers to ending after any or all of specified input amounts are turned in the executing process of the state, and the manual triggering refers to ending after receiving a command sent by a user through an input interface such as a keyboard, a touch screen and the like; when the type of the state ending condition is input amount overturning or manual triggering, the state is ended even if the state ending condition is not met after the state is continued.
When the attribute type is the input volume roll-over, stateEnd contains 1 input volume logical element Logic, and 1 to a plurality of input volume elements KI participating in the Logic, and the structure is shown in fig. 3.
Logic includes an attribute value, whose value can be a logical and or a logical or; KI contains an attribute inst indicating the identity of the amount of the opening to participate in the logical operation. The logical AND means that all the input quantities participating in the logical operation are turned over during the execution period of the state, and the state is ended; the logical OR means that any input quantity participating in the logical operation is inverted during the execution of the state, and the state is ended.
(4)jumpID
The jump status ID, a maximum of 1, contains an attribute value. If there is no such element, then the state is terminated and a jump is made to the next adjacent state (if any) or the trial is terminated; if the element exists, the current state triggered by the input volume jumps to the state pointed by the attribute value of the element or the test ends, and the current state triggered by other reasons jumps to the next adjacent state (if the current state exists) or the test ends.
Preferably, when the attribute value of jumpID is larger than the stateID of the present state but not larger than the stateID of the last state, the jump is made to the pointed state.
Preferably, the test ends when the attribute value of jumpID is greater than the stateID of the last state.
(5)groupID
A group state ID, which is at most 1, includes an attribute value, and the state specified by the attribute value from the present state (including the present state) to the element constitutes a group state, and each internal state thereof is referred to as a child state of the group state;
preferably, the group state does not allow nesting.
Preferably, sub-states within the group state are not allowed to have jumpID.
(6)groupEnd
And the group state ending condition has the same structure as the stateEnd, the group state of the current state is ended after the condition is met, the current state and the rest states in the group are not continuously executed, and the current state and the rest states in the group are jumped to the next state (if the next state exists) adjacent to the state specified by the attribute value of the groupID element or the test is ended.
Preferably, when groupID is present, groupEnd must be present, there being and only 1; when groupID is not present, groupEnd cannot be present either.
Taking an application based on a relay protection test device (including 4 voltage outputs, 3 current outputs, 4 switching values and 8 switching value inputs, wherein the 8 switching value inputs are outputs of a protection device to be tested and are used for monitoring the state, on or off, of the outputs of the protection device to be tested) meeting the DL/T860 standard as an example, the structure of the first XML-based state embodiment is described as follows:
Figure BDA0002476477200000071
Figure BDA0002476477200000081
Figure BDA0002476477200000091
in the state embodiment of the invention, 4 voltages, 3 currents and 4 opening quantities (mainly the quantities required by the relay protection device to be detected, namely the real-time state of a line, a transformer or a bus in an actual system) are output, each voltage and each current only comprise 1 steady-state component, and the real-time waveform is a sine wave. The amplitude of the 1 st voltage is 57.735V, the phase angle is 0 degrees, and the frequency is 50 Hz; the amplitude and frequency of the 2 nd to 4 th voltages are the same as the 1 st voltage, and the phase angles are-120 degrees, 120 degrees and 0 degree respectively; the amplitude of the 1 st current is 1A, the phase angle is-30 degrees, and the frequency is 50 Hz; the amplitude and frequency of the 2 nd to 4 th currents are the same as the 1 st current, and the phase angles are-120 degrees and 120 degrees respectively; the output quantities 1 and 2 output 0, and the output quantities 3 and 4 output 1; and the state ending condition is that the input amount is turned, the state limit is 1.0s, the state is ended if the input amounts A to H are all turned within 1.0s after the state is executed, otherwise, the state is ended after the state is executed for 1.0 s.
The first state embodiment of the invention uses all input/output interfaces of the relay protection testing device which meet the DL/T860 standard.
The second state embodiment of the present invention discloses a state capable of outputting harmonic waves, which has the following structure:
Figure BDA0002476477200000092
Figure BDA0002476477200000101
in the second embodiment of the present invention, the 1 st voltage includes not only the fundamental component of 50Hz, but also the second harmonic component of 100Hz and the third harmonic component of 150Hz, and also includes the attenuated dc component, and the attenuation time constant is 0.1 second; the state ending condition is that the input amount is reversed, the state limit is 1.0s, the state is ended if any one of the input amounts A, B, C is reversed within 1.0 second of state execution, otherwise, the state is ended after 1.0 second of state execution.
Meanwhile, the invention also discloses a test method based on the enhanced state sequence, as shown in fig. 4, the enhanced state sequence is executed by adopting the following scheme:
the method comprises the following steps: let the trial start time t be 0 and the current state ID be 1, i.e. point to the 1 st state;
step two: calculating and outputting voltage, current and switching value at the time t, wherein the values are subjected to analog calculation by a relay protection test device and are output to a tested relay protection device, and the values are not acquired externally;
step three: t is incremented by a specified time interval Δ t;
step four: if the current state is the sub-state, entering the step five, otherwise entering the step six;
step five: checking whether a group state ending condition is met, if so, entering a step ten, and otherwise, entering a step six;
step six: checking whether a state ending condition is met, if so, entering a seventh step, and if not, entering a second step;
step seven: if the element jumpID is not empty and the current state is finished due to the triggering of the input quantity, entering a step eleven, and otherwise, entering a step eight;
step eight: the current state ID is incremented by 1;
step nine: checking whether the current state ID exists, if so, entering a second step, otherwise, ending the test;
step ten: value +1, and entering step eight;
step eleven: value, step eight is entered.
The first embodiment of the state sequence of the present invention discloses a method for implementing manual trial, as shown in fig. 5, which is composed of a plurality of states whose end conditions are manually triggered. First the user constructs state 1 (i.e. stateID ═ 1) and starts the test, then the user constructs state 2 and manually triggers, then state 1 ends and state 2 is entered. By analogy, the user can continuously modify the sampling value output and the export quantity manually.
The second embodiment of the state sequence of the present invention discloses a method for implementing the entire set of experiments, as shown in FIG. 6. The whole set of tests the performance of the protection device by simulating a fault process, wherein a complete fault process comprises normal- > fault- > trip- > coincidence, and the states are respectively corresponding to a state 1 to a state 4. The state 1 outputs normal voltage and current, and the DUT (Device Under Test) is reliably reset after the normal voltage and current lasts for 16 s; the state 2 outputs fault voltage and current and ends when the input quantities A-C (split-phase tripping signals output by the DUT) are all turned over; a state 3 outputs rated voltage zero current and ends when the input quantity D (a closing signal output by the DUT) overturns; the state 4 outputs normal voltage current (simulating instantaneous fault) or fault voltage current (simulating permanent fault), and ends when the input quantities A-C (split-phase trip signals output by the DUT) all turn over. Meanwhile, in order to prevent the DUT from continuing to run and failing to finish the test due to non-response, the states 2 to 4 form a group state, the duration is 5 seconds, namely, the test is run for 5.0 seconds at most from entering the fault (state 2).
The third embodiment of the state sequence of the present invention discloses a method for implementing the step change test, as shown in fig. 7. In the step change test, the sampling value output starts from a state 1, a fixed increment is added every 1.0 second, the sampling value output changes to a state 4, in the change process, when the input quantity A of a certain state is turned over, the sampling value output value of the state is called an action value, the state is changed to a state 7 after the state is ended, the fixed increment is reduced every 1.0 second, in the change process, when the input quantity A of the certain state is turned over, the sampling value output value of the state is called a return value, and the test is ended after the state is ended.
The fourth embodiment of the state sequence of the present invention discloses a method for the slip variation test. The slip variation test procedure is shown in fig. 8, where the sampling value output starts from an initial value, changes to a final value at a fixed rate after a period of time, and continues for a period of time. Corresponding state sequence example four as shown in fig. 9, the 1 st voltage output frequency in state 1 is 50Hz for 1.0 second, then decreases by 5.0 seconds to 45Hz at a rate of 1.0Hz/s in state 2, and finally remains at 45Hz for 1.0s in state 3. The state sequence embodiment four can be used for testing the low-voltage fixed value and the frequency slip locking value of the low-frequency load shedding device.
The invention also provides a system for performing the relay protection test by using the enhanced state sequence, and the system executes the relay protection test method based on the enhanced state sequence.
The invention also provides a computer storage medium, in which a computer program executable by a processor is stored, and the computer program executes the relay protection test method based on the enhanced state sequence of the embodiment.
It will be understood that modifications and variations can be made by persons skilled in the art in light of the above teachings and all such modifications and variations are intended to be included within the scope of the invention as defined in the appended claims.

Claims (10)

1. A relay protection enhancement state sequence, wherein the sequence comprises a series of continuous states, each state comprises an attribute stateID, is a unique identification number of the state, is integer, always starts from 1 in each relay protection test, and sequentially increments by 1 for a plurality of continuous states, and each state comprises the following elements:
(1) SampledValue: the sampling value output is 1 to a plurality, each sampling value is formed by superposing 1 to a plurality of steady-state components and at most 1 attenuation direct-current component, wherein the sampling value is an analog quantity and is output to the tested relay protection device;
(2) KO: an opening amount of 1 to a plurality, each opening amount having a value of only 1 or 0;
(3) stateEnd: the number of the state ending conditions is only 1, and the state is ended after the conditions are met;
(4) jumpID: a maximum of 1 skip state ID; jumpID is used for designating a state, if the element does not exist, the state jumps to the next adjacent state or the test is finished, and if the element exists, the state jumps to the state designated by the jumpID or the test is finished after the end of the state caused by the designated reason;
(5) groupID: group status ID, up to 1; the groupID is used for designating a state, and the states from the state to the state designated by the groupID form a group state, and each internal state is called as a sub-state of the group state;
(6) group pEnd: group status end conditions, at most 1; and after the condition is met, the group state of the state is ended, the state and the rest states in the group are not continuously executed, and the next state adjacent to the state specified by the groupID is jumped to or the test is ended.
2. The relay protection enhancement mode state sequence of claim 1, wherein there is no nesting within a group state.
3. The relay protection enhanced state sequence of claim 1, wherein sub-states within a group state are free of jumpID elements.
4. The relay protection enhancement state sequence according to claim 1, wherein the stateEnd and group End comprise a duration, an input turnover, and a manual trigger, the duration is the end after the state lasts for the duration, the input turnover is the end after any or all of the specified input is turned over during the execution of the state, and the manual trigger is the end after receiving a command sent by a user through an input interface of a keyboard or a touch screen.
5. The relay protection enhancement state sequence of claim 1, wherein each steady state component of SampledValue contains the following attributes: amplitude, phase angle, frequency, amplitude slip rate, phase angle slip rate, and frequency slip rate; the real-time waveform expression of the steady-state component is
Figure FDA0002476477190000021
Wherein A is amplitude, theta is phase angle, f is frequency,
Figure FDA0002476477190000022
in order for the amplitude to be a slip rate,
Figure FDA0002476477190000023
for the phase angle slip rate to be,
Figure FDA0002476477190000024
to the frequency slip rate, t is the current trial time.
6. The relay protection enhancement mode state sequence of claim 1, wherein the real-time waveform representation of the attenuated dc component of SampledValue is
Figure FDA0002476477190000025
Wherein, SVF.iSampled values of the start time of the state, SVN.eIs the sample value of the last state ending time, tau is the time constant of the decaying DC component, t0Is the starting time of the state.
7. The relay protection enhancement state sequence of claim 1, wherein SampledValue of state 1 does not contain an attenuated dc component.
8. A relay protection test method based on an enhanced state sequence is characterized by comprising the following steps:
the method comprises the following steps: setting the test starting time to be 0, and pointing the current state to the 1 st state of a preset relay protection enhancement type state sequence; the preset relay protection enhancement type state sequence is the relay protection enhancement type state sequence of any one of claims 1-7;
step two: calculating the voltage, the current and the switching value at the moment and outputting the values to a tested relay protection device, wherein the values are analog values;
step three: incrementing a specified time interval;
step four: if the current state is the sub-state, entering the step five, otherwise entering the step six;
step five: checking whether a group state ending condition is met, if so, entering a step ten, and otherwise, entering a step six;
step six: checking whether a state ending condition is met, if so, entering a seventh step, and if not, entering a second step;
step seven: if the element jumpID is not empty and the current state is finished due to the specified reason, entering the step eleven, and otherwise, entering the step eight;
step eight: the current state ID is incremented by 1;
step nine: checking whether the current state ID exists, if so, entering a second step, otherwise, ending the test;
step ten: the current state points to the next state adjacent to the state pointed by the groupID, and the step eight is entered;
step eleven: and the current state points to the state pointed by jumpID, and the step eight is entered.
9. A system for relay protection testing using an enhanced sequence of states, the system performing the method of claim 8.
10. A computer storage medium, in which a computer program executable by a processor is stored, the computer program performing the method according to claim 8.
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