CN111555914A - FPGA remote configuration method - Google Patents
FPGA remote configuration method Download PDFInfo
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- CN111555914A CN111555914A CN202010334388.4A CN202010334388A CN111555914A CN 111555914 A CN111555914 A CN 111555914A CN 202010334388 A CN202010334388 A CN 202010334388A CN 111555914 A CN111555914 A CN 111555914A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
- H04L41/0803—Configuration setting
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4411—Configuring for operating with peripheral devices; Loading of device drivers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
- H04L41/0803—Configuration setting
- H04L41/084—Configuration by using pre-existing information, e.g. using templates or copying from other elements
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
- H04L43/0823—Errors, e.g. transmission errors
- H04L43/0847—Transmission error
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Abstract
The invention relates to a FPGA remote configuration method, which sets the starting mode of an FPGA module as a PS mode; establishing communication connection between the Ethernet module and the Ethernet; the Ethernet module transmits the FPGA configuration data sent by the Ethernet to the singlechip module; the singlechip module downloads the received FPGA configuration data to the memory module; the single chip microcomputer module completes remote configuration of the FPGA module according to the FPGA configuration data stored in the memory module. By implementing the invention, the FPGA configuration data can not be lost when the FPGA module is reconfigured, and the remote configuration of the FPGA module can be realized.
Description
[ technical field ] A method for producing a semiconductor device
The invention relates to a remote configuration method of an FPGA (field programmable gate array).
[ background of the invention ]
An FPGA (Field Programmable Gate Array) device loses all logic relationships when powered down, and thus needs to be reconfigured after powered up. For SRAM-based LUT (SRAM), SRAM module, LUT: lookup TABLE), an SRAM unit is generally used to store FPGA configuration data, and due to the volatility of an SRAM memory, after the FPGA device is powered on each time, the FPGA configuration data needs to be reloaded into the SRAM unit to complete the reconfiguration of the FPGA device.
[ summary of the invention ]
The invention aims to overcome the defects of the technology and provide the FPGA remote configuration method, so that the FPGA configuration data can not be lost when the FPGA module is reconfigured, and the remote configuration of the FPGA module can be realized.
The invention provides a remote configuration method of an FPGA, which comprises the following steps:
setting the starting mode of the FPGA module to be a PS mode;
establishing communication connection between the Ethernet module and the Ethernet;
the Ethernet module transmits the FPGA configuration data sent by the Ethernet to the singlechip module;
the singlechip module downloads the received FPGA configuration data to the memory module;
the single chip microcomputer module completes remote configuration of the FPGA module according to the FPGA configuration data stored in the memory module.
Further, the FPGA configuration data includes a firmware file and a configuration file, the firmware file includes a plurality of segmented compressed firmware with sequential numbers, the configuration file includes a firmware version, a firmware CRC check value, a total packet number of the segmented compressed firmware, and a file address index table, and the file address index table includes a number, an original size, and a compressed size corresponding to each segmented compressed firmware.
Further, the memory module comprises a configuration area, a firmware operation area and a firmware cache area;
the step that the singlechip module downloads the received FPGA configuration data to the memory module comprises the following steps:
the single chip microcomputer module downloads the received firmware file to a firmware cache area;
the single chip microcomputer module downloads the received configuration file to the configuration area so as to form a cache configuration file.
Further, the step of the single chip microcomputer module completing the remote configuration of the FPGA module according to the FPGA configuration data stored in the memory module includes:
the single chip microcomputer module reads a firmware file of the firmware cache region;
the single chip microcomputer module decompresses the segmented compressed firmware files of the firmware files respectively according to a file address index table of the cache configuration file and verifies the compressed firmware files respectively according to a firmware CRC (cyclic redundancy check) value of the cache configuration file, if the verification is successful, the firmware files of the firmware cache area are copied to the firmware operation area so as to form an operation firmware file, and the cache configuration file of the configuration area is copied so as to form an operation configuration file;
the single chip microcomputer module decompresses the segmented compressed firmware files of the operating firmware files respectively according to the file address index table of the operating configuration files and verifies the segmented compressed firmware files respectively according to the CRC values of the firmware files of the operating configuration files, and if verification is successful, the decompressed segmented compressed firmware files are downloaded to the FPGA module in sequence according to the serial number sequence, so that remote configuration of the FPGA module is completed.
Furthermore, the single chip microcomputer module decompresses the segmented compressed firmware files of the operating firmware files respectively according to the file address index table of the operating configuration files and checks the compressed firmware files respectively according to the CRC values of the firmware files of the operating configuration files, and if the compressed firmware files are checked successfully, the single chip microcomputer module reports that the remote configuration of the Ethernet FPGA module is successful at the same time.
Furthermore, the memory module further comprises a firmware backup area, wherein the firmware backup area stores a complete backup firmware, and the configuration area stores a backup configuration file corresponding to the backup firmware;
the single chip microcomputer module decompresses the segmented compressed firmware of the operating firmware file according to a file address index table of the operating configuration file and verifies the segmented compressed firmware according to a firmware CRC (cyclic redundancy check) value of the operating configuration file, if the verification fails, the backup firmware of the firmware backup area is copied to the firmware operating area so as to form operating backup firmware, and the backup configuration file of the configuration area is copied so as to form operating backup configuration file;
the single chip microcomputer module downloads the running backup firmware to the FPGA module, and therefore remote configuration of the FPGA module is completed.
Furthermore, the running backup firmware is downloaded to the FPGA module by the singlechip module, and meanwhile, the remote configuration failure of the Ethernet FPGA module is reported.
Furthermore, the ethernet module is provided with a network port, and the network port is connected with the ethernet through a network cable, so as to establish the connection between the ethernet module and the ethernet.
According to the invention, the connection between the Ethernet module and the Ethernet is established, the FPGA configuration data can be obtained from the Ethernet, so that the remote configuration of the FPGA module can be realized, the FPGA configuration data is downloaded into the memory module through the singlechip module, the FPGA configuration data cannot be lost and can be permanently stored, and the configuration of the FPGA module is simple and reliable, and time and labor are saved.
[ description of the drawings ]
Fig. 1 is a schematic flowchart of a method for remotely configuring an FPGA according to an embodiment of the present invention;
fig. 2 is a block diagram illustrating connections between various modules in the method of fig. 1.
[ detailed description ] embodiments
The invention is further described below with reference to the figures and examples.
Referring to fig. 1 and fig. 2, the present invention provides a method for remotely configuring an FPGA, which can implement remote configuration of an FPGA module 40, and the method includes the following steps:
and S1, setting the starting mode of the FPGA module 40 to a PS (passive configuration mode) mode, so that the FPGA module 40 can be configured through the PS mode, and the configuration is simple and reliable.
S3, establishing a communication connection between the ethernet module 10 and the ethernet. Ethernet refers to a network that can transmit data, including local area network, metropolitan area network, world wide web, etc., for example, the ethernet computer is connected to the ethernet module 10, and thus, the configuration data of the FPGA module 40 can be obtained from the ethernet through the ethernet module 10, so that remote configuration can be realized. The ethernet module 10 is provided with a network port, and the network port is connected to the ethernet through a network cable, so as to establish the connection between the ethernet module 10 and the ethernet. The network port is, for example, an RJ45 network port, etc. In another alternative, the ethernet module 10 may also be a wireless network card or the like.
S5, the Ethernet module 10 is in communication connection with the single chip microcomputer module 20, and the Ethernet module 10 transmits the FPGA configuration data sent by the Ethernet to the single chip microcomputer module 20.
S7, the memory module 30 is in communication connection with the single chip microcomputer module 20, the single chip microcomputer module 20 downloads the received FPGA configuration data to the memory module 30, the FPGA configuration data are stored by setting the memory module 30, when the FPGA module 40 is reconfigured after being electrified, the FPGA configuration data in the memory module 30 cannot be lost and can be stored permanently, and the configuration of the FPGA module 40 is simple and reliable, and time and labor are saved.
And S9, the FPGA module 40 is in communication connection with the single chip microcomputer module 20, and the single chip microcomputer module 20 completes remote configuration of the FPGA module 40 according to the FPGA configuration data stored in the memory module 30.
The FPGA configuration data includes firmware files and configuration files.
The firmware file includes a plurality of sequentially numbered segment compressed firmware, such as segment compressed firmware 1, segment compressed firmware 2, and so on. Due to the limitation of the storage space of the memory module 30, the firmware file needs to be compressed in segments and numbered in sequence at the ethernet end, and the firmware file is divided into multiple segments and compressed respectively, so that the storage space of the memory module 30 can be reduced, the memory module 30 can be a general memory, a memory special for an FPGA is not required, and the configuration cost is reduced. The firmware file is divided into a plurality of sections and compressed respectively, and the encryption of FPGA configuration data can be realized, so that the data confidentiality is improved.
The configuration file includes a firmware version, a firmware CRC (Cyclic Redundancy Check) Check value, a total packet number of the segmented compressed firmware, and a file address index table, where the file address index table includes a number, an original size, and a compressed size respectively corresponding to each segmented compressed firmware, for example, segmented compressed firmware 1, and in the file address index table, the corresponding is: number 1+ original size + compressed size, and so on for each segment of the compressed firmware. The file address index table is established, so that the single chip microcomputer module 20 can conveniently decompress each segmented compression firmware subsequently, when the decompression operation is carried out, the segmented firmware before compression can be obtained only by indicating the number, the original size and the compression size of the current segmented compression firmware, the decompression time can be saved, and the operation is simple.
The memory module 30 includes a single chip application area 31, a configuration area 32, a firmware operation area 34, a firmware cache area 33, and a firmware backup area 35. The single chip application area 31 is used for storing configuration information of an application program of the single chip module 20. The firmware backup area 35 stores a complete backup firmware, and the configuration area 32 stores a backup configuration file corresponding to the backup firmware.
The step S7 specifically includes the following steps:
the single chip module 20 downloads the received firmware file to the firmware cache 33.
The single chip module 20 downloads the received configuration file to the configuration area 32 to form a cache configuration file.
The step S9 specifically includes the following steps:
the one-chip microcomputer module 20 reads the firmware file of the firmware cache 33.
The single chip module 20 decompresses the segmented compressed firmware files of the firmware file according to the file address index table of the cache configuration file and verifies the compressed firmware files according to the firmware CRC check value of the cache configuration file, if the verification is successful, the firmware file of the firmware cache region 33 is copied to the firmware operation region 34 to form an operation firmware file, and the cache configuration file of the configuration region 32 is copied to form an operation configuration file. If the verification fails, the single chip module 20 reads the firmware file in the firmware cache 33 again.
The single chip microcomputer module 20 decompresses the segmented compressed firmware files of the operating firmware files respectively according to the file address index table of the operating configuration files and verifies the compressed firmware files respectively according to the CRC values of the operating configuration files, if the verification is successful, the decompressed segmented compressed firmware files are downloaded to the FPGA module 40 in sequence according to the serial number sequence, so that the remote configuration of the FPGA module 40 is completed, meanwhile, the success of the remote configuration of the Ethernet FPGA module 40 is reported, and the success monitoring of the remote configuration of the FPGA module 40 can be realized. If the verification fails, the following steps are carried out:
the backup firmware of the firmware backup area 35 is copied to the firmware operating area 34 to form an operating backup firmware, and the backup configuration file of the configuration area 32 is copied to form an operating backup configuration file.
The single chip microcomputer module 20 downloads the running backup firmware to the FPGA module 40, so that remote configuration of the FPGA module 40 is completed, remote configuration failure of the ethernet FPGA module 40 is reported, and accordingly remote configuration failure monitoring of the FPGA module 40 can be achieved.
By dividing the memory module 30 into the single chip application area 31, the configuration area 32, the firmware operation area 34, the firmware cache area 33 and the firmware backup area 35, corresponding files can be stored respectively, the areas do not interfere with each other, and the reliability of the remote configuration work of the FPGA module 40 can be ensured.
Because the working voltage of the single chip microcomputer module 20 is different from the working voltage of the FPGA module 40, a level conversion module 50 is usually connected between the single chip microcomputer module 20 and the FPGA module 40, so that the communication level between the single chip microcomputer module 20 and the FPGA module 40 can be matched, and the normal work of the remote configuration of the FPGA module 40 is ensured.
The above examples merely represent preferred embodiments of the present invention, which are described in more detail and detail, but are not to be construed as limiting the scope of the present invention. It should be noted that, for a person skilled in the art, several variations and modifications, such as combinations of different features in various embodiments, may be made without departing from the spirit of the invention, and these are within the scope of the invention.
Claims (8)
1. An FPGA remote configuration method is characterized by comprising the following steps:
setting the starting mode of the FPGA module to be a PS mode;
establishing communication connection between the Ethernet module and the Ethernet;
the Ethernet module transmits the FPGA configuration data sent by the Ethernet to the singlechip module;
the singlechip module downloads the received FPGA configuration data to the memory module;
the single chip microcomputer module completes remote configuration of the FPGA module according to the FPGA configuration data stored in the memory module.
2. The FPGA remote configuration method of claim 1, wherein the FPGA configuration data comprises a firmware file and a configuration file, the firmware file comprises a plurality of sequentially numbered segmented compressed firmware, the configuration file comprises a firmware version, a firmware CRC check value, a total packet number of the segmented compressed firmware, and a file address index table, and the file address index table comprises a number, an original size and a compressed size respectively corresponding to each segmented compressed firmware.
3. The FPGA remote configuration method of claim 2, wherein the memory module comprises a configuration area, a firmware execution area and a firmware cache area;
the step that the singlechip module downloads the received FPGA configuration data to the memory module comprises the following steps:
the single chip microcomputer module downloads the received firmware file to a firmware cache area;
the single chip microcomputer module downloads the received configuration file to the configuration area so as to form a cache configuration file.
4. The FPGA remote configuration method according to claim 3, wherein the step of the single chip microcomputer module completing the remote configuration of the FPGA module according to the FPGA configuration data stored in the memory module comprises:
the single chip microcomputer module reads a firmware file of the firmware cache region;
the single chip microcomputer module decompresses the segmented compressed firmware files of the firmware files respectively according to a file address index table of the cache configuration file and verifies the compressed firmware files respectively according to a firmware CRC (cyclic redundancy check) value of the cache configuration file, if the verification is successful, the firmware files of the firmware cache area are copied to the firmware operation area so as to form an operation firmware file, and the cache configuration file of the configuration area is copied so as to form an operation configuration file;
the single chip microcomputer module decompresses the segmented compressed firmware files of the operating firmware files respectively according to the file address index table of the operating configuration files and verifies the segmented compressed firmware files respectively according to the CRC values of the firmware files of the operating configuration files, and if verification is successful, the decompressed segmented compressed firmware files are downloaded to the FPGA module in sequence according to the serial number sequence, so that remote configuration of the FPGA module is completed.
5. The FPGA remote configuration method of claim 4, wherein the single-chip microcomputer module decompresses the plurality of segmented compressed firmware files of the operating firmware file according to the file address index table of the operating configuration file and checks the firmware CRC check values of the operating configuration file respectively, and if the check is successful, the Ethernet FPGA module remote configuration is reported to be successful at the same time.
6. The FPGA remote configuration method of claim 4, wherein the memory module further comprises a firmware backup area, the firmware backup area stores a complete backup firmware, and the configuration area stores a backup configuration file corresponding to the backup firmware;
the single chip microcomputer module decompresses the segmented compressed firmware of the operating firmware file according to a file address index table of the operating configuration file and verifies the segmented compressed firmware according to a firmware CRC (cyclic redundancy check) value of the operating configuration file, if the verification fails, the backup firmware of the firmware backup area is copied to the firmware operating area so as to form operating backup firmware, and the backup configuration file of the configuration area is copied so as to form operating backup configuration file;
the single chip microcomputer module downloads the running backup firmware to the FPGA module, and therefore remote configuration of the FPGA module is completed.
7. The FPGA remote configuration method of claim 6, wherein the remote configuration failure of the Ethernet FPGA module is reported while the single-chip microcomputer module downloads the running backup firmware to the FPGA module.
8. The FPGA remote configuration method according to claim 1, wherein the Ethernet module is provided with a network port, and the network port is connected with the Ethernet through a network cable, so that connection between the Ethernet module and the Ethernet is established.
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113867771A (en) * | 2021-09-29 | 2021-12-31 | 哈尔滨工程大学 | Remote firmware upgrading method based on FPGA |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103106095A (en) * | 2013-03-11 | 2013-05-15 | 深圳华用科技有限公司 | Method for remotely upgrading industrial camera and camera |
CN103617054A (en) * | 2013-11-15 | 2014-03-05 | 中国航空无线电电子研究所 | Device for remotely loading FPGA (field programmable gate array) configuration files and loading method |
CN203930820U (en) * | 2014-01-15 | 2014-11-05 | 杭州电子科技大学 | A kind of FPGA configuration circuit that compresses storage |
CN206021242U (en) * | 2016-05-25 | 2017-03-15 | 成都远望科技有限责任公司 | The FPGA programs configuration controlled based on CPLD and firmware encrypting system |
JP2018109907A (en) * | 2017-01-05 | 2018-07-12 | 日本信号株式会社 | FPGA configuration device |
CN209822106U (en) * | 2019-01-25 | 2019-12-20 | 宁波城市职业技术学院 | Configuration device based on FPGA programmable device |
-
2020
- 2020-04-24 CN CN202010334388.4A patent/CN111555914B/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103106095A (en) * | 2013-03-11 | 2013-05-15 | 深圳华用科技有限公司 | Method for remotely upgrading industrial camera and camera |
CN103617054A (en) * | 2013-11-15 | 2014-03-05 | 中国航空无线电电子研究所 | Device for remotely loading FPGA (field programmable gate array) configuration files and loading method |
CN203930820U (en) * | 2014-01-15 | 2014-11-05 | 杭州电子科技大学 | A kind of FPGA configuration circuit that compresses storage |
CN206021242U (en) * | 2016-05-25 | 2017-03-15 | 成都远望科技有限责任公司 | The FPGA programs configuration controlled based on CPLD and firmware encrypting system |
JP2018109907A (en) * | 2017-01-05 | 2018-07-12 | 日本信号株式会社 | FPGA configuration device |
CN209822106U (en) * | 2019-01-25 | 2019-12-20 | 宁波城市职业技术学院 | Configuration device based on FPGA programmable device |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113867771A (en) * | 2021-09-29 | 2021-12-31 | 哈尔滨工程大学 | Remote firmware upgrading method based on FPGA |
CN113867771B (en) * | 2021-09-29 | 2024-05-24 | 哈尔滨工程大学 | Remote firmware upgrading method based on FPGA |
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