CN111540395A - Magnetic random access memory cell and data writing method thereof - Google Patents

Magnetic random access memory cell and data writing method thereof Download PDF

Info

Publication number
CN111540395A
CN111540395A CN202010218365.7A CN202010218365A CN111540395A CN 111540395 A CN111540395 A CN 111540395A CN 202010218365 A CN202010218365 A CN 202010218365A CN 111540395 A CN111540395 A CN 111540395A
Authority
CN
China
Prior art keywords
tunnel junction
magnetic tunnel
control signal
pulse control
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202010218365.7A
Other languages
Chinese (zh)
Other versions
CN111540395B (en
Inventor
赵巍胜
彭守仲
李伟祥
芦家琪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beihang University
Original Assignee
Beihang University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beihang University filed Critical Beihang University
Priority to CN202010218365.7A priority Critical patent/CN111540395B/en
Publication of CN111540395A publication Critical patent/CN111540395A/en
Application granted granted Critical
Publication of CN111540395B publication Critical patent/CN111540395B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1675Writing or programming circuits or methods
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00Galvanomagnetic devices
    • H10N50/10Magnetoresistive devices

Abstract

The invention provides a magnetic random storage unit and a data writing method thereof, wherein the magnetic random storage unit comprises a spin orbit torque layer and at least one magnetic tunnel junction arranged on the spin orbit torque layer; the data writing method comprises the following steps: inputting a selection voltage to a magnetic tunnel junction to which data is to be written in the at least one magnetic tunnel junction; inputting a write current to the spin orbit torque layer at a preset time interval so that the resistance state of the magnetic tunnel junction corresponds to data to be written, wherein the write current is smaller than the critical switching current of the magnetic tunnel junction and larger than the critical switching current of the magnetic tunnel junction when the selection voltage is input; the input of the selection voltage and the write current is stopped in sequence, the invention can ensure the deterministic overturning of the magnetic moment of the magnetic tunnel junction and improve the storage density.

Description

Magnetic random access memory cell and data writing method thereof
Technical Field
The invention relates to the technical field of magnetic memories, in particular to a magnetic random access memory unit and a data writing method thereof.
Background
With the continuous reduction of the semiconductor process size, moore's law is slowed down, and the increase of leakage current and interconnection delay become the bottleneck of the conventional CMOS memory. The search for new generation solutions for memory technologies has become a focus of integrated circuit research, in which magnetic random access memory cells are of great interest. Compared with the traditional device, the Magnetic Random Access Memory (MRAM)) has the advantages of unlimited erasing and writing times, nonvolatility, high reading and writing speed, irradiation resistance and the like, is expected to become a universal memory, and is an ideal device for constructing the next-generation nonvolatile memory and memory calculation.
For a long time, the writing mechanism has been the main technical bottleneck limiting the development of MRAM. Currently, the mainstream electrical writing methods of MRAM include Spin Transfer Torque (STT) and Spin Orbital Torque (SOT). Compared with STT-MRAM, SOT-MRAM has the advantages that the writing current flows through the bottom layer heavy metal to avoid the breakdown risk, the ultra-fast writing speed which is less than 1ns theoretically, the heavy metal resistivity is low, the power consumption is low, the reading and writing branch is separated, the barrier layer is allowed to be thicker, and the like. However, the spin orbit torque writing method requires an external magnetic Field in an in-plane direction, which increases the complexity of the circuit, and if an Antiferromagnetic (AFM) film is used to generate an Exchange Bias Field (EB) in the free layer instead of the external magnetic Field to realize the magnetic Field-free switching, the generated EB is small, the critical switching current is large, and the power consumption is large. And the storage unit of the SOT-MRAM has three ports, each MTJ needs two access control first triodes, and the storage density is low.
Disclosure of Invention
An object of the present invention is to provide a data writing method for a magnetic memory, so as to ensure the deterministic flipping of the magnetic moment of the magnetic tunnel junction and improve the storage density. It is another object of the present invention to provide a magnetic memory. It is a further object of this invention to provide such a computer apparatus. It is a further object of this invention to provide such a readable medium.
In order to achieve the above object, in one aspect of the present invention, a data writing method of a magnetic random access memory unit including a spin torque orbit layer and at least one magnetic tunnel junction disposed on the spin torque orbit layer,
the method comprises the following steps:
inputting a selection voltage to a magnetic tunnel junction to which data is to be written in the at least one magnetic tunnel junction;
inputting a write current to the spin orbit torque layer at a preset time interval so that the resistance state of the magnetic tunnel junction corresponds to data to be written, wherein the write current is smaller than the critical switching current of the magnetic tunnel junction and larger than the critical switching current of the magnetic tunnel junction when the selection voltage is input;
sequentially stopping inputting the selection voltage and the write current.
Preferably, the predetermined time interval is less than 4 ns.
Preferably, a selection voltage is input to a magnetic tunnel junction to which data is to be written in the at least one magnetic tunnel junction, and the selection voltage specifically includes:
the first voltage terminal and the magnetic tunnel junction are turned on in response to a first pulse control signal to form a selection voltage and input to the magnetic tunnel junction.
Preferably, the inputting a write current to the spin orbit torque layer after a preset time interval so that the resistance state of the magnetic tunnel junction corresponds to data to be written specifically includes:
and responding to a second pulse control signal to conduct a second voltage end and the spin orbit torque layer to form a write current and input the write current into the spin orbit torque layer, wherein the input time interval of the first pulse control signal and the second pulse control signal is the preset time interval, and the stop time of the first pulse control signal is before the stop time of the second pulse control signal.
Preferably, further comprising, before turning on the input current and the magnetic tunnel junction by the first switching element in response to the first pulse control signal:
the input control signal is divided to obtain two pulse control signals, wherein the pulse control signal input into the magnetic tunnel junction is a first pulse control signal;
and delaying the pulse control signal input into the spin orbit torque layer according to a preset time interval to obtain the second pulse control signal.
The invention also discloses a magnetic random storage unit, which comprises a spin orbit torque layer and at least one magnetic tunnel junction arranged on the spin orbit torque layer;
further comprising:
the selection voltage control module is used for inputting and stopping inputting selection voltage to the magnetic tunnel junction of the data to be written in the at least one magnetic tunnel junction;
and the write current control module is used for inputting write current to the spin orbit torque layer at preset time intervals so as to enable the resistance state of the magnetic tunnel junction to correspond to data to be written, wherein the write current is smaller than the critical switching current of the magnetic tunnel junction and larger than the critical switching current of the magnetic tunnel junction when the selection voltage is input, and the write current is stopped being input after the selection voltage is stopped being input.
Preferably, the predetermined time interval is less than 4 ns.
Preferably, the selection voltage control module is specifically configured to turn on the first voltage terminal and the magnetic tunnel junction in response to the first pulse control signal to form the selection voltage and input the selection voltage to the magnetic tunnel junction.
Preferably, the selection voltage control module includes a first switching element, a first end of the first switching element is connected to the first voltage end, a second end of the first switching element is electrically connected to the magnetic tunnel junction, and a control end of the first switching element receives the first pulse control signal to turn on the first voltage end and the magnetic tunnel junction.
Preferably, the write current control module is specifically configured to turn on a second voltage terminal and the spin orbit torque layer through a second switch element in response to a second pulse control signal to form a write current and input the write current to the spin orbit torque layer, where an input time interval of the first pulse control signal and the second pulse control signal is the preset time interval, and a stop time of the first pulse control signal is before a stop time of the second pulse control signal.
Preferably, the write current control module includes a second switch element, a first end of the second switch element is connected to the second voltage end, a second end of the second switch element is electrically connected to the spin orbit torque layer, and a control end of the second switch element receives the second pulse control signal to turn on the second voltage end and the spin orbit torque layer.
Preferably, the control signal processing unit is further configured to differentiate the input control signal into two pulse control signals before the input current and the magnetic tunnel junction are turned on by the first switching element in response to the first pulse control signal, where the pulse control signal input to the magnetic tunnel junction is the first pulse control signal, and the pulse control signal input to the spin orbit torque layer is delayed according to a preset time interval to obtain the second pulse control signal.
The invention also discloses a computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor,
the processor, when executing the program, implements the method as described above.
The invention also discloses a computer-readable medium, having stored thereon a computer program,
which when executed by a processor implements the method as described above.
According to the invention, the critical switching current of the magnetic tunnel junction is reduced by firstly inputting the selection voltage to the magnetic tunnel junction. And inputting a write current to the spin orbit torque layer after a preset time interval so that the resistance state of the magnetic tunnel junction corresponds to the data to be written. Finally, the input of the selection voltage and the write current are sequentially stopped. According to the invention, by adjusting the time sequence relation of the selection voltage of the input magnetic tunnel junction and the write current of the spin orbit moment layer, when the write current of the write data is input, the critical overturning current of the magnetic tunnel junction is reduced by the selection voltage, so that the free layer of the magnetic tunnel junction with the input selection voltage can be ensured to be overturned by the write current, and the magnetic moment of the free layer of the magnetic tunnel junction without the input selection voltage is kept unchanged. The selection voltage is stopped first, the write current is stopped again, the application and stop moments of the write current are delayed relative to the selection voltage, and a preset time interval is delayed to enable the critical overturning current of the magnetic tunnel junction to be recovered first so as to improve the anti-interference capability, reduce the probability of data write errors, reduce the write power consumption and optimize the performance of the memory.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a block diagram of a magnetic random access memory cell in one embodiment of a method for writing data to the magnetic random access memory cell of the present invention;
FIG. 2 is a flow chart showing one embodiment of a method for writing data into a magnetic random access memory cell according to the present invention;
FIG. 3 is a second flow chart of a method for writing data into a MRAM cell according to a second embodiment of the present invention;
FIG. 4 is a schematic diagram of the first pulse control signal and the second pulse control signal formed in one embodiment of the data writing method of the magnetic random access memory cell of the present invention;
FIG. 5 is a diagram showing a comparison of an input control signal, a first voltage terminal and a second voltage terminal in one embodiment of a method for writing data into a MRAM cell according to the present invention;
FIG. 6 is a graph comparing an input control signal, a first pulse control signal and a second pulse control signal according to an embodiment of the method for writing data into a MRAM cell of the present invention;
FIG. 7 is a graph showing a comparison of the select voltage, write current, and magnetic tunnel junction resistance for one embodiment of a method of writing data to a magnetic random access memory cell in accordance with the present invention;
FIG. 8 is a block diagram of a magnetic random access memory cell in another embodiment of a method for writing data to the magnetic random access memory cell of the present invention;
FIG. 9 shows the selection voltage, write current, magnetic tunnel junction M in one embodiment of the data writing method of a MRAM cell of the present invention2Resistance R2Magnetic tunnel junction M1Resistance R1And a magnetic tunnel junction MnResistance RnA comparison graph of (A);
FIG. 10 shows a schematic block diagram of a computer device suitable for use in implementing embodiments of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
An existing Magnetic Random Access Memory (MRAM) based on a Magnetic Tunnel Junction (MTJ) includes a spin-orbit torque layer and at least one Magnetic Tunnel Junction (MTJ) disposed on the spin-orbit torque layer. The magnetic tunnel junction comprises a reference layer, a barrier layer and a free layer which are arranged from top to bottom, and the bottom surface of the free layer is fixedly contacted with the upper surface of the spin orbit torque layer.
The resistance value of the magnetic tunnel junction depends on the magnetization directions of the free layer and the reference layer, and if the magnetization directions of the free layer and the reference layer are consistent, the resistance value of the magnetic tunnel junction is smaller, and the magnetic tunnel junction is in a low resistance state. On the contrary, if the magnetization directions of the free layer and the reference layer are opposite, the resistance value of the magnetic tunnel junction is large, and the magnetic tunnel junction is in a high resistance state. In which the magnetization direction of the reference layer is set in advance to a fixed magnetization direction, for example, a synthetic antiferromagnetic layer may be used to fix the magnetization direction of the reference layer, and the magnetization direction of the free layer may be changed by a write operation. For the SOT-MRAM, the magnetization direction of the free layer is turned over deterministically by inputting write current to the spin-orbit coupling layer during write operation, so that the resistance state of the magnetic tunnel junction is consistent with that of the magnetic tunnel junction corresponding to the data to be written, and the purpose of data write is realized. Specifically, the current flowing through the Spin orbit torque layer can induce torque to drive the magnetization direction of the free layer to flip due to Spin Hall Effect (SHE) or Rashba Effect (Rashba Effect). And when data is read later, the resistance state of the magnetic tunnel junction is determined through the reading circuit, and the data stored in the memory can be determined. The spin orbit torque magnetic random access memory (SOT-MRAM) is adopted, the writing current mode is an in-plane writing mode, the reading and writing paths can be separated, the writing current does not flow through a magnetic tunnel junction, and the independent optimization of the reading and writing performance is facilitated, so that the SOT-MRAM is superior to the STT-MRAM in the aspects of writing speed, integration level and the like.
The write current in SOT-MRAM to flip the magnetization direction of the free layer requires an external magnetic field in one in-plane direction, which increases the complexity of the circuit. In the prior art, an AFM film is adopted to generate an Exchange bias field (EB) in a free layer to replace an external magnetic field to realize non-magnetic field overturning, and the generated EB is small, the critical overturning current is large, and the power consumption is large. And the storage unit of the SOT-MRAM has three ports, each MTJ needs two access control first triodes, and the storage density is low.
The mechanism of action of Voltage Control Magnetic Anisotropy (VCMA) is that an electric field applied across the MTJ causes accumulation of electron charges, which causes changes in interface atom orbits and state densities, thereby causing changes in interface Magnetic Anisotropy. The VCMA effect can be used for oscillating switching, which has low power consumption but high Write Error Rate (WER) probability, and usually requires an in-plane external magnetic field to assist the switching of the perpendicular magnetic moment.
VCMA-based spin-orbit torque magnetic memories can combine the advantages of VCMA and SOT-MRAM. When data is written, the selection voltage is added at the two ends of the MTJ, so that the critical switching current of the magnetic tunnel junction is reduced, the writing power consumption is reduced, and the SOT-MRAM has the advantages of high density, low power consumption and high reading stability. However, the VCMA-based SOT-MRAM simultaneously applies and stops the current written in the magnetic tunnel junction and the spin-orbit torque layer, the selection voltage still exists after the magnetic moment is overturned, the energy barrier is low, the anti-interference capability is weak, the interference effect of the continuously applied current of the spin-orbit torque layer on the magnetic moment of the free layer is obvious, and the writing error rate is increased.
Aiming at the problems of the writing mode of a magnetic random access Memory unit comprising a magnetic random access Memory unit in the prior art, in particular to the problems of high probability of data writing errors and high writing power consumption of a VCMA (Voltage-controlled spin Memory) based on the spin orbit torque.
Example 1
To solve the above problem, according to an aspect of the present invention, the present embodiment discloses a data writing method of a magnetic random access memory cell. In the embodiment, one magnetic tunnel junction is taken as an example for description, as shown in fig. 1, and in other embodiments, a plurality of magnetic tunnel junctions may be provided. The magnetic tunnel junction comprises a reference layer 4, a barrier layer 3 and a free layer 2 which are arranged from top to bottom, and the bottom surface of the free layer 2 is fixed in contact with the upper surface of the spin orbit torque layer 1. Preferably, a synthetic antiferromagnetic layer and a top electrode 5 are also added above the reference layer 4.
Taking the MTJ with in-plane magnetic anisotropy as an example, as shown in fig. 2, the data writing method of the magnetic random access memory cell includes:
s100: inputting a first current to a magnetic tunnel junction of the at least one magnetic tunnel junction to which data is to be written. It is understood that, in the present embodiment, only one magnetic tunnel junction is provided on the spin orbit torque layer 1, that is, when data needs to be written into the magnetic tunnel junction, the first current is input into the magnetic tunnel junction. Preferably, a top electrode 5 may be disposed on a top of the magnetic tunnel junction, and a selection voltage may be input to the magnetic tunnel junction through the top electrode 5 to reduce anisotropy of the magnetic tunnel junction.
S200: and inputting a write current to the spin orbit torque layer 1 at preset time intervals so that the resistance state of the magnetic tunnel junction corresponds to data to be written, wherein the write current is less than the critical switching current of the magnetic tunnel junction and greater than the critical switching current of the magnetic tunnel junction when the selection voltage is input. The preset time interval is preferably less than 4ns, and the time length of reducing the critical switching current of the magnetic tunnel junction is ensured. It should be noted that the input time of the write current needs to ensure that the magnetic moment of the free layer 2 is completely flipped as required, and the write current can be set according to actual requirements. The write current is less than the critical switching current of the magnetic tunnel junction and greater than the critical switching current of the magnetic tunnel junction when the selection voltage is input, wherein the critical switching current of the magnetic tunnel junction is the critical switching current of the magnetic tunnel junction when the selection voltage is not applied, and is greater than the critical switching current of the magnetic tunnel junction after the selection voltage is applied.
S300: sequentially stopping inputting the selection voltage and the write current.
According to the invention, the critical switching current of the magnetic tunnel junction is reduced by firstly inputting the selection voltage to the magnetic tunnel junction. And inputting a write current to the spin orbit torque layer 1 after a preset time interval so that the resistance state of the magnetic tunnel junction corresponds to the data to be written. Finally, the input of the selection voltage and the write current are sequentially stopped. The invention adjusts the time sequence relation of the selection voltage of the input magnetic tunnel junction and the write current of the spin orbit torque layer 1, when the write current of the write data is input, the critical overturning current of the magnetic tunnel junction is reduced by the selection voltage, so that the write current can ensure that the free layer 2 of the magnetic tunnel junction finishes overturning. The selection voltage is stopped first, the write current is stopped again, the application and stop moments of the write current are delayed relative to the selection voltage, and a preset time interval is delayed to enable the critical overturning current of the magnetic tunnel junction to be recovered first so as to improve the anti-interference capability, reduce the probability of data write errors, reduce the write power consumption and optimize the performance of the memory.
As a preferred embodiment, the S100 may specifically include:
s110: the first voltage terminal and the magnetic tunnel junction are turned on in response to a first pulse control signal to form a selection voltage and input to the magnetic tunnel junction.
Specifically, as shown in FIG. 1, in a preferred embodiment, the first voltage terminal VGFor providing a selection voltage of the magnetic tunnel junction, the first voltage terminal V can be controlled by using the first switching elementGWhether or not to be turned on with the top electrode 5 of the magnetic tunnel junction to input the selection voltage.
In this embodiment, the first switching element is a first transistor QVIn other embodiments, other switching elements can be selected to control the first voltage terminal VGConduction to the magnetic tunnel junction. Specifically, a first triode QVThe control terminal BL receives a first pulse control signal, a first terminal and a first voltage terminal VGAnd the second end is electrically connected with the magnetic tunnel junction. A first triode QVThe first voltage terminal V is conducted in response to the first pulse control signalGAnd forming a selection voltage with the magnetic tunnel junction and inputting the selection voltage into the magnetic tunnel junction to reduce the critical switching current of the magnetic tunnel junction. In a specific example, after the selection voltage is input, the critical switching current of the magnetic tunnel junction is reduced from 400uA to 260uA, so that data writing can be realized by using a low current value of the writing current, and the writing power consumption is reduced.
As a preferred embodiment, the S200 may specifically include:
s210: and responding to a second pulse control signal to conduct a second voltage end and the spin orbit torque layer 1 to form a writing current and inputting the writing current into the spin orbit torque layer 1, wherein the input time interval of the first pulse control signal and the second pulse control signal is the preset time interval, and the stop time of the first pulse control signal is before the stop time of the second pulse control signal.
Specifically, referring again to FIG. 1, the second voltage terminal VSOTFor supplying a write current to the spin torque layer 1, a second voltage terminal V can be controlled by a second switching elementSOTWhether or not to switch on with the spin orbit torque layer 1 to input a write current.
In this embodiment, the second switching element is a second transistor QIIn other embodiments, other switching elements can be selected to control the second voltage terminal VSOTConduction with the spin orbit torque layer 1. Specifically, a second triode QIThe control terminal WL receives a second pulse control signal, the first terminal and the second voltage terminal VSOTAnd the second end is electrically connected with the spin orbit torque layer 1. Second triode QITurning on the second voltage terminal V in response to the second pulse control signalSOTAnd a spin orbit torque layer 1, and a write current is formed and inputted to the spin orbit torque layer 1 to flip the magnetic moment direction of the free layer 2. In an alternative embodiment, an input electrode and a second transistor Q may be provided in the spin orbit torque layer 1IIs connected to the input electrode, in a second triode QIWhen conducting, receiving the second voltage end VSOTThe write current is formed and inputted to the spin orbit torque layer 1.
In a preferred embodiment, as shown in fig. 3, the method further comprises, before S110:
s010: and dividing the input control signal into two pulse control signals, wherein the pulse control signal input into the magnetic tunnel junction is the first pulse control signal.
S020: and delaying the pulse control signal input into the spin orbit torque layer 1 according to a preset time interval to obtain the second pulse control signal.
It will be appreciated that in the preferred embodiment, the first and second pulse control signals are derived from the same input control signal. As shown in fig. 4, the control signal processing unit differentiates the input control signal to obtain two pulse control signals, and the pulse control signal input to the spin orbit torque layer 1 is divided into two pulse control signals according to a predetermined time interval t0Delaying to obtain a second pulse control signal, thereby obtaining two pulses with equal width and time interval of t0The first pulse control signal and the second pulse control signal. One pulse control signal is delayed, so that the application and stop time of the selection voltage applied to the magnetic tunnel junction is earlier than that of the write current, and the output is satisfiedInputting a write current after a preset time interval after the selection voltage is inputted, and sequentially stopping inputting the selection voltage and the write current. The duration t of the input control signal should be sufficient to ensure that the magnetic moment of the free layer 2 is turned. The specific structure of the control signal processing unit can be implemented in different ways according to the function of the control signal processing unit, and is a conventional technical means in the art and is not described herein again.
The invention will be further illustrated by means of a specific example. In this example, after the magnetic moment of the free layer 2 of the magnetic tunnel junction is reversed by the forward write current, the direction of the magnetic moment of the free layer 2 is opposite to the direction of the magnetic moment of the reference layer 4, and the resistance of the magnetic tunnel junction is changed from the low resistance state to the high resistance state, so that the high resistance state corresponds to data "1" and the low resistance state corresponds to data "0".
When the initial state of the magnetic tunnel junction is '0' and data '1' needs to be written, the first voltage end V is enabledGAnd a second voltage terminal VSOTThe application was kept continuous as shown in fig. 5. Further, an input control signal (WRITE SIGNAL) having a pulse width t is input, and the two input control signals are divided into two signals having the same pulse width and a time interval t0As shown in fig. 6, and a second pulse control signal. A first triode QVThe first voltage terminal V is conducted in response to a first pulse control signal inputted from the control terminal BLGThe selection voltage V is applied to the magnetic tunnel junction, and the energy barrier when the magnetic moment of the magnetic tunnel junction is turned is reduced, so that the critical turning current of the magnetic tunnel junction is reduced. Passing time interval t0Then, the second triode QIIs conducted in response to a second pulse control signal input by the control terminal WL to form a write current ISOTThe spin orbit torque layer 1 is input to generate spin orbit torque to overturn the magnetic torque of the free layer 2. After the magnetic moment is completely inverted, the magnetic moment is applied to the first triode QVThe first pulse control signal of the control end BL is firstly removed, the energy barrier of the magnetic tunnel junction is recovered, and the anti-interference capability is enhanced. Passing time interval t0Then, the voltage is applied to the second triode QIThe second pulse control signal of the control end WL is removed again, the magnetic moment overturning is completed, and the magnetic tunnelThe junction resistance is in a high resistance state, and writing of a data value "1" is realized, whereas writing of a data value "0" is realized, as shown in fig. 7. Therefore, the present embodiment can realize data writing by using one input control signal, two switching elements and two voltages, and only the second voltage terminal V needs to be changed to write different dataSOTThe polarity of the input voltage is sufficient.
As a preferred implementation mode, the magnetic tunnel junction can be in a common shape such as a circle, a rectangle or a square, so as to reduce the cost and facilitate the continuous miniaturization of the size, and meanwhile, the magnetic tunnel junction is suitable for various memory structures such as a double-interface structure and a multi-interface structure. In other embodiments, an oval shape may be used, and the invention is not limited thereto.
In this embodiment, the magnetic tunnel junction includes a top reference layer 4, a free layer 2 in contact with the spin orbit torque layer 1, and a barrier layer 3 disposed between the reference layer 4 and the free layer 2, and the magnetic tunnel junction has a three-layer structure including only one free layer 2. In other embodiments, the free layer 2 may be provided in plural, i.e., two or more free layers 2. The magnetic tunnel junction comprises a top reference layer 4, a plurality of free layers 2 and a barrier layer 3 arranged between every two adjacent layers, the free layer 2 at the lowest layer being arranged in contact with the spin orbit torque layer 1. For example, in a specific example, when two free layers 2 are included, the magnetic memory cell structure may include a spin orbit torque layer 1, a second free layer 2, a barrier layer 3, a first free layer 2, a barrier layer 3, and a reference layer 4 sequentially disposed on the spin orbit torque layer 1.
In a preferred embodiment, the thickness of the free layer 2 can be selected to be any value within a range of 0 to 3nm, the thickness of the oxide barrier layer 3 can be selected to be any value within a range of 0 to 2nm, the thickness of the reference layer 4 can be selected to be any value within a range of 0 to 3nm, the thickness of the synthetic antiferromagnetic layer can be selected to be any value within a range of 0 to 20nm, and the thickness of the top electrode can be selected to be any value within a range of 10 to 200 nm.
In a preferred embodiment, the spin orbit torque layer 1 may be a strip-shaped thin film formed using a material such as a heavy metal, an antiferromagnetic material, or a topological insulator. More preferably, heavy metal strip films or antiferromagnetic strip filmsThe thickness of (A) may be any value in the range of 0 to 20 nm. More preferably, the heavy metal material may adopt any one of platinum Pt, tantalum Ta or tungsten W, the antiferromagnetic material may adopt one of iridium manganese IrMn or platinum manganese PtMn, and the topological insulator material may adopt bismuth selenide Bi2Se3Or bismuth telluride Bi2Te3The ratio of the elements in each compound is not limited, and can be determined flexibly according to practical situations, and the materials are not limited to the materials listed above, and the solution of forming the magnetic random access memory using the material capable of realizing the function of the spin-orbit torque layer 1 is also within the scope of the present invention.
In a preferred embodiment, the magnetic random access memory cell inputs the select voltage and write current to the spin torque orbit layer 1 and the magnetic tunnel junction by placing electrodes on the spin torque orbit layer 1 and the magnetic tunnel junction, such as the top electrode 5 placed on top of the magnetic tunnel junction. Among them, the material of the top electrode 5 may preferably be any one of tantalum Ta, aluminum Al, gold Au, or copper Cu.
In a preferred embodiment, the top area of the spin orbit torque layer 1 is larger than the bottom area of the magnetic tunnel junction, and the bottom shape of the magnetic tunnel junction is completely embedded in the top surface of the spin orbit torque layer 1, i.e. the outer edge of the magnetic tunnel junction is located inside the outer edge of the spin orbit torque layer 1.
Preferably, the material of the free layer 2 and the reference layer 4 is ferromagnetic metal, and the barrier layer 3 is oxide. The magnetic tunnel junction has perpendicular magnetic anisotropy, which means that the magnetization directions of the free layer 2 and the reference layer 4 forming the magnetic tunnel junction are in the perpendicular direction. The ferromagnetic metal can be a mixed metal material formed by at least one of cobalt iron CoFe, cobalt iron boron CoFeB or nickel iron NiFe, and the proportion of the mixed metal materials can be the same or different. The oxide can be magnesium oxide MgO or aluminum oxide Al2O3And one of the oxides is used for generating tunneling magnetoresistance effect. In practical applications, the ferromagnetic metal and the oxide may be made of other feasible materials, and the invention is not limited to this.
The free layer 2 of the magnetic tunnel junction is fixedly contacted with the spin orbit moment layer 1, each layer of the magnetic tunnel junction and the spin orbit moment layer 1 can be sequentially plated on a substrate from bottom to top by the traditional methods of ion beam epitaxy, atomic layer deposition or magnetron sputtering, and then a plurality of magnetic tunnel junctions are prepared and formed by the traditional nanometer device processing technologies of photoetching, etching and the like.
In a preferred embodiment, the spin orbit torque layer 1 is a spin orbit torque layer 1 made of a heavy metal thin film, an antiferromagnetic thin film, or other material. The heavy metal film or the antiferromagnetic film can be made into a rectangle, the top area of the heavy metal film or the antiferromagnetic film is required to be larger than the bottom area of the outline formed by all the magnetic tunnel junctions so as to be capable of arranging a plurality of magnetic tunnel junctions, and the bottom shapes of the magnetic tunnel junctions are completely embedded in the top shapes of the heavy metal film or the antiferromagnetic film. Preferably, the spin orbit torque layer 1 may be made of one of platinum Pt, tantalum Ta, or tungsten W. In practical applications, the spin orbit torque layer 1 can also be formed by other feasible materials, and the invention is not limited to this.
It should be noted that, in this embodiment, the MTJ with in-plane magnetic anisotropy is taken as an example to describe the present invention, and in other embodiments, after adding an antiferromagnetic film as a stripe to the MTJ with perpendicular magnetic anisotropy or adding a ferromagnetic layer with in-plane anisotropy above a magnetic tunnel junction, data writing without an external magnetic field can be realized by the data writing method of the present invention.
Those skilled in the art can understand that the triode in this embodiment can be an N-type triode or a P-type triode, and the high and low levels of various signals are matched with the type of the triode to realize the corresponding functions. The technical personnel in the field can know that the P-type triode needs to be matched with a low-level signal when being conducted, and the N-type triode needs to be matched with a high-level signal when being conducted, so that the N-type triode or the P-type triode is adopted, the level of a triode grid (control end) is set to realize the corresponding on-off function, and the data reading purpose of the invention is realized. The control end of the triode provided by the embodiment of the invention is a grid electrode, the first end can be a source electrode, and the second end is a drain electrode, or vice versa, the first end can be a drain electrode, and the second end is a source electrode.
In addition, the triode provided by the embodiment of the invention can be a field effect triode, wherein the triode can be an enhancement type field effect triode and can also be a depletion type field effect triode. The triode can adopt a low-temperature polysilicon TFT, can reduce the manufacturing cost and the product power consumption, has faster electron mobility, and can also adopt an oxide semiconductor TFT.
Compared with the traditional spin orbit torque writing method, the data writing method of the magnetic random memory unit applies the first voltage in the magnetization overturning process, reduces the energy barrier in the magnetization overturning process, reduces the critical overturning current and has low writing power consumption. Meanwhile, the writing speed is faster than that of the traditional spin-orbit torque writing method, because the applied selection voltage reduces the height of an energy barrier, the energy required by the magnetic moment in the overturning process is lower, the writing time is shorter, and the speed is faster.
Based on the same principle, the embodiment also discloses a magnetic random access memory unit. The magnetic random access memory cell may include a spin orbit torque layer 1 and at least one magnetic tunnel junction disposed on the spin orbit torque layer 1. The magnetic random access memory further comprises a selection voltage control module and a write current control module.
The selection voltage control module is used for inputting and stopping inputting selection voltage to the magnetic tunnel junction.
The write current control module is configured to input a write current to the spin orbit torque layer 1 at a preset time interval so that a resistance state of the magnetic tunnel junction corresponds to data to be written, where the write current is smaller than a critical switching current of the magnetic tunnel junction and larger than the critical switching current of the magnetic tunnel junction when the selection voltage is input, and the write current is stopped from being input after the selection voltage is stopped from being input.
In a preferred embodiment, the preset time interval is less than 4 ns.
In a preferred embodiment, the selection voltage control module is specifically configured to turn on the first voltage terminal and the magnetic tunnel junction in response to the first pulse control signal to form the selection voltage and input the selection voltage to the magnetic tunnel junction.
In a preferred embodiment, the selection voltage control module includes a first switching element, a first terminal of the first switching element is connected to the first voltage terminal, a second terminal of the first switching element is electrically connected to the magnetic tunnel junction, and a control terminal of the first switching element receives the first pulse control signal to turn on the first voltage terminal and the magnetic tunnel junction.
In a preferred embodiment, the write current control module is specifically configured to turn on a second voltage terminal and the spin orbit torque layer 1 through a second switching element in response to a second pulse control signal to form a write current and input the write current to the spin orbit torque layer 1, wherein an input time interval of the first pulse control signal and the second pulse control signal is the preset time interval, and a stop time of the first pulse control signal is before a stop time of the second pulse control signal.
In a preferred embodiment, the write current control module includes a second switching element, a first terminal of the second switching element is connected to the second voltage terminal, a second terminal of the second switching element is electrically connected to the spin orbit torque layer 1, and a control terminal of the second switching element receives the second pulse control signal to turn on the second voltage terminal and the spin orbit torque layer 1.
In a preferred embodiment, the apparatus further comprises a control signal processing unit for dividing the input control signal into two pulse control signals before the input current and the magnetic tunnel junction are turned on by the first switching element in response to the first pulse control signal, wherein the pulse control signal input to the magnetic tunnel junction is the first pulse control signal, and the pulse control signal input to the spin orbit torque layer 1 is delayed according to a preset time interval to obtain the second pulse control signal.
Since the principle of solving the problem of the magnetic random access memory cell is similar to the above method, the implementation of the magnetic random access memory cell can refer to the implementation of the method, and is not described herein again.
Example 2
In this embodiment, unlike embodiment 1, the magnetic random access memory unit of this embodiment includes a spin orbit torque layer 1 and a plurality of magnetic tunnel junctions fixed to the spin orbit torque layer 1, and the plurality of magnetic tunnel junctions form a magnetic tunnel junction array. When writing data to one or more of the magnetic tunnel junction arrays, a selection voltage is input to a magnetic tunnel junction to which data is to be written among the plurality of magnetic tunnel junctions, similarly to embodiment 1. And then inputting a write current to the spin orbit torque layer 1 at preset time intervals to enable the resistance state of the magnetic tunnel junction to correspond to data to be written, wherein the write current is smaller than the critical switching current of the magnetic tunnel junction and larger than the critical switching current of the magnetic tunnel junction when the selection voltage is input. And finally, sequentially stopping inputting the selection voltage and the writing current.
In this embodiment, the critical switching current of one or more magnetic tunnel junctions to be written is first reduced by selecting a voltage, and the write current is then input after a predetermined time interval. The write current is smaller than the critical switching current of the magnetic tunnel junction and larger than the critical switching current of the magnetic tunnel junction when the selection voltage is input. The magnetic tunnel junctions without input of the selection voltage are not affected by the spin orbit torque generated by the spin orbit torque layer 1 when the write current is input, the direction of the magnetic torque of the free layer 2 is not changed, batch writing of one or more magnetic tunnel junctions with input of the selection voltage is realized without affecting the storage state of other magnetic tunnel junctions, the write efficiency and the accuracy of write data are improved, the power consumption is reduced, and in addition, the plurality of magnetic tunnel junctions are integrated on one spin orbit torque layer 1, so that the storage density of the memory can be improved.
In a preferred embodiment, control of the spin orbit torque layer 1 and the multiple magnetic tunnel junction input currents is achieved. In order to realize the input of the selection voltage of each magnetic tunnel junction, similarly to embodiment 1, a first voltage terminal and a first switching element are provided corresponding to each magnetic tunnel junction, respectively, and the first switching element of each magnetic tunnel junction can turn on the first voltage terminal and the magnetic tunnel junction in response to the first pulse control signal to form the selection voltageA magnetic tunnel junction is input. For example, in a specific example, as shown in FIG. 8, n magnetic tunnel junctions (M) are provided on the spin orbit torque layer 11、M2…Mn) Magnetic tunnel junction M1、M2…MnRespectively through a triode Q1、Q2…QnAnd a first voltage terminal VGConnected to supply voltages (V) forming the selection voltages to the magnetic tunnel junctions, respectively1、V2…Vn). To triode Q1、Q2…QnControl terminal (BL)1、BL1…BLn) May achieve a critical switching current reduction of the corresponding magnetic tunnel junction. Further to the second triode QIA second triode Q for inputting a second pulse control signalIThe control terminal of the switching element is turned on in response to the second pulse control signal to form a write current to be input to the spin orbit torque layer 1, so that the resistance state change of the magnetic tunnel junction of the input selection voltage can be realized, and the data writing is completed.
As shown in fig. 9, when it is directed to the magnetic tunnel junction M2When writing data, pass V2Forming a select voltage input magnetic tunnel junction M2Then a positive or negative write current I is inputSOTMake the magnetic tunnel junction M2The resistance state of the data writing circuit is changed into a high resistance state or a low resistance state which respectively corresponds to a digital 1 or 0, and data writing is realized. In this process, the magnetic tunnel junction M1And a magnetic tunnel junction MnResistance R of1And RnWithout any change, the magnetic random access memory unit of the invention can integrate a plurality of magnetic tunnel junctions on one spin orbit torque layer 1, the data writing of each magnetic tunnel junction does not affect other magnetic tunnel junctions, and the simultaneous data writing of a plurality of magnetic tunnel junctions can be realized.
Other technical features of the magnetic random access memory cell and the data writing method of the magnetic random access memory cell of this embodiment are similar to those of embodiment 1, and are not described herein again.
It should be noted that the magnetic storage cell structures in the above embodiments 1 and 2 may be storage cell structures in the memory field such as a conventional data storage cell structure and other computer storage media, or storage cell structures with logic processing functions outside the memory field based on the present principles, such as a processor, a logic gate, and a memory calculation, and the like, and are within the protection scope of the present invention.
The systems, devices, modules or units illustrated in the above embodiments may be implemented by a computer chip or an entity, or by a product with certain functions. A typical implementation device is a computer device, which may be, for example, a personal computer, a laptop computer, a cellular telephone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.
In a typical example, the computer device specifically comprises a memory, a processor and a computer program stored on the memory and executable on the processor, which when executed by the processor implements the method as described in the above embodiments.
Referring now to FIG. 10, shown is a schematic diagram of a computer device 600 suitable for use in implementing embodiments of the present application.
As shown in fig. 10, the computer apparatus 600 includes a Central Processing Unit (CPU)601 which can perform various appropriate works and processes according to a program stored in a Read Only Memory (ROM)602 or a program loaded from a storage section 608 into a Random Access Memory (RAM)) 603. In the RAM603, various programs and data necessary for the operation of the system 600 are also stored. The CPU601, ROM602, and RAM603 are connected to each other via a bus 604. An input/output (I/O) interface 605 is also connected to bus 604.
The following components are connected to the I/O interface 605: an input portion 606 including a keyboard, a mouse, and the like; an output section 607 including a Cathode Ray Tube (CRT), a liquid crystal feedback (LCD), and the like, and a speaker and the like; a storage section 608 including a hard disk and the like; and a communication section 609 including a network interface card such as a LAN card, a modem, or the like. The communication section 609 performs communication processing via a network such as the internet. The driver 610 is also connected to the I/O interface 606 as needed. A removable medium 611 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, or the like is mounted on the drive 610 as necessary, so that a computer program read out therefrom is mounted as necessary on the storage section 608.
In particular, according to an embodiment of the present invention, the processes described above with reference to the flowcharts may be implemented as computer software programs. For example, embodiments of the invention include a computer program product comprising a computer program tangibly embodied on a machine-readable medium, the computer program comprising program code for performing the method illustrated in the flow chart. In such an embodiment, the computer program may be downloaded and installed from a network through the communication section 609, and/or installed from the removable medium 611.
Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), Digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, a computer readable medium does not include a transitory computer readable medium such as a modulated data signal and a carrier wave.
For convenience of description, the above devices are described as being divided into various units by function, and are described separately. Of course, the functionality of the units may be implemented in one or more software and/or hardware when implementing the present application.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The application may be described in the general context of computer-executable instructions, such as program modules, being executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform particular tasks or implement particular abstract data types. The application may also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules may be located in both local and remote computer storage media including memory storage devices.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the system embodiment, since it is substantially similar to the method embodiment, the description is simple, and for the relevant points, reference may be made to the partial description of the method embodiment.
The above description is only an example of the present application and is not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

Claims (14)

1. A method of writing data to a magnetic random access memory cell, the magnetic random access memory cell comprising a spin torque-on-orbit layer and at least one magnetic tunnel junction disposed on the spin torque-on-orbit layer, the method comprising:
inputting a selection voltage to a magnetic tunnel junction to which data is to be written in the at least one magnetic tunnel junction;
inputting a write current to the spin orbit torque layer at a preset time interval so that the resistance state of the magnetic tunnel junction corresponds to data to be written, wherein the write current is smaller than the critical switching current of the magnetic tunnel junction and larger than the critical switching current of the magnetic tunnel junction when the selection voltage is input;
sequentially stopping inputting the selection voltage and the write current.
2. The method of claim 1, wherein the predetermined time interval is less than 4 ns.
3. The method of claim 1, wherein a selection voltage is input to a magnetic tunnel junction to which data is to be written in the at least one magnetic tunnel junction, and the selection voltage specifically comprises:
the first voltage terminal and the magnetic tunnel junction are turned on in response to a first pulse control signal to form a selection voltage and input to the magnetic tunnel junction.
4. The method of claim 3, wherein inputting a write current to the spin torque layer to make the resistance state of the magnetic tunnel junction correspond to data to be written after a predetermined time interval comprises:
and responding to a second pulse control signal to conduct a second voltage end and the spin orbit torque layer to form a write current and input the write current into the spin orbit torque layer, wherein the input time interval of the first pulse control signal and the second pulse control signal is the preset time interval, and the stop time of the first pulse control signal is before the stop time of the second pulse control signal.
5. The method of claim 4, further comprising, prior to turning on the input current and the magnetic tunnel junction by the first switching element in response to the first pulse control signal:
the input control signal is divided to obtain two pulse control signals, wherein the pulse control signal input into the magnetic tunnel junction is a first pulse control signal;
and delaying the pulse control signal input into the spin orbit torque layer according to a preset time interval to obtain the second pulse control signal.
6. A magnetic random access memory cell comprising a spin-orbit torque layer and at least one magnetic tunnel junction disposed on the spin-orbit torque layer;
further comprising:
the selection voltage control module is used for inputting and stopping inputting selection voltage to the magnetic tunnel junction of the data to be written in the at least one magnetic tunnel junction;
and the write current control module is used for inputting write current to the spin orbit torque layer at preset time intervals so as to enable the resistance state of the magnetic tunnel junction to correspond to data to be written, wherein the write current is smaller than the critical switching current of the magnetic tunnel junction and larger than the critical switching current of the magnetic tunnel junction when the selection voltage is input, and the write current is stopped being input after the selection voltage is stopped being input.
7. The magnetic random access memory cell of claim 6 wherein the predetermined time interval is less than 4 ns.
8. The MRAM cell of claim 6, wherein the selection voltage control module is specifically configured to turn on the first voltage terminal and the magnetic tunnel junction to form the selection voltage in response to a first pulse control signal and input the selection voltage to the magnetic tunnel junction.
9. The MRAM cell of claim 8, wherein the selection voltage control module comprises a first switching element having a first terminal coupled to a first voltage terminal and a second terminal electrically coupled to the MTJ, and a control terminal coupled to receive the first pulse control signal to turn on the first voltage terminal and the MTJ.
10. The MRAM cell of claim 8, wherein the write current control module is specifically configured to turn on a second voltage terminal and a spin-orbit torque layer through a second switch element in response to a second pulse control signal to form a write current and input the write current to the spin-orbit torque layer, wherein an input time interval of the first pulse control signal and the second pulse control signal is the preset time interval, and a stop time of the first pulse control signal is before a stop time of the second pulse control signal.
11. The MRAM cell of claim 10, wherein the write current control module comprises a second switch element, a first terminal of the second switch element is connected to a second voltage terminal, a second terminal of the second switch element is electrically connected to the spin-orbit torque layer, and a control terminal of the second switch element receives the second pulse control signal to turn on the second voltage terminal and the spin-orbit torque layer.
12. The magnetic random access memory cell of claim 10, further comprising a control signal processing unit for dividing the input control signal into two pulse control signals before the input current and the magnetic tunnel junction are turned on by the first switching element in response to the first pulse control signal, wherein the pulse control signal input to the magnetic tunnel junction is the first pulse control signal, and the pulse control signal input to the spin orbit torque layer is delayed according to a preset time interval to obtain the second pulse control signal.
13. A computer device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor,
the processor, when executing the program, implements the method of any of claims 1-5.
14. A computer-readable medium, having stored thereon a computer program,
the program when executed by a processor implementing the method according to any one of claims 1-5.
CN202010218365.7A 2020-03-25 2020-03-25 Magnetic random access memory cell and data writing method thereof Active CN111540395B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010218365.7A CN111540395B (en) 2020-03-25 2020-03-25 Magnetic random access memory cell and data writing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010218365.7A CN111540395B (en) 2020-03-25 2020-03-25 Magnetic random access memory cell and data writing method thereof

Publications (2)

Publication Number Publication Date
CN111540395A true CN111540395A (en) 2020-08-14
CN111540395B CN111540395B (en) 2022-11-01

Family

ID=71969185

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010218365.7A Active CN111540395B (en) 2020-03-25 2020-03-25 Magnetic random access memory cell and data writing method thereof

Country Status (1)

Country Link
CN (1) CN111540395B (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113451505A (en) * 2021-02-25 2021-09-28 北京航空航天大学 Magnetic random access memory cell, memory and device
CN113450850A (en) * 2021-02-10 2021-09-28 北京航空航天大学 Magnetic storage unit, data writing method, memory and equipment
CN113450851A (en) * 2021-03-08 2021-09-28 北京航空航天大学 Multi-bit memory cell, analog-to-digital converter, apparatus and method
CN113782078A (en) * 2021-09-18 2021-12-10 北京航空航天大学 Data processing method and device based on magnetic tunnel junction
CN113889163A (en) * 2021-12-07 2022-01-04 北京芯可鉴科技有限公司 Random magnetic tunnel junction device with controllable turnover probability and application method
WO2023044813A1 (en) * 2021-09-24 2023-03-30 华为技术有限公司 Computing circuit and electronic device
US11963462B2 (en) 2022-03-18 2024-04-16 Honeywell International Inc. Magneto-resistive random access memory magnetic tunnel junction and cell with voltage-controlled writing

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090010087A1 (en) * 2007-07-02 2009-01-08 Industrial Technology Research Institute Data write in control circuit for toggle magnetic random access memory
US20120155153A1 (en) * 2009-07-08 2012-06-21 Alexander Mikhailovich Shukh Scalable Magnetic Memory Cell With Reduced Write Current
JP2013149343A (en) * 2013-04-19 2013-08-01 Hitachi Ltd Semiconductor device
CN104393169A (en) * 2014-10-10 2015-03-04 北京航空航天大学 Spin-orbit torque magnetic random access memory (SOT-MRAM) without external magnetic field
US20170365777A1 (en) * 2016-06-17 2017-12-21 HGST Netherlands B.V. Sot mram cell with perpendicular free layer and its cross-point array realization
CN109087995A (en) * 2017-06-14 2018-12-25 中电海康集团有限公司 Perpendicular magnetization MTJ device and STT-MRAM
CN109300495A (en) * 2018-09-18 2019-02-01 西安交通大学 Magnetic texure and SOT-MRAM based on artificial antiferromagnetic free layer
US20190057731A1 (en) * 2016-02-25 2019-02-21 Agency For Science, Technology And Research Circuit arrangement, method of forming and operating the same
CN110447074A (en) * 2017-04-11 2019-11-12 闪迪技术有限公司 Spin(-)orbit torque MRAM memory cell with enhancing thermal stability

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090010087A1 (en) * 2007-07-02 2009-01-08 Industrial Technology Research Institute Data write in control circuit for toggle magnetic random access memory
US20120155153A1 (en) * 2009-07-08 2012-06-21 Alexander Mikhailovich Shukh Scalable Magnetic Memory Cell With Reduced Write Current
JP2013149343A (en) * 2013-04-19 2013-08-01 Hitachi Ltd Semiconductor device
CN104393169A (en) * 2014-10-10 2015-03-04 北京航空航天大学 Spin-orbit torque magnetic random access memory (SOT-MRAM) without external magnetic field
US20190057731A1 (en) * 2016-02-25 2019-02-21 Agency For Science, Technology And Research Circuit arrangement, method of forming and operating the same
US20170365777A1 (en) * 2016-06-17 2017-12-21 HGST Netherlands B.V. Sot mram cell with perpendicular free layer and its cross-point array realization
CN110447074A (en) * 2017-04-11 2019-11-12 闪迪技术有限公司 Spin(-)orbit torque MRAM memory cell with enhancing thermal stability
CN109087995A (en) * 2017-06-14 2018-12-25 中电海康集团有限公司 Perpendicular magnetization MTJ device and STT-MRAM
CN109300495A (en) * 2018-09-18 2019-02-01 西安交通大学 Magnetic texure and SOT-MRAM based on artificial antiferromagnetic free layer

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113450850A (en) * 2021-02-10 2021-09-28 北京航空航天大学 Magnetic storage unit, data writing method, memory and equipment
CN113451505A (en) * 2021-02-25 2021-09-28 北京航空航天大学 Magnetic random access memory cell, memory and device
CN113451505B (en) * 2021-02-25 2023-07-07 北京航空航天大学 Magnetic random access memory cell, memory and device
CN113450851A (en) * 2021-03-08 2021-09-28 北京航空航天大学 Multi-bit memory cell, analog-to-digital converter, apparatus and method
CN113450851B (en) * 2021-03-08 2022-08-12 北京航空航天大学 Multi-bit memory cell, analog-to-digital converter, apparatus and method
US11832530B2 (en) 2021-03-08 2023-11-28 Beihang University Multi-bit memory cell, analog-to-digital converter, device and method
CN113782078A (en) * 2021-09-18 2021-12-10 北京航空航天大学 Data processing method and device based on magnetic tunnel junction
CN113782078B (en) * 2021-09-18 2023-10-10 北京航空航天大学 Data processing method and device based on magnetic tunnel junction
WO2023044813A1 (en) * 2021-09-24 2023-03-30 华为技术有限公司 Computing circuit and electronic device
CN113889163A (en) * 2021-12-07 2022-01-04 北京芯可鉴科技有限公司 Random magnetic tunnel junction device with controllable turnover probability and application method
CN113889163B (en) * 2021-12-07 2022-03-01 北京芯可鉴科技有限公司 Random magnetic tunnel junction device with controllable turnover probability and application method
US11963462B2 (en) 2022-03-18 2024-04-16 Honeywell International Inc. Magneto-resistive random access memory magnetic tunnel junction and cell with voltage-controlled writing

Also Published As

Publication number Publication date
CN111540395B (en) 2022-11-01

Similar Documents

Publication Publication Date Title
CN111540395B (en) Magnetic random access memory cell and data writing method thereof
US9536583B2 (en) Magnetic memory, spin element, and spin MOS transistor
KR102543879B1 (en) Magnetic junctions programmable using spin-orbit interaction torque in the absence of an external magnetic field
US7839675B2 (en) Magnetic memory device and method for reading magnetic memory cell using spin hall effect
US9466363B2 (en) Integrated circuit
Garello et al. Spin-orbit torque MRAM for ultrafast embedded memories: From fundamentals to large scale technology integration
US9147456B2 (en) Magnetic random access memory using magnetoresistive element, diode, and transistor
GB2539102A (en) Voltage-controlled magnetic anisotropy switching device using an external ferromagnetic biasing film
US20130070513A1 (en) Method and apparatus for direct backup of memory circuits
US10910029B2 (en) Complementary magnetic memory cell
Portal et al. An overview of non-volatile flip-flops based on emerging memory technologies
CN113451356B (en) Magnetic random access memory cell, memory and apparatus
US10522739B2 (en) Perpendicular magnetic memory with reduced switching current
US20180254077A1 (en) Self-aligned memory array
CN110797371B (en) Magnetic memory, data storage device and control method
US10839879B2 (en) Read techniques for a magnetic tunnel junction (MTJ) memory device with a current mirror
WO2021189295A1 (en) Magnetic random access memory and data writing method therefor
CN112951302A (en) Nonvolatile memory cell, memory and device
CN113451502B (en) Multi-functional magnetic random access memory cell, method, memory and apparatus
KR20210086715A (en) vertical decoder
CN113380287B (en) Magnetic memory cell structure and data writing method thereof
CN113451505A (en) Magnetic random access memory cell, memory and device
Wei et al. Ge-based non-volatile memories
Sverdlov et al. CMOS technology compatible magnetic memories
CN113451503B (en) Multifunctional magnetic random access memory unit, memory and equipment

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant