CN111519148B - Sputtering method of semiconductor chip - Google Patents
Sputtering method of semiconductor chip Download PDFInfo
- Publication number
- CN111519148B CN111519148B CN202010251217.5A CN202010251217A CN111519148B CN 111519148 B CN111519148 B CN 111519148B CN 202010251217 A CN202010251217 A CN 202010251217A CN 111519148 B CN111519148 B CN 111519148B
- Authority
- CN
- China
- Prior art keywords
- semiconductor chip
- frame
- base
- covering
- middle frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/04—Coating on selected surface areas, e.g. using masks
- C23C14/042—Coating on selected surface areas, e.g. using masks using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
- H01L21/67333—Trays for chips
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physical Vapour Deposition (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The invention relates to a sputtering method of a semiconductor chip, in particular to a semiconductor chip which is specially shaped and needs selective area sputtering, the semiconductor chip is fixed by matching a base, a rubber frame and a middle frame, and a protective area is shielded by covering rubber, so that a non-sputtering area can be protected, and NG products are avoided; the center can avoid gluing the frame and covering the gluey connection and too closely lead to taking out inconveniently, conveniently separately tears glue to can make things convenient for once only to tear the gluey frame of making monoblock double faced adhesive tape from the base, can also make things convenient for semiconductor chip's clamping and take out, keep apart the non-sputtering region of semiconductor chip side, can also reduce the cost, can change the center according to the semiconductor chip of different models, different shapes.
Description
Technical Field
The invention relates to the technical field of semiconductor chip sputtering, in particular to a sputtering method of a semiconductor chip.
Background
For the sputtering process of the semiconductor chip, the prior art is generally only suitable for the conventional semiconductor chip, the shape of the semiconductor chip is regular, the shape of the sputtering area is generally a whole surface, the shape is irregular along with the development of the technology, one surface on the same side is provided with both the sputtering area and the non-sputtering area (protection area) needing to be protected, the prior art cannot well process the semiconductor chip with the irregular shape and needing selective area sputtering, the process is complex, the processing is troublesome, and the NG rate is high.
Disclosure of Invention
In view of the above-mentioned situation, it is necessary to provide a sputtering method for a semiconductor chip suitable for irregular shapes and requiring selective area sputtering.
In order to solve the technical problems, the invention adopts the technical scheme that: a sputtering method of a semiconductor chip comprises the following steps:
A. attaching a glue frame made of double-sided glue to a base, and forming a plurality of frame openings on the base;
B. attaching a middle frame to one side, back to the base, of the rubber frame, wherein a frame hole of the middle frame is matched with the semiconductor chip and is larger than the frame opening, and a circle of double-sided adhesive tape is exposed in the frame hole of the middle frame;
C. flattening the middle frame;
D. attaching a semiconductor chip in the frame hole of the middle frame;
E. adhering covering glue to a protection area of one surface of each semiconductor chip, which is opposite to the base, and flattening;
F. sputtering is performed.
Further, the method also comprises the following steps:
G. tearing off the covering glue;
H. taking the semiconductor chip out of the base;
I. and loading the semiconductor chip into a material tray.
Furthermore, the base is provided with a plurality of through holes, and the rubber frame is attached between the through holes to form the frame opening; and in the step H, the semiconductor chip is ejected out of the through hole through the ejector pin.
Furthermore, in the step H, the ejector pins eject the semiconductor chip and simultaneously suck the semiconductor chip from one surface of the semiconductor chip, which is back to the ejector pins, through the vacuum chuck.
Further, the frame opening array is provided with a plurality of frame openings.
Further, the rubber frame which is a whole block in the step A covers the base.
Further, semiconductor chip dorsad the four corners of the one side of base is equipped with the recess, the protection zone is located in the recess, step E cover the gluey laminating and be in the recess and level the parallel and level through pressing the convex body at semiconductor chip's middle part.
Furthermore, in the step B, the height of the middle frame is parallel to the bottom of the groove, so that the adjacent grooves are connected to form a large groove, and the covering glue is matched with the large groove.
Further, in the step B, the covering glue is matched with a large groove formed between adjacent grooves, and the covering glue is provided with a avoiding groove matched with the middle frame in the large groove.
Furthermore, notches are formed in the middle frames on two sides of the semiconductor chip.
The invention has the beneficial effects that: the semiconductor chip is fixed by the matching of the base, the rubber frame and the middle frame, and the protective area is shielded by the covering rubber, so that the non-sputtering area can be protected, and NG products are avoided; the center can avoid gluing the frame and covering the gluey connection and too closely lead to taking out inconveniently, conveniently separately tears glue to can make things convenient for once only to tear the gluey frame of making monoblock double faced adhesive tape from the base, can also make things convenient for semiconductor chip's clamping and take out, keep apart the non-sputtering region of semiconductor chip side, can also reduce the cost, can change the center according to the semiconductor chip of different models, different shapes.
Drawings
FIG. 1 is a schematic process flow diagram of a sputtering method for a semiconductor chip according to an embodiment of the present invention;
FIG. 2 is a schematic process flow diagram illustrating another exemplary sputtering method for a semiconductor chip according to the present invention;
FIG. 3 is a schematic structural diagram illustrating a sputtering method for a semiconductor chip according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of an explosion structure of a base, a rubber frame, a middle frame, a semiconductor chip and a cover rubber of the sputtering method for a semiconductor chip according to an embodiment of the present invention;
FIG. 5 is a schematic structural diagram of a pedestal of a sputtering method for a semiconductor chip according to an embodiment of the present invention;
FIG. 6 is a schematic structural diagram of a base, a rubber frame, a middle frame, a semiconductor chip and a cover rubber of the sputtering method for a semiconductor chip according to an embodiment of the present invention;
FIG. 7 is a schematic structural diagram of an intermediate pressure plate of a sputtering method for a semiconductor chip according to an embodiment of the present invention;
FIG. 8 is a schematic structural diagram of an outer pressing plate of a sputtering method for semiconductor chips according to an embodiment of the present invention;
description of reference numerals:
100. a base; 110. a through hole; 120. an exhaust groove; 130. a first air hole; 200. a rubber frame;
210. a frame opening; 220. a second air hole; 300. a middle frame; 310. a frame hole; 320. notching;
330. a third air hole; 400. a semiconductor chip; 410. a groove; 411. a large groove; 420. a convex body;
500. covering glue; 600. a thimble; 610. a needle head; 700. a vacuum chuck; 800. a middle frame pressing plate;
810. a rib is protruded; 900. an outer pressing plate; 910. and a fourth air hole.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, a sputtering method for a semiconductor chip according to the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Referring to fig. 1-8, a sputtering method of a semiconductor chip 400 includes the following steps:
A. attaching a rubber frame 200 made of double-sided adhesive to the base 100, and forming a plurality of frame openings 210 on the base 100;
B. attaching the middle frame 300 to the side of the rubber frame 200 opposite to the base 100, wherein the frame hole 310 of the middle frame 300 is matched with the semiconductor chip 400 and is larger than the frame opening 210, so that a circle of double-sided adhesive tape is exposed in the frame hole 310 of the middle frame 300;
C. flattening the middle frame 300;
D. bonding the semiconductor chip 400 in the frame hole 310 of the middle frame 300;
E. adhering a covering adhesive 500 to the protection area of the surface of each semiconductor chip 400, which is opposite to the base 100, and flattening;
F. sputtering is performed.
The semiconductor chip 400 is fixed by the matching of the base 100, the rubber frame 200 and the middle frame 300, and the protective area is shielded by the covering rubber 500, so that the non-sputtering area can be protected, and NG products are avoided; the middle frame 300 can avoid the glue frame 200 from being connected with the covering glue 500 too closely to cause the inconvenience of taking out, conveniently and separately tear glue, and can conveniently tear the glue frame 200 made of the whole piece of double faced adhesive tape from the base 100 at one time, can also make things convenient for the clamping of semiconductor chip 400 and take out, keep apart the non-sputtering region of semiconductor chip 400 side, can also reduce the cost, can change the middle frame 300 according to the semiconductor chip 400 of different models, different shapes.
Further, the method also comprises the following steps:
G. tearing off the covering glue 500;
H. taking the semiconductor chip 400 out of the base 100;
I. the semiconductor chips 400 are loaded into the tray.
The tearing-off covering glue 500 can be manually torn off or can be torn off by adopting automatic equipment. Simply, the covering adhesive 500 may also be a double-sided adhesive.
The removal of the semiconductor chip 400 from the base 100 is generally performed by automated equipment, and may alternatively be performed manually, but it is necessary to ensure cleanliness. Particularly, the base 100 is provided with a plurality of through holes 110, and the rubber frame 200 is attached between the through holes 110 to form a frame opening 210; in step H, the semiconductor chip 400 is ejected from the through-hole 110 by the ejector pins 600. The semiconductor chip 400 can be conveniently taken out, and the influence on other semiconductor chips 400 caused by tearing the double faced adhesive tape horizontally when the semiconductor chip 400 is taken out is avoided.
Referring to fig. 3, in step H, the ejector pins 600 eject the semiconductor chip 400 and simultaneously suck the semiconductor chip 400 from the side of the semiconductor chip 400 opposite to the ejector pins 600 by the vacuum chuck 700. The semiconductor chip 400 can be stably taken out, and unnecessary collision of the semiconductor chip 400 with the chassis, the middle frame 300, or the like can be avoided. The needle 610 of the thimble 600 contacting the semiconductor chip 400 is made of a flexible material, and is generally made of rubber or silicone.
Referring to fig. 3 to 7, a plurality of frame openings 210 are provided. The frame openings 210 are arranged in an array, and it can be understood that the semiconductor chips 400 are arranged in the same array, so that the work of automation equipment is facilitated, and the semiconductor chips 400 are convenient to clamp, sputter and take out.
Referring to fig. 4, the base 100 is covered with the one-piece plastic frame 200 in step a. The laminating is convenient with tearing off, and is efficient.
Referring to fig. 4 and 5, the base 100 is provided with an air discharge groove 120, and the rubber frame 200 covers the air discharge groove 120. A first air hole 130 is formed in the air discharge groove 120, a second air hole 220 is formed in the rubber frame 200 to communicate with the first air hole 130, and a third air hole 330 is formed in the middle frame 300 to communicate with the second air hole 220. Avoid appearing the bubble when gluing frame 200, bulging, conveniently keep leveling.
Referring to fig. 3 and 4, grooves 410 are formed at four corners of a surface of the semiconductor chip 400 opposite to the base 100, the protection region is located in the grooves 410, and in step E, the covering glue 500 is attached to the grooves 410 and flattened to level the convex bodies 420 at the middle of the semiconductor chip 400. So that the whole surface can be kept flat and sputtering is convenient. It can be understood that the four grooves 410 at the four corners are not necessarily the same shape, and particularly, the four grooves 410 may form a complete polygon when they are connected, and particularly, the grooves 410 are symmetrically arranged and the grooves 410 at the same side have the same length and width, and particularly, the four grooves 410 have the same width. It will be appreciated that the bosses 420 are approximately cruciform.
Referring to fig. 3, in step B, the height of the middle frame 300 is flush with the bottom of the grooves 410, so that the adjacent grooves 410 are connected to form a large groove 411, and the covering adhesive 500 is matched with the large groove 411. Or, in step B, the covering glue 500 is fitted to the large groove 411 formed between the adjacent grooves 410, and the covering glue 500 has a clearance groove fitted to the middle frame 300 in the large groove 411. The flatness of the whole surface back to the base is conveniently ensured, and sputtering is convenient.
Specifically, the middle frame 300 on both sides of the semiconductor chip 400 is provided with notches 320. The semiconductor chip 400 is conveniently taken out, and the middle frame 300 is conveniently separated from the rubber frame 200.
Example one
Referring to figures 1-8 of the drawings,
A. attaching a whole rubber frame 200 made of double-sided adhesive tape to the base 100, and forming a plurality of frame openings 210 on the base 100; a plurality of through holes 110 are arranged on the base 100 in an array manner, a plurality of exhaust grooves 120 are arranged among the through holes 110 in a criss-cross manner, and first air holes 130 are arranged at the junctions of the exhaust grooves 120; the rubber frame 200 is provided with a plurality of frame openings 210 surrounding the through holes 110 and second air holes 220 communicated with the first air holes 130;
B. attaching the middle frame 300 to the side of the rubber frame 200, which faces away from the base 100, wherein the height of the middle frame 300 is flush with the bottoms of the grooves 410 of the semiconductor chip 400, so that the adjacent grooves 410 are connected to form a large groove 411, and the frame hole 310 of the middle frame 300 is matched with the semiconductor chip 400 and is larger than the frame opening 210, so that a circle of the rubber frame 200 is exposed in the frame hole 310 of the middle frame 300; the middle frame 300 is provided with a third air hole 330 communicated with the first air hole 130 and the second air hole 220, and notches 320 which are opposite to each other and are convenient for the semiconductor chip 400 to be taken out and are arranged at two sides of the frame opening 210;
C. flattening the middle frame 300 by using the middle frame pressing plate 800; the middle frame pressing plate 800 is provided with a convex rib 810 which avoids the semiconductor chip 400 and the covering glue 500 and is matched with the middle frame 300;
D. bonding the semiconductor chip 400 in the frame hole 310 of the middle frame 300; generally, vacuum suction claws are adopted for pasting and are matched with a CCD camera for positioning;
E. attaching a covering adhesive 500 to a protection area in the groove 410 on the surface of each semiconductor chip 400 facing away from the base 100, and flattening the protection area by pressing an outer pressing plate 900 to make the covering adhesive 500 flush with the convex body 420 in the middle of the semiconductor chip 400; the outer pressing plate 900 is provided with a fourth air hole 910 communicated with the first air hole 130, the second air hole 220 and the third air hole 330;
F. sputtering is carried out;
G. tearing off the covering glue 500;
H. the ejector pins 600 abut against the semiconductor chip 400 from the through holes 110, and simultaneously the vacuum chuck 700 sucks the semiconductor chip 400 from the other surface back to the base 100, so that the semiconductor chip 400 is taken out from the base 100 by vertical synchronous combination;
I. the semiconductor chips 400 are loaded into the tray.
In summary, in the sputtering method for the semiconductor chip provided by the invention, the semiconductor chip is fixed by matching the base, the rubber frame and the middle frame, and the protective area is shielded by the covering rubber, so that the non-sputtering area can be protected, and NG products are avoided; the center can avoid gluing the frame and covering the gluey connection and too closely lead to taking out inconveniently, conveniently separately tears glue to can make things convenient for once only to tear the gluey frame of making monoblock double faced adhesive tape from the base, can also make things convenient for semiconductor chip's clamping and take out, keep apart the non-sputtering region of semiconductor chip side, can also reduce the cost, can change the center according to the semiconductor chip of different models, different shapes.
Although the present invention has been described with reference to a preferred embodiment, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (7)
1. A sputtering method of a semiconductor chip is characterized by comprising the following steps:
A. attaching a rubber frame made of double-sided adhesive to a base, forming a plurality of frame openings on the base, arranging an exhaust groove on the base, covering the rubber frame on the exhaust groove, arranging a first through air hole in the exhaust groove, and arranging a second air hole communicated with the first air hole on the rubber frame;
B. attaching a middle frame to one side, opposite to the base, of the glue frame, wherein the middle frame is provided with a third air hole communicated with the second air hole, and a frame hole of the middle frame is matched with the semiconductor chip and is larger than the frame opening, so that a circle of double-sided glue is exposed in the frame hole of the middle frame;
C. flattening the middle frame;
D. attaching a semiconductor chip in the frame hole of the middle frame;
E. adhering covering glue to a protection area of one surface of each semiconductor chip, which is opposite to the base, and flattening;
F. sputtering is carried out;
G. tearing off the covering glue;
H. taking the semiconductor chip out of the base, wherein the base is provided with a plurality of through holes, the rubber frame is attached among the through holes to form the frame opening, the semiconductor chip is ejected out of the through holes through ejector pins, and the ejector pins synchronously suck the semiconductor chip from one side of the semiconductor chip, which is back to the ejector pins, through vacuum chucks while ejecting the semiconductor chip;
I. and loading the semiconductor chips into a material tray.
2. The method as claimed in claim 1, wherein the frame array is provided in plurality.
3. The method as claimed in claim 1, wherein the step a is performed by covering the base with the whole plastic frame.
4. The method as claimed in claim 1, wherein four corners of a surface of the semiconductor chip facing away from the base are provided with grooves, the protection regions are located in the grooves, and in the step E, the covering glue is attached to the grooves and flattened to level the protrusions at the middle of the semiconductor chip.
5. The method as claimed in claim 4, wherein in step B, the height of the middle frame is flush with the bottom of the groove, so that adjacent grooves are connected to form a large groove, and the covering glue is adapted to the large groove.
6. The method as claimed in claim 4, wherein in the step B, the covering glue is adapted to a large groove formed between adjacent grooves, and the covering glue has a space avoiding groove adapted to the middle frame in the large groove.
7. The method as claimed in claim 1, wherein notches are formed in the middle frames at both sides of the semiconductor chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2020/084906 WO2021196291A1 (en) | 2020-03-23 | 2020-04-15 | Sputtering method for semiconductor chip |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010209812 | 2020-03-23 | ||
| CN2020102098122 | 2020-03-23 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111519148A CN111519148A (en) | 2020-08-11 |
| CN111519148B true CN111519148B (en) | 2021-11-16 |
Family
ID=71901477
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010251217.5A Active CN111519148B (en) | 2020-03-23 | 2020-04-01 | Sputtering method of semiconductor chip |
| CN202010250548.7A Active CN111519136B (en) | 2020-03-23 | 2020-04-01 | Sputtering jig for semiconductor chip |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010250548.7A Active CN111519136B (en) | 2020-03-23 | 2020-04-01 | Sputtering jig for semiconductor chip |
Country Status (2)
| Country | Link |
|---|---|
| CN (2) | CN111519148B (en) |
| WO (1) | WO2021196291A1 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111519148B (en) * | 2020-03-23 | 2021-11-16 | 深圳市海铭德科技有限公司 | Sputtering method of semiconductor chip |
| CN114045461A (en) * | 2021-10-29 | 2022-02-15 | 立讯电子科技（昆山）有限公司 | Semiconductor chip product, local sputtering jig thereof and local sputtering method |
| CN114427077B (en) * | 2021-12-23 | 2023-08-15 | 青岛歌尔智能传感器有限公司 | Selective sputtering method and electronic product thereof |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5744214A (en) * | 1997-01-30 | 1998-04-28 | International Business Machines Corporation | Corrosion resistant molybdenum mask |
| JP2001234327A (en) * | 2000-02-18 | 2001-08-31 | Murata Mfg Co Ltd | Jig for sputtering |
| US20090134016A1 (en) * | 2007-11-28 | 2009-05-28 | International Business Machines Corporation | Underbump metallurgy employing sputter-deposited nickel titanium copper alloy |
| CN205046191U (en) * | 2015-10-21 | 2016-02-24 | 丰盛印刷（苏州）有限公司 | Chip sputter tool |
| CN105154824B (en) * | 2015-10-21 | 2018-02-16 | 丰盛印刷（苏州）有限公司 | Chip sputtering jig and method for sputtering |
| CN207685335U (en) * | 2017-11-02 | 2018-08-03 | 丰盛印刷（苏州）有限公司 | Chip sputtering jig |
| CN107779819A (en) * | 2017-11-02 | 2018-03-09 | 丰盛印刷（苏州）有限公司 | Chip sputtering jig and method for sputtering |
| US20190353467A1 (en) * | 2018-05-17 | 2019-11-21 | Lawrence Livermore National Security, Llc | Low cost chip slapper detonator |
| CN109913827A (en) * | 2019-03-29 | 2019-06-21 | 太湖金张科技股份有限公司 | A kind of sputtering process protective device and its application method |
| CN110699662B (en) * | 2019-10-21 | 2022-05-27 | 江苏菲沃泰纳米科技股份有限公司 | Film coating method and film layer thereof |
| CN111519148B (en) * | 2020-03-23 | 2021-11-16 | 深圳市海铭德科技有限公司 | Sputtering method of semiconductor chip |
-
2020
- 2020-04-01 CN CN202010251217.5A patent/CN111519148B/en active Active
- 2020-04-01 CN CN202010250548.7A patent/CN111519136B/en active Active
- 2020-04-15 WO PCT/CN2020/084906 patent/WO2021196291A1/en active Application Filing
Also Published As
| Publication number | Publication date |
|---|---|
| CN111519136B (en) | 2021-11-16 |
| CN111519136A (en) | 2020-08-11 |
| CN111519148A (en) | 2020-08-11 |
| WO2021196291A1 (en) | 2021-10-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN111519148B (en) | Sputtering method of semiconductor chip | |
| EP1601005A2 (en) | Peeling device for chip detachment | |
| CN101772835B (en) | Work carrying method and device having work transfer mechanism | |
| US20120145332A1 (en) | System for separating a diced semiconductor die from a die attach tape | |
| US7803641B2 (en) | Mold structure for packaging LED chips and method thereof | |
| US20060137828A1 (en) | Die pickup apparatus | |
| CN107424977B (en) | Smart card strip clamp plate and have its chip packaging system | |
| KR20040012519A (en) | Film bonding apparatus and film bonding method | |
| CN111411331B (en) | Jig splicing structure for chip coating process | |
| JP6647604B1 (en) | Rock fasteners | |
| CN211165331U (en) | Screen-pasting pressure-maintaining jig | |
| CN217693885U (en) | Camera module FPC paster fixing jig | |
| CN212580457U (en) | Partition board | |
| CN211197211U (en) | Improved chip packaging tape | |
| CN210311274U (en) | Circuit board transfer disc for preventing scratching board damage | |
| CN219259971U (en) | Gene sequencing chip and gene sequencing chip assembly equipment | |
| CN214612266U (en) | Easy-to-detach glue | |
| JPH0624481A (en) | Electronic part holding tray | |
| CN216597577U (en) | Carrier plate for chip packaging | |
| CN219642800U (en) | Semiconductor packaging material box | |
| CN216450603U (en) | Novel LED full-automatic die bonder rubber disc and LED full-automatic die bonder | |
| CN210777621U (en) | Small-sized screen structure | |
| CN213566671U (en) | Pad pasting subassembly | |
| KR100259365B1 (en) | Carrier method of semiconductor device and its apparatus | |
| KR20090026611A (en) | Equipment for pick up of semiconductor chip and method for pick up of semiconductor chip using the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |