CN111488295B - Data processing method and device and computer storage medium - Google Patents
Data processing method and device and computer storage medium Download PDFInfo
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
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Abstract
The application discloses a data processing method and device and a computer storage medium, wherein the data processing method comprises the following steps: acquiring first-class target data and second-class target data; wherein the data volume of the first type of target data is larger than the data volume of the second type of target data; caching the first type of target data and storing the second type of target data in an external memory; and when the set condition is met, the cached first type target data is stored in the external memory. Through the mode, waste of resources of the built-in RAM is reduced, cost is reduced, data storage is more reasonable, processing time is shortened, and processing efficiency of equipment is improved.
Description
Technical Field
The present invention relates to the field of data processing technologies, and in particular, to a data processing method and apparatus, and a computer storage medium.
Background
In some diagnostic analyzers, there is often a function of detecting various substances. After passing through different detection systems, different substances generate signals with different characteristics, namely, a plurality of substances correspond to a plurality of detection system channels. Because the detection principle, the analysis method and other factors of different objects to be detected are different, the data quantity required to be acquired is also different. Some data needing to be collected are large; some data that need to be collected are small.
The existing method is as follows: storing the data with small data amount into RAM (Random Access Memory ) memory in the processor; and storing the data with large collected data quantity into an external memory. There are two disadvantages to this approach: the method has the defects that firstly, if the data to be processed exceeds the limit of the RAM, a plurality of RAMs are needed to be spliced to obtain a new RAM memory, and the new memory cannot be used for other channels due to the characteristics of the RAMs, so that resources are wasted; the more channels that need to be processed, the more RAM resources are occupied, and the cost of the processor increases.
Disclosure of Invention
In order to solve the problems, the application provides a data processing method and device and a computer storage medium, which can effectively reduce RAM resource waste and further reduce cost.
The technical scheme adopted by the application is to provide a data processing method, which comprises the following steps: acquiring first-class target data and second-class target data; wherein the data volume of the first type of target data is larger than the data volume of the second type of target data; caching the first type of target data and storing the second type of target data in an external memory; and when the set condition is met, the cached first type target data is stored in the external memory.
When the set condition is met, the step of storing the cached first type target data to the external memory comprises the following steps: when the cached data volume is larger than a set threshold, the cached first type target data is stored in the external memory, and the set threshold is 1/2 or 2/3 of the total cached data volume.
When the set condition is met, the step of storing the cached first type target data to the external memory comprises the following steps: and after the second type of target data are all stored in the external memory, storing the cached first type of target data in the external memory.
The step of acquiring the first type of target data and the second type of target data comprises the following steps: collecting first-type pulse data and second-type pulse data; performing analog-to-digital conversion on the first type of pulse data, and processing the analog-to-digital converted data to obtain first type of target data; and performing analog-to-digital conversion on the second type of pulse data, and sampling the analog-to-digital converted data at a set time interval to obtain second type of target data.
The method comprises the steps of performing analog-to-digital conversion on first-class pulse data and processing the analog-to-digital converted data to obtain first-class target data, and comprises the following steps: analog-to-digital conversion is carried out on the first type of pulse data; performing baseline removal processing on the pulse data after analog-to-digital conversion; and carrying out recognition processing on the pulse data subjected to the baseline removal processing to obtain first-class target data.
The step of performing baseline removal processing on the pulse data after analog-to-digital conversion comprises the following steps: and subtracting the corresponding baseline value from the data corresponding to each sampling point in the pulse data after analog-digital conversion to obtain the pulse data after baseline removal.
The step of identifying the pulse data after the baseline removal processing to obtain first-class target data comprises the following steps: and performing recognition processing on the pulse data subjected to the baseline removal processing to obtain pulse peak value data and/or pulse width data serving as first type target data.
Another technical solution adopted by the present application is to provide a data processing apparatus, which includes a processor and a built-in memory coupled to the processor. The built-in memory is used for storing program data, and the processor is used for executing the program data to realize the data processing method.
Another aspect of the present application is to provide a computer storage medium for storing program data, which when executed by a processor, is configured to implement a data processing method as described above.
The beneficial effects of this application are: the data processing method of the present application, unlike the prior art, includes: acquiring first-class target data and second-class target data; wherein the data volume of the first type of target data is larger than the data volume of the second type of target data; caching the first type of target data and storing the second type of target data in an external memory; and when the set condition is met, the cached first type target data is stored in the external memory. By the method, one part of data is cached, the other part of data is directly stored in the external memory without using the internal RAM memory, so that the waste of resources of the internal RAM memory is reduced, the cost is reduced, the data storage is more reasonable, the processing time is shortened, and the processing efficiency of the equipment is improved.
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In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art. Wherein:
FIG. 1 is a flowchart of a first embodiment of a data processing method provided in the present application;
FIG. 2 is a flow chart of a second embodiment of a method for processing data provided in the present application;
FIG. 3 is a flowchart of a third embodiment of a method for processing data provided in the present application;
FIG. 4 is a schematic view of a first embodiment of a data processing apparatus provided herein;
FIG. 5 is a schematic diagram of an embodiment of a particle detection system provided herein;
FIG. 6 is a schematic diagram of a second embodiment of a data processing apparatus provided herein;
FIG. 7 is a flowchart of a fourth embodiment of a data processing method provided herein;
fig. 8 is a schematic structural diagram of an embodiment of a computer storage medium provided in the present application.
Detailed Description
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the present application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
Referring to fig. 1, fig. 1 is a flowchart of a first embodiment of a data processing method provided in the present application. The method comprises the following steps:
step 11: acquiring first-class target data and second-class target data; wherein the data volume of the first type of target data is larger than the data volume of the second type of target data.
Optionally, the first type of target data is data with large data volume, and the second type of target data is data with small data volume, and the data volume of the first type of target data is larger than the data volume of the second type of target data. For example: the data volume of the first type target data is 20M, and the data volume of the second type target data is 1M. In step 11, the first type of target data and the second type of target data may be collected by an associated collection instrument, such as a particle detection system, a blood sample detector, an environmental data collection instrument, and the like.
After the first type of target data and the second type of target data are collected, step 12 is performed.
Step 12: and caching the first type of target data and storing the second type of target data into an external memory.
The Cache is a buffer area (called a Cache) for data exchange, when a certain hardware needs to read data, the needed data is searched from the Cache, if the needed data is found, the needed data is directly executed, and if the needed data is not found, the needed data is found from the memory. Since the cache operates at a much faster speed than the memory, the cache serves to help the hardware operate faster.
External memory refers to a memory other than computer memory and CPU (Central Processing Unit ) cache, which is generally capable of storing data after power is turned off. Common external memories include hard disks, floppy disks, compact disks, U disks, and the like. It will be appreciated that the external memory may be connected to the data processing device by way of a data line connection, the external memory being replaceable.
In step 12, after the first type of target data is cached for a certain period of time, step 13 is performed.
Step 13: and when the set condition is met, the cached first type target data is stored in the external memory.
In one implementation, the set conditions may be: setting the time for caching the data, and storing the cached first type target data to an external memory every a period of time.
The following is a specific example: and the storage device comprises a processor, a cache unit and a data interface, wherein the cache unit and the data interface are coupled with the processor, and the data interface is used for communicating with the external memory. When the instrument operates, an acquisition start instruction is issued, the acquisition of first type target data is started, the processor controls the buffer memory unit to buffer the first type target data in a corresponding address space, when the buffer memory time reaches 1 minute, the buffer memory is stopped, the processor controls the buffer memory unit to store the buffer data into the external memory through the data interface, the address space before the buffer memory unit is cleaned, the address space of the buffer memory unit is cleaned after the data storage is completed, and the processor controls the buffer memory unit to continuously buffer the first type target data, and the actions are repeated.
Unlike the prior art, the data processing method of the present embodiment includes: acquiring first-class target data and second-class target data; wherein the data volume of the first type of target data is larger than the data volume of the second type of target data; caching the first type of target data and storing the second type of target data in an external memory; and when the set condition is met, the cached first type target data is stored in the external memory. By the method, one part of data is cached, the other part of data is directly stored in the external memory without using the internal RAM memory, so that the waste of resources of the internal RAM memory is reduced, the cost is reduced, the data storage is more reasonable, the processing time is shortened, and the processing efficiency of the equipment is improved.
Referring to fig. 2, fig. 2 is a flow chart of a second embodiment of a data processing method provided in the present application.
Step 21: first type pulse data and second type pulse data are collected.
In this embodiment, the acquired first-type data and second-type data are pulse data.
Alternatively, in the cell detection in the following embodiments, pulse data generated by the cell by a change in current caused by positive and negative electrodes may be used, or pulse data obtained by irradiating the cell with a light source and detecting reflected light with a light sensor may be used. It will be appreciated that the larger the cell, the larger the pulse amplitude and width of the resulting pulse data, and conversely, the smaller the cell, the smaller the pulse amplitude and width of the resulting pulse data.
Optionally, the first type of pulse data is pulse data with large sampling data volume, and the second type of pulse data is pulse data with small sampling data volume.
Step 22: and carrying out analog-to-digital conversion on the first type of pulse data, and processing the analog-to-digital converted data to obtain first type of target data.
Alternatively, in a specific embodiment, step 22 may specifically be: analog-to-digital conversion is carried out on the first type of pulse data; and performing baseline removal processing on the pulse data after analog-to-digital conversion.
Analog-to-digital conversion: converting an analog signal to a digital signal generally refers to the process of converting an analog signal to a digital signal by an analog-to-digital converter. A typical analog-to-digital converter converts an input voltage signal into an output digital signal. Since digital signals themselves have no practical meaning, only one relative size is represented. Therefore, any analog-to-digital converter needs a reference analog quantity as a conversion standard, and the most common reference standard is the maximum convertible signal size. And the number of digits output indicates the magnitude of the input signal relative to the reference signal.
Alternatively, the baseline processing method may be: sequentially acquiring data of each sampling point in a pulse signal to be processed; and acquiring the current sampling point and the average value of the data of a continuous preset number of sampling points before the current sampling point, and taking the average value as a baseline value corresponding to the current sampling point. Subtracting the corresponding baseline value from the data of each sampling point to obtain the data of each sampling point after baseline removal, thereby obtaining the target pulse signal after baseline removal.
Optionally, the performing baseline removal processing on the pulse data after the analog-to-digital conversion includes: and subtracting the corresponding baseline value from the data corresponding to each sampling point in the pulse data after analog-digital conversion to obtain the pulse data after baseline removal.
Optionally, the identifying process is performed on the pulse data after the baseline removal process, so as to obtain first type of target data may specifically be: and performing recognition processing on the pulse data subjected to the baseline removal processing to obtain pulse peak value data serving as first-class target data. Or, performing recognition processing on the pulse data subjected to the baseline removal processing to obtain pulse width data serving as first-class target data. Or, performing recognition processing on the pulse data subjected to the baseline removal processing to obtain pulse peak value data and pulse width data serving as first type target data.
In one embodiment, the pulse data identification process may specifically be: acquiring the initial position of a target pulse signal; acquiring pulse peak value data of a target pulse signal based on the initial position; acquiring the end position of a target pulse signal; pulse width data of the target pulse signal is obtained based on the start position and the end position.
Step 23: and carrying out analog-to-digital conversion on the second type pulse data, and sampling the analog-to-digital converted data at set time intervals to obtain second type target data.
Step 23 may include the following steps: and filtering the sampled data to obtain second-class target data.
The analog-to-digital conversion method is the same as step 22, and will not be described here again.
It will be appreciated that the data conversion process described above is in fact a sampling process. For example, the analog signal acquired by the analog-to-digital converter is continuous, and the analog signal is sampled at a set first time interval to obtain a data signal, i.e. each sampling time point corresponds to a data value. In step 23, the digital signal is sub-sampled with a set second time interval. Optionally, the second time interval is greater than the first time interval.
It will be appreciated that steps 22 and 23 are performed in a non-sequential order, with step 22 being performed first, step 23 being performed later, or step 23 being performed first, step 22 being performed later. In some embodiments, the two steps may be performed simultaneously, which is not described herein.
In the following, as an example, various cells and various protein substances (analytes) are present in human blood, and in some in vitro diagnostic and analytical instruments, there are often functions of detecting various cells and various proteins. After passing through different detection systems, different cells and proteins produce signals of different characteristics, i.e. a plurality of cells and proteins correspond to a plurality of detection system channels. Because the detection principle, the analysis method and other factors of different objects to be detected are different, the data quantity required to be acquired is also different. Some data to be collected are large, such as WBCs (white blood cells), RBCs (red blood cells), PLTs (platelets); some data to be collected are small, such as CRP (C-reactive protein), HS-CRP (hypersensitive-CRP, hypersensitive C-reactive protein).
The collected data volume is large, such as WBC (white blood cell), RBC (red blood cell), PLT (platelet) are classified into first type target data.
The collected data volume is small, such as CRP (C-reaction protein), HS-CRP (hypersensitive-CRP, hypersensitive C-reaction protein) is classified into the second type of target data.
The first type of target data is obtained by performing analog-to-digital conversion on the data with large data collection amount in the step 22, performing baseline removal processing on the data after the analog-to-digital conversion, and then performing recognition processing on the pulse data after the baseline removal processing.
Optionally, after obtaining the first type of target data, step 24 is performed.
By performing the analog-to-digital conversion on the data with small collected data amount in the above step 23, and sampling the data after the analog-to-digital conversion at a set time interval, for example: the time interval may be set as follows: the time interval for collecting CRP was 10 seconds and the time interval for collecting HS-CRP was 15 seconds. And filtering the sampled data to obtain second-class target data. Optionally, after obtaining the second type of target data, step 25 is performed.
Step 24: and caching the first type of target data.
Step 25: and storing the second type of target data into an external memory.
Optionally, in an embodiment, the first type of target data and the second type of target data are acquired by different channels, and the channel 1 acquires the first type of target data; the channel 2 acquires second-class target data, and the data acquired by the channel 1 is cached in a data caching unit in real time; the data acquired by the channel 2 are stored in an address space allocated by an external memory in real time; the write address of the memory is incremented every time one data is written to the memory.
It will be appreciated that the number of channels is determined by the type of data.
Step 26: and when the set condition is met, the cached first type target data is stored in the external memory.
Referring to fig. 3, fig. 3 is a flowchart of a third embodiment of a data processing method provided in the present application.
Step 31: acquiring first-class target data and second-class target data; wherein the data volume of the first type of target data is larger than the data volume of the second type of target data.
The manner of acquiring the target data may be implemented as in the above embodiment, and will not be described herein.
Step 32: and caching the first type of target data and storing the second type of target data into an external memory.
Step 33: and when the data quantity of the cached first type target data is larger than the set threshold value, storing the cached first type target data into the external memory.
Optionally, the threshold is 1/2 of the total amount of buffered data.
The following description will be given by taking a specific example: a storage device includes a buffer unit, wherein the total amount of data of the buffer unit is 10GB (Gigabyte), a threshold value is set to 5GB, and the threshold value is 1/2 of the total amount of data of the buffer. When the data amount of the first type target data is cached to 5GB, the cached first type target data is stored into an external memory, wherein the capacity of the external memory is larger, such as 1TB (Terabyte).
Optionally, the threshold is 2/3 of the total amount of buffered data.
The following description will be given with another specific example: the storage device comprises a cache unit, wherein the total data amount of the cache unit is 9GB, the threshold value is set to be 6GB, and the threshold value is 2/3 of the total data amount of the cache. When the data volume of the first type of target data is 6GB, the cached first type of target data is stored into an external memory, wherein the capacity of the external memory is larger, such as 1TB.
It can be understood that the setting of the threshold is reasonably set according to the actual situation of the total data amount of the cache unit, the cache unit is fully applied, and the resource waste is reduced.
Optionally, in addition to step 33, the method further includes: and after the second type of target data are all stored in the external memory, storing the cached first type of target data in the external memory.
Optionally, after the first type of target data and the second type of target data are all stored in the external memory, uploading the data in the memory to the upper computer, and performing subsequent read-write operation on the data by the upper computer.
Optionally, in an embodiment, the first type of target data and the second type of target data are acquired by different channels, and the channel 1 acquires the first type of target data; the channel 2 acquires second-class target data, and the data acquired by the channel 1 is cached in a data caching unit in real time; the data acquired by the channel 2 are stored in an address space allocated by an external memory in real time; it will be appreciated that the number of channels is determined by the type of data. Every time one data is written into the memory, the writing address of the memory is continuously increased; in the process of uploading the data in the memory to the upper computer, each time one data is uploaded to the upper computer, the reading address of the memory is continuously increased; when the read address of the memory is equal to the write address, the data uploading of the channel is completed, and after all channel data in the memory are uploaded, the upper computer performs subsequent read-write operation on the data.
The Upper Computer is a Computer capable of directly sending out a control command, generally a PC (Personal Computer )/Host Computer/Master Computer/Upper Computer, and various signal changes (hydraulic pressure, water level, temperature, etc.) are displayed on a screen, and in this embodiment, functions of the Upper Computer include: issuing acquisition start and end instructions and receiving data uploaded by a memory.
Referring to fig. 4, fig. 4 is a schematic structural diagram of a first embodiment of a data processing apparatus provided in the present application.
The data processing device 40 comprises a processor 41 and a built-in memory 42 coupled to the processor 41.
Wherein the built-in memory 42 is used for storing program data 421, and the processor 41 is used for executing the program data 421 to implement the following data processing method:
acquiring first-class target data and second-class target data; wherein the data volume of the first type of target data is larger than the data volume of the second type of target data; caching the first type of target data and storing the second type of target data in an external memory; and when the set condition is met, the cached first type target data is stored in the external memory.
Referring to fig. 5, fig. 5 is a schematic structural diagram of an embodiment of a particle detection system provided herein, and the particle detection system 50 includes a particle detection device 51, a data processing device 52, an external memory 53, and a host computer 54. The data processing device 52 is connected to the particle detecting device 51, the external memory 53, and the host computer 54, respectively.
The particle detection device 51 is used for detecting particles to generate pulse data, the data processing device 52 is used for processing the pulse data, storing the pulse data into the external memory 53, and finally uploading the pulse data to the upper computer 54.
Referring to fig. 6, fig. 6 is a schematic structural diagram of a second embodiment of a data processing apparatus provided in the present application, where the data processing apparatus 60 includes an instruction receiving unit 61, an analog-to-digital acquisition unit 62, a data processing unit 63, a data buffering unit 64, a control unit 65, and a data uploading unit 66.
The instruction receiving unit 61 receives an acquisition switch instruction issued by the upper computer, and the instruction informs the start and the end of data acquisition;
the analog-digital acquisition unit 62 acquires the multichannel data converted and output by the analog-digital converter in real time according to the acquisition switch instruction;
the data processing unit 63 performs different processing on the different channel data according to the requirements of the detection principle method of the respective cells and proteins. For data requiring a small amount of data to be sampled, the data processing unit 63 performs sampling at fixed intervals and smoothing filter processing (reducing the influence of noise) on the data; for data with a large amount of sampled data, the data processing unit 63 performs baseline processing and signal recognition processing on the data.
The data buffer unit 64 is used for processing data crossing clock domains, and preventing the data from being lost in the process of writing into the external memory.
The control unit 65 reads data from the data buffer unit 64 according to the condition of the data buffer unit 64 (such as half-full data buffer unit or other conditions), and stores the data in an external memory. Meanwhile, the control unit 65 preferentially stores the data into the external memory according to the enable signal of the slow data.
The data uploading unit 66 reads out the multi-channel data from the external memory in a time-sharing manner according to all the channel writing completion signals output by the control unit 65, and then uploads the multi-channel data to the upper computer.
Referring to fig. 6 and fig. 7, fig. 7 is a schematic flow chart of a fourth embodiment of a data processing method provided in the present application, and specific implementation steps are as follows, where fast data (first type of target data) is processed by a channel 1; channel 2 processes slow data (second class of target data).
Step 1: the counting starts.
Step 2: and under the condition that the acquisition start instructions of the channel 1 and the channel 2 are effective, the analog-digital acquisition units acquire the data input by the channel 1 and the channel 2 in real time respectively.
Step 3: for channel 1 data, baseline processing and identification processing are carried out on the data according to the requirement; and for channel 2 data, the data is acquired and processed at fixed intervals in real time as required, and a slow enabling signal is output.
Step 4: channel 1 data is cached in the data caching unit in real time. The control unit stores the channel 2 data in real time into an address space allocated by the external memory according to the slow enabling signal of the channel 2; after the data save is completed, the control unit will clear the slow enable signal. The write address of the memory is incremented every time one data is written to the memory.
Step 5: and (4) simultaneously, when the channel 1 data occupies half or 2/3 of the space of the data caching unit or other conditions, the control unit reads out the data from the data caching unit and stores the data into an address space allocated by an external memory. The write address of the memory is incremented every time one data is written to the memory.
Step 6: and outputting all channel data storage completion signals according to the channel 1 acquisition completion instruction and the channel 2 acquisition completion instruction.
Step 7: and starting to upload the data of each channel in the memory in a time-sharing mode according to the data storage completion signals of all channels, wherein the reading address of the memory is continuously increased.
Step 8: when the read address of a certain channel memory is equal to the write address, the data uploading of the channel is indicated to be completed, and an uploading completion signal is output.
Step 9: after all channel data in the memory are read out and uploaded, one count is finished.
Referring to fig. 8, fig. 8 is a schematic structural diagram of an embodiment of a computer storage medium provided in the present application.
The computer storage medium 80 is for storing program data 81, which program data 81, when being executed by a processor, is for carrying out the following method steps: acquiring first-class target data and second-class target data; wherein the data volume of the first type of target data is larger than the data volume of the second type of target data; caching the first type of target data and storing the second type of target data in an external memory; and when the set condition is met, the cached first type target data is stored in the external memory.
Optionally, the program data 81, when executed by the processor, is further adapted to carry out the method steps of: and when the cached data quantity is larger than the set threshold value, storing the cached first type target data into an external memory.
Optionally, the program data 81, when executed by the processor, is further adapted to carry out the method steps of: the threshold is set to be 1/2 or 2/3 of the total amount of the cache data.
Optionally, the program data 81, when executed by the processor, is further adapted to carry out the method steps of: and after the second type of target data are all stored in the external memory, storing the cached first type of target data in the external memory.
Optionally, the program data 81, when executed by the processor, is further adapted to carry out the method steps of: collecting first-type pulse data and second-type pulse data; performing analog-to-digital conversion on the first type of pulse data, and processing the analog-to-digital converted data to obtain first type of target data; and performing analog-to-digital conversion on the second type of pulse data, and sampling the analog-to-digital converted data at a set time interval to obtain second type of target data.
Optionally, the program data 81, when executed by the processor, is further adapted to carry out the method steps of: analog-to-digital conversion is carried out on the first type of pulse data; performing baseline removal processing on the pulse data after analog-to-digital conversion; and carrying out recognition processing on the pulse data subjected to the baseline removal processing to obtain first-class target data.
Optionally, the program data 81, when executed by the processor, is further adapted to carry out the method steps of: and subtracting the corresponding baseline value from the data corresponding to each sampling point in the pulse data after analog-digital conversion to obtain the pulse data after baseline removal.
Optionally, the program data 81, when executed by the processor, is further adapted to carry out the method steps of: and performing recognition processing on the pulse data subjected to the baseline removal processing to obtain pulse peak value data and/or pulse width data serving as first type target data.
Optionally, the program data 81, when executed by the processor, is further adapted to carry out the method steps of: and after the first type of target data and the second type of target data are all stored in the external memory, uploading the data in the memory to the upper computer.
In the several embodiments provided in the present application, it should be understood that the disclosed methods and apparatuses may be implemented in other manners. For example, the above-described device embodiments are merely illustrative, e.g., the division of the modules or units is merely a logical functional division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, each unit may exist alone physically, or two or more units may be integrated into one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units of the other embodiments described above may be stored in a computer readable storage medium if implemented in the form of software functional units and sold or used as stand alone products. Based on such understanding, the technical solution of the present application may be embodied in essence or a part contributing to the prior art or all or part of the technical solution, in the form of a software product stored in a storage medium, including several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor (processor) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The foregoing description is only of embodiments of the present application, and is not intended to limit the scope of the patent application, and all equivalent structures or equivalent processes using the descriptions and the contents of the present application or other related technical fields are included in the scope of the patent application.
Claims (8)
1. A method of processing data, comprising:
acquiring first-class target data and second-class target data; wherein the data volume of the first type of target data is larger than the data volume of the second type of target data; the first type target data and the second type target data are acquired by different channels;
caching the first type of target data, and directly storing the second type of target data into an external memory;
and when the cached data volume is larger than a set threshold value or after the second type of target data is all saved to the external memory, saving the cached first type of target data to the external memory.
2. The method of claim 1, wherein the step of determining the position of the substrate comprises,
the set threshold is 1/2 or 2/3 of the total amount of the cache data.
3. The method of claim 1, wherein the step of determining the position of the substrate comprises,
the step of acquiring the first type of target data and the second type of target data comprises the following steps:
collecting first-type pulse data and second-type pulse data;
performing analog-to-digital conversion on the first type of pulse data, and processing the analog-to-digital converted data to obtain first type of target data; and
and carrying out analog-to-digital conversion on the second type pulse data, and sampling the analog-to-digital converted data at set time intervals to obtain the second type target data.
4. The method of claim 3, wherein the step of,
the step of performing analog-to-digital conversion on the first type of pulse data and processing the analog-to-digital converted data to obtain the first type of target data includes:
performing analog-to-digital conversion on the first type of pulse data;
performing baseline removal processing on the pulse data after analog-to-digital conversion;
and carrying out recognition processing on the pulse data subjected to the baseline removal processing to obtain the first type of target data.
5. The method of claim 4, wherein the step of determining the position of the first electrode is performed,
the step of performing baseline removal processing on the pulse data after analog-to-digital conversion comprises the following steps:
and subtracting the corresponding baseline value from the data corresponding to each sampling point in the pulse data after analog-digital conversion to obtain the pulse data after baseline removal.
6. The method of claim 4, wherein the step of determining the position of the first electrode is performed,
the step of identifying the pulse data after the baseline removal processing to obtain the first type of target data comprises the following steps:
and carrying out recognition processing on the pulse data subjected to the baseline removal processing to obtain pulse peak value data and/or pulse width data serving as the first type of target data.
7. A data processing apparatus comprising a processor and a built-in memory coupled to the processor;
wherein the built-in memory is for storing program data and the processor is for executing the program data to implement the method of any of claims 1-6.
8. A computer storage medium for storing program data for implementing the method according to any one of claims 1-6 when executed by a processor.
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