CN111463136A - Metal packaging shell, manufacturing method thereof and hybrid integrated circuit - Google Patents
Metal packaging shell, manufacturing method thereof and hybrid integrated circuit Download PDFInfo
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4817—Conductive parts for containers, e.g. caps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/055—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads having a passage through the base
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/06—Containers; Seals characterised by the material of the container or its electrical properties
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
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Abstract
The invention provides a metal packaging shell, a manufacturing method thereof and a hybrid integrated circuit. The metal packaging shell is used for a hybrid integrated circuit and comprises a metal shell and a metal cover body, wherein the metal shell and the metal cover body can enclose to form a cavity for protecting a circuit; the circuit comprises components and metal conduction bands for connecting the components; the metal shell comprises a base, wherein the base is provided with a first surface and a second surface which are opposite, the first surface faces the cavity and is used for fixing the metal conduction band through the substrate; the first surface is provided with a blind hole, and the opening position of the blind hole corresponds to the metal conduction band. According to the metal packaging shell provided by the invention, the blind hole is formed in the base, so that the problem that the performance parameters of the hybrid integrated circuit product cannot reach the standard due to the adoption of the metal packaging shell at present can be solved.
Description
Technical Field
The invention relates to the technical field of semiconductor packaging, in particular to a metal packaging shell, a manufacturing method thereof and a hybrid integrated circuit.
Background
Hybrid Integrated Circuits (HIC) are formed by fabricating thick or thin film elements and interconnections thereof on a substrate by a film formation method, and by mixing and assembling discrete semiconductor chips, monolithic Integrated circuits, or micro elements on the same substrate, followed by additional packaging. Compared with a semiconductor integrated circuit, the hybrid integrated circuit has the characteristics of short design period, good flexibility and the like, can flexibly adapt to small, medium and large-scale production, and has the obvious advantages of high density, high performance, high reliability, light weight, small volume and the like, so that the hybrid integrated circuit is widely applied.
The packaging shell is an important component of the hybrid integrated circuit, not only plays a role in mechanical protection and outward transition connection of electrodes for the circuit, but also plays a fundamental role in correct realization of various functional parameters of the circuit, environmental conditions required by the circuit in use and embodying of circuit characteristics. For hybrid integrated circuits, there are two mainstream packaging forms, i.e., non-hermetic packaging and fully-hermetic packaging. The non-hermetic package is usually a ceramic package or a plastic package, and the moisture resistance and heat dissipation of the package structure are poor, so that the stability and reliability of the product are relatively poor, and the package structure is generally only suitable for low-end products and civil electronic products. The metal package shell is adopted in the full-sealed package, the moisture resistance and the heat dissipation performance are relatively good, so that the stability and the reliability of the product are relatively good, and the metal package shell is mainly used for military products and high-end electronic products.
With the rapid development of semiconductor integration technology, hybrid integrated circuits are gradually being developed in a direction of miniaturization, weight reduction, and high frequency. Accordingly, the size of the hybrid integrated circuit is smaller and smaller, the number of devices integrated inside the hybrid integrated circuit is larger and larger, the packaging density is high, the electronic circuit is complex, and the operating frequency is high.
Disclosure of Invention
In order to solve the problems, the invention provides a manufacturing method of a metal packaging shell, which can reduce the influence of distributed capacitance on the performance of a hybrid integrated circuit product by arranging a blind hole corresponding to a metal conduction band on a metal shell of the metal packaging shell.
The invention also provides a metal packaging shell and a hybrid integrated circuit, and the blind hole is formed in the position, corresponding to the metal conduction band, of the metal shell, so that the influence of distributed capacitance on the performance of a product can be effectively reduced, and the performance of the finally obtained hybrid integrated circuit meets the requirement.
In order to achieve the above object, a first aspect of the present invention provides a method for manufacturing a metal package casing; the metal packaging shell comprises a metal shell; the metal shell comprises a base, wherein the base is provided with a first surface and a second surface which are opposite, and the first surface is used for fixing the metal conduction band through the substrate; the manufacturing method comprises the following steps: the first surface of the base is provided with a blind hole, and the position of the blind hole corresponds to the metal conduction band.
Further, the depth of the blind hole is controlled to be 33% -67% of the thickness of the base.
Further, the manufacturing method further comprises the following steps: the step of determining the cross-sectional area of the blind hole along a line parallel to the base:
determining the actual distributed capacitance generated on the base and the distributed capacitance generated on the base in unit area before the blind holes are opened;
determining the effective area of a base capable of generating the distributed capacitance before the blind holes are formed according to the actual distributed capacitance and the distributed capacitance;
determining distributed capacitance and a distributed capacitance change value generated by arranging blind holes in unit area;
determining distributed capacitance to be reduced according to the target distributed capacitance and the actual distributed capacitance before the blind holes are formed;
determining the required effective area of the base according to the distributed capacitance required to be reduced and the change value of the distributed capacitance caused by the arrangement of the blind holes in unit area;
and determining the section area of the blind hole by combining the available total area of the base according to the required effective area of the base and the effective area of the base capable of generating distributed capacitance before the blind hole is formed.
Further, the total available area of the base is the surface area on the first surface of the base that can be used for fixing the metal conduction band minus the surface area on the substrate on which the metal conduction band is not arranged.
The second aspect of the present invention provides a metal package casing for a hybrid integrated circuit, the metal package casing includes a metal shell and a metal cover, and the metal shell and the metal cover can enclose to form a cavity for protecting a circuit; the circuit comprises components and metal conduction bands for connecting the components; the metal shell comprises a base, wherein the base is provided with a first surface and a second surface which are opposite, the first surface faces the cavity and is used for fixing the metal conduction band through the substrate; the first surface is provided with a blind hole, and the opening position of the blind hole corresponds to the metal conduction band.
Furthermore, the section of the blind hole is circular, polygonal or irregular along the direction parallel to the base.
Furthermore, the depth of the blind hole is 33% -67% of the thickness of the base.
Further, the metal shell is a flat plate type packaging shell or a shallow cavity type packaging shell.
A third aspect of the present invention provides a hybrid integrated circuit, comprising a circuit and the metal package casing of the second aspect, wherein the circuit comprises a device and a metal conduction band connected to the device, and the metal conduction band is fixed on the first surface of the base through a substrate.
Furthermore, the blind hole is filled with inert gas, nitrogen or air.
According to the metal packaging shell and the manufacturing method thereof, the blind hole is formed in the base, and the forming position of the blind hole is controlled to correspond to the position of the metal conduction band, so that the distributed capacitance value can be effectively reduced, and the obtained hybrid integrated circuit product can work stably and reliably.
In addition, the through hole is formed without changing the original design, the metal packaging shell can be processed only by forming the blind hole with the proper size at the proper position of the base of the existing metal shell, and the subsequent packaging process does not need to be adjusted. Therefore, the metal packaging shell is simple in manufacturing process, is matched with the existing packaging process, and is convenient to actually produce, apply and popularize.
According to the hybrid integrated circuit provided by the invention, the blind hole is formed in the position, corresponding to the metal conduction band, of the base of the metal packaging shell, so that the distributed capacitance value can be reduced, the problem that the performance does not reach the standard due to the adoption of the metal packaging shell is solved, and the hybrid integrated circuit can stably and reliably work. In addition, because the blind holes are only formed on the base of the metal packaging shell, the weight of the integrated circuit product can be reduced on the basis of not increasing the volume of the hybrid integrated circuit product, and the development requirements of miniaturization and light weight of the hybrid integrated circuit are met.
Drawings
FIG. 1 is a schematic diagram of a hybrid integrated circuit employing a metal package;
FIG. 2 is a schematic diagram of a typical parallel plate capacitor;
fig. 3 is a first schematic structural diagram of a hybrid integrated circuit according to an embodiment of the present invention;
fig. 4 is a second schematic structural diagram of a hybrid integrated circuit according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a metal shell according to an embodiment of the present invention.
Description of reference numerals:
11-a base; 12-an adhesive layer;
13-a substrate; 14-metal conduction band;
21-a lower electrode; 22-an upper electrode;
23-a dielectric; 31-a base;
32-an adhesive layer; 33-a substrate;
34-metal conduction band; 35-blind hole.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention. Further, the features in the embodiments described below may be combined with each other without conflict.
For hybrid integrated circuit products, the mainstream packaging forms at present mainly include metal packaging, ceramic packaging and plastic packaging. In contrast, metal packages are often used in high-end products or military products because of their high reliability and stability and good heat dissipation. However, the inventor finds in practice that once the hybrid integrated circuit product originally adopting the ceramic package shell and having all the performance indexes meeting the requirements is replaced by the metal package shell, part of the performance indexes of the product are often difficult to meet the requirements, and the problems are particularly obvious for small-volume and high-density assembled products.
To solve the above problems, the inventors tried to adjust the layout of electronic components in the hybrid integrated circuit product, but the results were very small, and some variations even resulted in failure of various specifications. Through further analysis, it is presumed that the performance of the circuit may be adversely affected by the excessive distributed capacitance caused by the metal package casing, so that the performance index of the product may not meet the requirements.
In hybrid integrated circuit products, a typical metal package can includes a metal shell and a metal lid that can be assembled to form a cavity for housing and protecting the circuitry. Fig. 1 is a schematic structural diagram of a conventional hybrid integrated circuit employing a metal package. The metal cover is omitted from fig. 1 for ease of illustration. As shown in fig. 1, the metal housing includes a base 11, an adhesive layer 12 is disposed on a surface of the base 11 facing the chamber, a substrate 13 (or referred to as "substrate") is adhered on the adhesive layer 12, a metal conduction band 14 is distributed on the substrate 13, and the components are connected through the metal conduction band 14 to form a circuit.
Figure 2 is a schematic diagram of a typical parallel plate capacitor. As shown in fig. 2, a typical parallel plate capacitor includes a lower electrode 21 and an upper electrode 22 disposed opposite each other, and a dielectric 23 between the two parallel plate electrodes.
With reference to fig. 1 and fig. 2, after the hybrid integrated circuit is fully sealed by using a metal package casing, the metal conduction band 14 distributed on the substrate 13 and the base 11 of the metal casing form two electrodes of the parallel plate capacitor, where the metal conduction band 14 is equivalent to the upper electrode 22, and the base 11 is equivalent to the lower electrode 21; the substrate 13 and the adhesive layer 12 between the two parallel plate electrodes together form the dielectric 23 of the parallel plate capacitor.
Ideally, the capacitance of the parallel plate capacitor is calculated as follows:
wherein is the dielectric constant of the dielectric;
d is the distance between two parallel plate electrodes, mm;
s is the area of the parallel plate electrode, mm2；
C is the capacitance, pf.
For the case of a parallel plate capacitor with two layers of dielectric, the capacitance can be calculated as follows (II). The detailed derivation process of formula (II) can be found in Zhao Xiaoyun, analysis of capacitance value calculation method of plate capacitor with dielectric [ J ], proceedings of the university of Fuyang (Nature science edition), 2013,30(3):29-31 ].
Wherein,1is the dielectric constant of the substrate material (i.e., the dielectric constant of the substrate 13 in fig. 1);
2is the dielectric constant of the bonding material (i.e., the dielectric constant of bonding layer 12 in fig. 1);
d1is the thickness of the substrate material (i.e., the thickness of the base sheet 13 in fig. 1);
d2is the thickness of the adhesive material (i.e., the thickness of the adhesive layer 12 in fig. 1).
As can be seen from equations (I) and (II), the capacitance of the parallel plate capacitor is proportional to the area of the parallel plate electrodes, inversely proportional to the distance between the two parallel plate electrodes, and proportional to the dielectric constant of dielectric 23. Referring to fig. 1 and 2, in the parallel plate capacitor, each metal conduction band 14 distributed on the substrate 13 forms a distributed capacitance with the base 11 of the metal shell; all the distributed capacitors are connected in parallel to form the integral distributed capacitor of the whole hybrid integrated circuit product. In other words, the higher the integration degree of the hybrid integrated circuit, the more the number and the more dense the arrangement of the metal conduction bands 14 are, the larger the effective area for generating the distributed capacitance is, and the larger the generated distributed capacitance is. This is presumed to be the cause of the large distributed capacitance generated when the hybrid integrated circuit is packaged using a metal package instead of a ceramic package.
In particular, as electronic products are being miniaturized and lightened, the thickness of the substrate 13 is generally strictly controlled. The thinner the substrate 13 is, the smaller the distance between the two parallel plate electrodes in the parallel plate capacitor is, the larger the capacitance is generated, so that the performance parameters of the hybrid integrated circuit obtained by the final package can not meet the expected requirements.
Based on the equations (I) and (II) for calculating the capacitance of the parallel plate capacitor, in order to reduce the distributed capacitance, an attempt can be made from the following three ideas: 1. the number of metal conduction bands 14 on the substrate is reduced to reduce the area S of the upper electrode 22, but this will inevitably reduce the degree of integration. 2. Replacing the substrate material with a dielectric constant1Smaller substrate materials. However, the dielectric constants of the substrate materials commonly used at present are shown in table 1, and they are not different from each other, so the effect is very small. 3. The thickness of the substrate is increased to increase the distance between the two parallel plate electrodes, but the weight and volume of the hybrid integrated circuit product are increased, which is not favorable for realizing the light weight and miniaturization of the hybrid integrated circuit. Therefore, the above three ideas are not preferable.
TABLE 1 dielectric constant table of commonly used substrate materials
In order to effectively reduce the distributed capacitance, the invention provides a new solution, and the distributed capacitance can be effectively reduced by arranging the blind holes on the metal shell, so that the obtained hybrid integrated circuit product meets the performance requirement. Further description will be given below with reference to specific examples.
Example one
The present embodiment provides a method for manufacturing a metal package casing, where the metal package casing includes a metal shell and a metal cover, and the metal shell and the metal cover can enclose to form a cavity for accommodating and protecting a circuit. The circuit comprises components and metal conduction bands for connecting the components. Fig. 3 is a schematic structural diagram of a hybrid integrated circuit according to an embodiment of the present invention. The metal cover is omitted from fig. 3 for ease of illustration. As shown in fig. 3, the metal housing has a base 31, and the base 31 has a first surface and a second surface opposite to each other, wherein the first surface is used for fixing a metal conduction band 34 through a substrate 33. Specifically, an adhesive layer 32 made of an adhesive material is provided on the first surface, and the substrate 33 is adhesively fixed to the first surface of the base 31 via the adhesive layer 32; a metal conduction band 32 is distributed on the substrate 32.
The manufacturing method comprises the following steps: a blind hole 35 is formed in the first surface of the base 31, and the position of the blind hole 35 corresponds to the metal conduction band 34.
In the manufacturing method of the metal package housing provided in this embodiment, the step of manufacturing the blind hole 35 is added on the basis of the existing process for processing the metal package housing, and the opening position of the blind hole 35 is controlled to correspond to the metal conduction band 34, and the opening of the blind hole 35 faces the metal conduction band 34. Through testing, the isolation capacitance value of the finally obtained hybrid integrated circuit product is obviously reduced.
The inventors have accordingly analyzed that, on the one hand, the opening of the blind hole 35 increases the distance between the two parallel plate electrodes in the parallel plate capacitor; on the other hand, the blind hole 35 is filled with a gas which is not conductive under normal conditions, such as nitrogen, inert gas, air, etc., and may be regarded as an insulating gas, and the dielectric 23 between the two parallel plate electrodes is formed by the substrate 33 (i.e., substrate) and the insulating gas.
The substrate material for the hybrid integrated circuit is assumed to be Al2O3Dielectric constant of1Is 10, substrate thickness d1Is 0.8 mm; the adhesive material is epoxy resin with dielectric constant2About 4, the bonding layer 32 has a thickness d2Is 0.5 mm. In accordance with formula (II), having a unit area (1 mm)2) The distributed capacitance value C generated on the substrate of the metal thick film conduction band is calculated by the following steps:
before the blind hole 35 is not opened, let S be 1mm2The distributed capacitance generated per unit area of the substrate having the metal conductive tape 34 thereon was calculated to be about 0.43 pf.
After the blind via 35 is opened, assuming that the sum of the depth of the blind via 35 and the thickness of the adhesive layer 32 is 1.0mm, the gas in the blind via 35 is air, which has a dielectric constant2About 1, 1mm calculated according to formula (II)2The distributed capacitance value C generated on the substrate with the metal thick film conduction band is calculated as follows:
let S be 1mm2The distributed capacitance value C is calculated to be about 0.098 pf.
From the comparison of the above calculation results, 1mm is found2The distributed capacitance of the area is reduced from 0.43pf to 0.098pf, and the reduction amplitude is up to 77.14%. Therefore, the blind holes 35 are formed on the metal package housing, so that the distributed capacitance caused by the metal package housing can be significantly reduced, and the result is consistent with the analysis result.
It is understood that the opening position of the blind hole 35 should correspond to the position of the metal conduction band 34 to substantially reduce the distributed capacitance; considering that the number of the metal conduction bands 34 in the hybrid integrated circuit is large and the distribution is dense, it is difficult to make the positions of the blind holes 35 absolutely correspond to the metal conduction bands 34 from the process implementation perspective, so the blind holes 35 are generally opened in the relatively dense region of the metal conduction bands 34 to effectively reduce the distributed capacitance.
It will be appreciated that the deeper the blind vias 35, the more advantageous it is to reduce the distributed capacitance and also to some extent the weight of the overall hybrid integrated circuit. However, the blind hole 35 is too deep, which may adversely affect the mechanical properties of the metal housing and thus the entire metal package housing, and thus the quality of the hybrid integrated circuit. Therefore, in the preferred embodiment, the depth of the blind hole 35 is generally controlled to be 33% to 67% of the thickness of the base 31. Furthermore, the depth of the blind hole 35 is controlled to be 1/3-2/3 of the thickness of the base 31. For example, the thickness of the base 31 is 1.5mm, and the depth of the blind hole 35 can be controlled within 0.5 mm-1.0 mm. Of course, the depth of the blind hole 35 can be adjusted according to the cross-sectional area of the blind hole 35, for example, if the cross-sectional area of the blind hole 35 is larger, the depth of the blind hole 35 can be reduced appropriately.
From the above calculation, 1mm is produced2The distributed capacitance of the blind hole 35 is greatly reduced, and therefore, the larger the cross-sectional area of the blind hole 35 is, the more favorable the distributed capacitance is to be reduced. However, the cross-sectional area is too large, which will reduce the substrate bonding area (i.e., the area of the bonding layer 32) of the hybrid integrated circuit, thereby affecting the bonding strength and reducing the product reliability, so that in the actual production, the size of the blind hole 35 can be determined reasonably according to the product performance parameter requirements.
In a preferred embodiment of the present invention, the method for manufacturing a metal package further includes the step of determining the cross-sectional area of the blind hole 35:
s1, determining the actual distributed capacitance C generated on the base before the blind hole is openedPractice ofAnd distributed capacitance C generated on the base per unit area□。
Specifically, the actual distributed capacitance C before the blind hole is openedPractice ofBased on the internal structure of the hybrid integrated circuit product, the positions likely to generate distributed capacitance can be found out based on experience and the distributed capacitance value C can be actually measuredPractice of. For the distributed capacitance C generated on the base per unit area□It can be calculated according to formula (II).
The parameters in formula (II) are as follows:
1is the dielectric constant of the substrate material;
2is the dielectric constant of the bonding material;
d1is the thickness of the substrate material (i.e., the thickness of the base sheet 13 in fig. 1), mm;
d2is the thickness of the adhesive material (i.e., the thickness of the adhesive layer 12 in fig. 1), mm.
By general convention in the art, the term "unit area" is generally meant 1mm2Thus S is 1mm2。
S2, according to the actual distributed capacitance C determined in the step S1Practice ofAnd distributed capacitance C□Determining the effective area S of the base capable of generating distributed capacitance before the blind hole is openedIs effective。
Specifically, the actual distributed capacitance C before the blind hole is openedPractice ofDivided by distributed capacitance C□The effective area S of the base capable of generating the distributed capacitance can be calculatedIs effectiveI.e. SIs effective＝CPractice of/C□。
S3, determining distributed capacitance C generated by forming blind holes in unit area□'and △ C' which is the distributed capacitance variation value caused by opening blind holes in unit area.
In particular, the distributed capacitance C generated by forming blind holes in unit area□' can also be calculated according to formula (II), where the parameters in formula (II) are:
1is the dielectric constant of the hybrid integrated circuit substrate material;
2is the dielectric constant of an insulating gas, such as air, which has a dielectric constant of 1;
d1is the thickness of the substrate material (i.e., the thickness of the base sheet 33 in fig. 3);
d2is the height of the insulating gas (i.e., the sum of the depth of the blind hole 35 and the thickness of the adhesive layer 32 in fig. 3).
According toThe capacitance change before and after the blind hole with unit area is opened can determine the distributed capacitance change value △ C' caused by the blind hole with unit area, namely △ C ═ C□-C□’。
S4, distributing capacitance C according to the targetTargetAnd the actual distributed capacitance C before the blind hole is openedPractice ofDetermining the distributed capacitance △ C to be reduced-。
In particular, the target distributed capacitance CTargetThe distributed capacitance △ C to be reduced can be determined according to the product performance requirement-The capacitance C can be distributed according to the actual distribution before the blind hole is openedPractice ofAnd target distributed capacitance CTargetDifference between them to determine CPractice of-CTargetFor safety, less distributed capacitance △ C is required-Should be slightly larger than this difference.
S5, distributed capacitance △ C reduced as required-And the distributed capacitance change value △ C' caused by the blind holes with unit area, determining the required effective area S of the base- Is effective。
In particular, a reduced distributed capacitance △ C is required-The quotient of the distribution capacitance variation △ C' due to the opening of the blind via of unit area is the required effective area S of the base- Is effectiveI.e. S- Is effective＝△C-/△C’。
S6, according to the effective area S of the required base- Is effectiveAnd the effective area S of the base capable of generating distributed capacitance before the blind hole is openedIs effectiveCombined with the total available area S of the baseCan be usedDetermining the cross-sectional area SBlind hole。
Specifically, the effective area S of the base required to reduce the distributed capacitance can be first calculated- Is effectiveAnd the effective area S of the base capable of generating distributed capacitanceIs effectiveThe ratio K, K ═ S- Is effective/SIs effectiveThen, according to the base area used by product design, the total available area S of wiring during layout design is estimated according to actual experienceCan be usedCalculating the cross-sectional area S required for manufacturing the blind holeBlind hole。
Wherein the total available area S of the baseCan be usedMeans that: because the substrate can not be fully wired, the area of the substrate which can not be wired around the edge of the substrate is properly subtracted, and the blank area (when applicable) of other non-wired areas is subtracted, namely SCan be usedThe area of the submount-the area around the perimeter of the substrate where wiring cannot be routed-the area of the substrate where no wiring is located (where applicable).
The cross-sectional area S required for the final fabrication of blind holesBlind hole＝K·SCan be used(unit: mm)2)。
Of course, in the actual manufacturing process, the blind holes 35 should be formed at the proper positions of the base 31 according to the layout design layout and the substrate bonding strength. The number of blind holes 35 is not particularly limited in the present invention, and may be set to the total cross-sectional area SBlind holeOne or more blind holes 35 are made with the defined premise.
The shape of the blind hole 35 is not particularly limited in this embodiment, wherein the cross-sectional shape of the blind hole 35 along a direction parallel to the first surface of the base 31 may be circular, such as perfect circle or ellipse; or may be polygonal, such as triangular, quadrilateral, pentagonal, hexagonal, etc.; or, the shape may be irregular, and may be determined reasonably according to the distribution of the metal conduction band 34 on the substrate 33.
The specific manner of how to form the blind hole 35 on the base 31 of the metal shell is not particularly limited in this embodiment, and any feasible manner may be adopted. For example, the metal shell may be first manufactured according to the existing process or purchased, and then the blind hole 35 may be formed on the base 31 of the metal shell by stamping. For example, the processing of the blind hole 35 may be combined with the manufacturing of the metal shell, that is, the metal shell with the blind hole 35 may be obtained by one-step molding in the manufacturing process of the metal shell. The metal cover body can be manufactured by the existing process or obtained commercially.
The specific structure of the metal shell in this embodiment is not particularly limited, and may be a conventional structure of a metal package shell currently in the field, such as a flat-type package shell or a shallow cavity type package shell.
For the flat plate type package housing, the metal housing specifically includes a base 31 and a first connecting portion (not shown) located at an edge of the base 31, where the base 31 may specifically be a rectangular or circular flat plate-like structure, for example, in fig. 3 and 4, the base 31 is rectangular and four corners are chamfered. The thickness of the base 31 may be the same as that of the base in the prior art flat panel package housing; the first connecting portion surrounds the base 31 for sealing connection with the metal cover. Generally, the thickness of the first connecting portion is slightly less than that of the base 31, so that an annular step is formed at the connecting portion of the first connecting portion and the base 31 to facilitate the sealing connection between the first connecting portion and the metal cover. The metal cover may be a metal cover of an existing flat-panel package casing, and may specifically include a cover plate and a first ring frame extending from an edge of the cover plate to the base 31, where a size and a shape of the cover plate correspond to a size and a shape of the base 31. Along the thickness direction of the base 31, the cross section of the whole metal cover body is U-shaped. During packaging, the opening of the metal cover faces the first surface of the base 31 of the metal shell, and the sealing of the flat plate type packaging shell is realized through the sealing connection between the first ring frame and the first connecting part.
The shallow cavity type packaging shell has a structure basically opposite to that of a flat plate type packaging shell. Specifically, the metal shell includes a base 31 and a second ring frame extending from the edge of the base 31 toward the metal cover, that is, the cross section of the metal shell is U-shaped along the thickness direction of the base 31. The metal cover body comprises a cover plate and a second connecting part surrounding the cover plate, the cover plate and the second connecting part can be of flat plate structures, the thickness of the first connecting part is slightly smaller than that of the cover plate, and therefore steps are formed at the connecting position of the cover plate and the first connecting part, and the metal cover body is conveniently connected with the metal shell. And the sealing of the shallow cavity type packaging shell is realized through the sealing connection of the second connecting part and the second ring frame.
The embodiment is not particularly limited to how to implement the sealing of the metal package housing, and conventional means in the art may be adopted, and particularly, suitable means may be adopted according to the specific structure of the metal package housing. For example, for a flat-type package housing, the metal shell and the metal cover may be sealed by welding.
Of course, in actual packaging, the gas filled in the blind hole 35 should be an insulating gas, such as inert gas, nitrogen gas or air commonly used in the metal shell packaging. Due to production cost and production process considerations, the blind holes 35 are typically filled with a suitable amount of nitrogen or air. Of course, the actual process should be completed in an ultra-clean room, so even if air is filled into the blind hole 35, the air should be in accordance with the semiconductor process requirements.
Further, a lead (or referred to as "terminal pin") is provided on the base 31, one end of the lead is used for electrical connection with the component, and the other end of the lead protrudes from the second surface of the base 31. The lead is fixed to the base 31 for electrical connection with an external circuit element, and accordingly, performs a desired function. In this embodiment, the arrangement position and the number of the leads on the base 31 are not particularly limited, and the leads may be designed according to the actual situation of the hybrid integrated circuit, which is not described in detail.
The embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and specific application examples.
A hybrid integrated circuit product is developed by adopting a thick film hybrid integration technology, and the product needs to be packaged by adopting a metal full-sealed packaging shell due to the reliability requirement.
According to the requirement of users on the volume of products, the substrate is 0.8mm thick and 25.8 × 20.4.4 mm in area2Al of (2)2O3Ceramic substrate, and the available area of the practical wiring and assembly external component is only 25.4 × 20mm2And thick film elements and external pasting elements integrated on the substrate are more, and thick film conduction band interconnection lines on the substrate are dense. Product layout the layout of the functional modules on a substrate is schematically shown in figure 4.
The product is packaged by adopting a ceramic packaging shell, and the performance indexes all meet the requirements. The pin-out isolation capacitance test results in the performance index after being packaged by the metal packaging shell are shown in table 2. The specification requires that the sum of the capacitances C1 and C2 should be less than 10pf, so the capacitances C1 and C2 are not satisfactory.
TABLE 2 isolation capacitance value of metal case package
| Test site | C1 | C2 |
| Isolation capacitor | 6.5P | 6.0P |
The thickness of the base 31 of the metal packaging shell is 1.5mm, in order not to influence the strength of the base 31, the depth of the blind hole 35 is 1.0mm, and the position of the blind hole 35 selects an input stage circuit and an output stage circuit which are relatively dense corresponding to the metal conduction band 34 on the ceramic substrate, and a high-frequency oscillator part.
By adopting the manufacturing method, the blind hole 35 is designed and manufactured on the base. Before the blind hole 35 is manufactured, the cross-sectional area of the blind hole 35 is first determined according to the following steps:
s1, as mentioned above, Al is adopted when the thick film of the product is integrated2O3Ceramic as substrate, having a thickness d1Has a dielectric constant of 0.8mm1Is 10; the adhesive material is epoxy resin, and the thickness d of the adhesive layer 3220.5mm, dielectric constant of epoxy resin2Is 4. Let area S equal to 1mm21mm calculated according to formula (II)2Effective area generated distributed capacitance C□＝0.43pf/mm2。
S2, before the blind hole 35 is not manufactured, actually measuring the generated actual distributed capacitance CPractice ofIs 12.5pf (i.e., C)Practice ofC1+ C2 ═ 6.5pf +6.0pf), the effective area S of the base 31 capable of generating distributed capacitance is calculatedIs effectiveComprises the following steps:
Sis effective＝CPractice of/C□＝12.5pf÷0.43(pf/mm2)＝29.07mm2。
S3, the thickness of the base 31 of the metal package housing used for the hybrid integrated circuit is 1.5mm, and the depth of the blind via 35 is determined to be 0.5 mm. Calculating according to formula (II) to make blind hole 35 with depth of 0.5mm, and making blind hole at 1mm2Distributed capacitance C generated over the active area□', is 0.098pf/mm2. Wherein d is2The depth of the blind hole plus the thickness of the bonding layer is 0.5mm plus 0.5mm is 1.0 mm.
According to the change of the distributed capacitance before and after the blind hole 35 with unit area is opened, the condition that the unit area is 1mm is determined2The value of the distributed capacitance change △ C' due to the blind hole with the depth of 0.5mm is:
△C’＝C□-C□’＝0.43pf/mm2-0.098pf/mm2＝0.348pf/mm2。
s4, before the blind hole is opened, the capacitor C is actually distributedPractice of12.5pf, and the target distributed capacitance should be less than 10pf, so that the distributed capacitance △ C to be reduced is determined-Distributed capacitance △ C to be reduced is determined for greater than 2.5 pf. insurance-It was 3.5 pf. That is, the isolation capacitance of the final hybrid integrated circuit product is made to be about 12.5pf-3.5 pf-9.0 pf.
S5, reducing the effective area S of the base required by 3.5pf distributed capacitance- Is effectiveComprises the following steps:
S- is effective＝△C-/△C’＝3.5pf÷0.348pf/mm2＝10.06mm2。
S6 and S2 show the effective area S of the base 31 capable of generating distributed capacitanceIs effectiveIs 29.07mm2(ii) a In step S5, the effective area S of the base required by the 3.5pf distributed capacitance is reduced- Is effectiveIs 10.06mm2. The quotient K ═ S- Is effective/SIs effective＝10.06mm2/29.07mm2＝0.346。
In this embodiment, the area of the base 31 (substrate area) is 25.8 × 20.4.4 mm2And the actual layout when making the layoutThe effective wiring area is about 25.4mm × 20 mm-508 mm2The cross-sectional area of the blind hole should be SBlind holeK × substrate effective wiring area 0.346 × 508mm2＝175.75mm2。
Referring further to fig. 4 and 5, according to the layout design, the actual measurement result and the calculation result of the product, after several tests, two blind holes 35 are finally formed on the base 31, wherein one of the blind holes 35 has a circular cross section with a diameter of about 4mm and corresponding to the high frequency oscillator, and the other blind hole 35 has a rectangular cross section with a size of 18 × 9mm2Corresponding to the output stage circuit and part of the input stage circuit the total cross-sectional area of the two blind holes 35 is about 18 × 9mm2+3.14×22mm2＝174.57mm2。
After fabricating the two blind vias 35 as described above, the measured isolation capacitance values are shown in table 3 below:
TABLE 3
| Test site | C1 | C2 |
| Isolation capacitor | 4.6pf | 4.4pf |
As can be seen from Table 3, the product isolation capacitors C1 and C2 both do not exceed 5pf, and the sum of the two capacitors is less than 10pf, so that the product index requirements are met. Moreover, the theoretical calculation value of the section area of the manufactured blind hole 35 has very high goodness of fit with the practical result, and the theoretical calculation can effectively guide the actual manufacturing.
Example two
The embodiment provides a metal packaging shell for a hybrid integrated circuit, which comprises a metal shell and a metal cover, wherein the metal shell and the metal cover can enclose to form a cavity for accommodating and protecting a circuit. The circuit comprises components and metal conduction bands for connecting the components. Fig. 3 is a schematic structural diagram of a metal package housing according to an embodiment of the present invention, and the metal cover is omitted in fig. 3 for convenience of illustration. As shown in fig. 3, the metal housing has a base 31, the base 31 having a first surface and a second surface opposite to each other, wherein the first surface is used for fixing a metal conduction band 34 through a substrate 33; the first surface is provided with a blind hole 35, and the opening position of the blind hole 35 corresponds to the metal conduction band 34.
Specifically, when the hybrid integrated circuit is packaged by using the metal package casing, the first surface of the base 31 is provided with the adhesive layer 32. The adhesive layer 32 may be specifically formed of an adhesive material such as epoxy resin; a base sheet 33 (i.e., a substrate) is fixed to the first surface of the base 31 by an adhesive layer 32; a metal conduction band 34 is distributed over the substrate 33.
The blind holes 35 are formed on the first surface of the base 31, and the positions of the blind holes 35 correspond to the metal conduction bands 34, and particularly, the blind holes 35 may be formed in a region where the metal conduction bands 34 are densely distributed. The depth of the blind hole 35 and the cross-sectional area along the first surface can be determined according to actual requirements, and in the implementation process of the invention, the depth of the blind hole 35 can be controlled to be 33% to 67% of the thickness of the base 31, so as to reduce the distributed capacitance sufficiently and not influence the mechanical performance of the metal shell as much as possible. The larger the cross-sectional area of the blind via 35 is, the more beneficial the reduction of the distributed capacitance is, but the too large cross-sectional area of the blind via 35 will reduce the substrate bonding area (i.e. the area of the bonding layer 32) of the hybrid integrated circuit, thereby affecting the bonding strength, so that the cross-sectional area can be determined according to practical situations, and reference can be specifically made to the calculation method described in the first embodiment.
In this embodiment, the shape and the number of the blind holes 35 are not particularly limited, and may be reasonably set according to the distribution of the metal conduction band 32, which is not described in detail.
The specific type of the metal package shell in this embodiment is not particularly limited, and may be a conventional structure of a metal package shell in the prior art, for example, the metal shell is a flat plate package shell or a shallow cavity package shell, and the detailed description may refer to the first embodiment and will not be repeated.
EXAMPLE III
The present embodiment provides a hybrid integrated circuit, which includes a circuit and the metal package housing for a hybrid integrated circuit described in the second embodiment, where the metal package housing includes a metal shell and a metal lid body that are hermetically matched, and the circuit is located in a cavity surrounded by the metal shell and the metal lid body. Referring to fig. 3 to 5, the metal shell specifically includes a base 31, the base 31 having a first surface facing the metal cover and a second surface facing away from the metal cover; a base sheet 33 (i.e., a substrate) is fixed to the first surface of the base 31 by an adhesive layer 32; a metal conductive tape 34 is disposed on the substrate 33. The first surface of the base 31 is provided with a blind hole 35, and the opening position of the blind hole 35 corresponds to the metal conduction band 34, especially can correspond to a region where the metal conduction band 34 is distributed densely.
Specifically, for the specific structure of the metal package housing, reference may be made to the relevant expressions in the first embodiment and the second embodiment, which are not repeated herein.
In this embodiment, the material of the base sheet 33 is not particularly limited, and may be an insulating substrate material commonly used in a hybrid integrated circuit, for example, the substrate materials listed in table 1. The adhesive material in this embodiment is not particularly limited, and may be, for example, an epoxy resin commonly used in the related art for a metal package. It will be appreciated that the shape and location of the adhesive layer 32 is such as to ensure that the substrate 33 is securely fixed to the first surface of the base 31 and to provide a seal between the substrate 33 and the base 31.
Specifically, the blind hole 35 is filled with inert gas, nitrogen gas, or air. For reasons of economy and general product performance requirements, nitrogen or air may generally be chosen. Of course, the air used should be clean air that meets the requirements of the semiconductor process.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. A method for manufacturing a metal packaging shell comprises a metal shell body, wherein the metal shell body comprises a base, the base is provided with a first surface and a second surface which are opposite, and the first surface is used for fixing a metal conduction band through a substrate; the manufacturing method is characterized by comprising the following steps: and a blind hole is formed in the first surface, and the position of the blind hole corresponds to the metal conduction band.
2. The method of claim 1, wherein the depth of the blind hole is controlled to be 33-67% of the thickness of the base.
3. The production method according to claim 1 or 2, further comprising: the step of determining the cross-sectional area of the blind hole along a line parallel to the base:
determining the actual distributed capacitance generated on the base and the distributed capacitance generated on the base in unit area before the blind holes are opened;
determining the effective area of a base capable of generating the distributed capacitance before the blind hole is formed according to the actual distributed capacitance and the distributed capacitance;
determining distributed capacitance and a distributed capacitance change value generated by arranging blind holes in unit area;
determining distributed capacitance to be reduced according to the target distributed capacitance and the actual distributed capacitance before the blind holes are formed;
determining the required effective area of the base according to the distributed capacitance required to be reduced and the change value of the distributed capacitance caused by the arrangement of the blind holes in unit area;
and determining the section area of the blind hole according to the effective area of the required base and the effective area of the base capable of generating distributed capacitance before the blind hole is formed and the available total area of the base.
4. The method of claim 3, wherein the total area available for the mount is the surface area available for holding a metal conduction band on the first surface of the mount minus the surface area on the substrate on which no metal conduction band is disposed.
5. A metal packaging shell is used for a hybrid integrated circuit and comprises a metal shell and a metal cover body, wherein the metal shell and the metal cover body can enclose to form a cavity for protecting a circuit; the circuit comprises a component and a metal conduction band connected with the component; the metal shell comprises a base, wherein the base is provided with a first surface and a second surface which are opposite, the first surface faces the cavity and is used for fixing a metal conduction band through a substrate; the metal conduction band is characterized in that a blind hole is formed in the first surface, and the position of the blind hole corresponds to the metal conduction band.
6. The metal package housing of claim 5, wherein the blind hole has a circular, polygonal or irregular cross-section along a direction parallel to the base.
7. The metal package housing of claim 5 or 6, wherein the depth of the blind hole is 33% to 67% of the thickness of the base.
8. The metal package housing of claim 5, wherein the metal shell is a flat plate package shell or a shallow cavity package shell.
9. A hybrid integrated circuit comprising a circuit and the metal package of any of claims 5-8, wherein the circuit comprises a component and a metal tape attached to the component, the metal tape being attached to the first surface of the base by a substrate.
10. The hybrid integrated circuit of claim 9, wherein the blind hole is filled with an inert gas, nitrogen, or air.
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