CN111459052A - Multifunctional vehicle bus simulation detection system and method - Google Patents
Multifunctional vehicle bus simulation detection system and method Download PDFInfo
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Abstract
The invention provides a multifunctional vehicle bus simulation detection system and a method, wherein a simulation function receives bus data and compares the bus data with a set port address to realize sending of simulation frame data, simulation of sent main frame data, slave frame data and state feedback data, the main frame data, the slave frame data and the state feedback data are all stored in an FIFO memory, the port address is stored in an RAM memory, the detection function carries out data acquisition on network communication waveforms of a multifunctional vehicle bus, the acquired data are sampled by taking bytes as units and setting of sampling frequency, L inux controls setting of a device port address, setting of sending of the main frame data, setting of sending of the slave frame data, setting of simulation frame data sending times, collection of network data, extraction of the network frame data to monitor the working state of the multifunctional vehicle bus, and state monitoring, fault diagnosis, consistency test and network quality judgment of the multifunctional train bus are realized through simulation and collection.
Description
Technical Field
The invention relates to the technical field of vehicle bus simulation and detection, in particular to a multifunctional vehicle bus simulation detection system and a multifunctional vehicle bus simulation detection method.
Background
The multifunctional vehicle bus MVB is used as a part of a train communication network TCN and is responsible for data communication of equipment in a carriage or a fixed vehicle group, has the advantages of strong real-time performance, high reliability, high data transmission speed, long transmission distance and the like, and is widely applied to high-speed rails and subways at present.
Through retrieval, the prior art related to the present application is patent document CN203069994U, and provides an MVB train device simulation system, which realizes the control of an MVB network card and the simulation of real MVB train device functions based on a Matlab/Simulink model, and the MVB train device simulation system includes: the simulation computer is used for simulating the functions of the real MVB train equipment; the MVB network card is connected with the simulation computer to realize communication with a real MVB or other MVB train equipment simulation systems; the MVB network card is provided with an MVB interface for accessing the simulation equipment into the MVB network; and the processor board card is connected with the simulation computer through the CPCI bus and drives the MVB network card driving program.
Disclosure of Invention
In view of the defects in the prior art, the invention aims to provide a multifunctional vehicle bus simulation detection system and method.
The invention provides a multifunctional vehicle bus simulation detection system, which comprises:
a simulation function module: receiving bus data, comparing the bus data with a set port address, and realizing sending simulation frame data, simulating sent main frame data and slave frame data, and state feedback data, wherein the main frame data, the slave frame data and the state feedback data are all stored in an FIFO memory, and the port address is stored in an RAM memory;
a detection function module: acquiring data of a network communication waveform of the multifunctional vehicle bus, wherein the acquired data are sampled at a set sampling frequency by taking bytes as units;
the L inux control module is used for setting the port address of the equipment, setting the sending of main frame data, setting the sending times of the sent auxiliary frame data, setting the sending times of the simulation frame data, collecting the network data and extracting the network frame data so as to monitor the working state of the multifunctional vehicle bus.
Preferably, the multifunctional vehicle bus simulation detection system further comprises a USB functional module, which realizes the interconversion between a USB communication protocol and the parallel bus.
Preferably, the L inux control module includes:
the simulation control module: setting a port address is realized by writing port address data of the simulation equipment into a port address RAM; setting transmission main frame data is realized by writing the simulation transmission main frame data into a main frame data FIFO; setting the transmission slave frame data by writing the simulated transmission slave frame data into the slave frame data FIFO; setting the sending times of the simulation frame data by reading the state FIFO data;
the acquisition and analysis module: the working state of the multifunctional vehicle bus is monitored by reading the waveform data in the acquired data storage FIFO, analyzing and then detecting any one or more of network frame data, frame response time, frame collision, clutter, frame loss, data bit errors and frame check errors.
Preferably, the simulation function module includes:
a receiving module: detecting a multifunctional vehicle bus signal in real time, sending a bus busy message when detecting a data frame starting signal, and sending a bus idle message when detecting a data frame ending signal; if the bus main frame data is received, comparing the bus main frame data with the port address, and triggering to send a slave frame signal if the bus main frame data and the port address are the same; if the main frame data needing to be sent exists, the main frame signal is triggered to be sent,
a sending module: receiving and transmitting the slave frame signal, reading the slave frame data FIFO for transmission, receiving and transmitting the master frame signal, reading the master frame data FIFO for transmission, and writing the master frame transmission success state and the slave frame transmission success state into the state feedback FIFO respectively after transmission and reception.
Preferably, the simulation control module includes:
a simulation sending main frame module: setting main frame data, calculating a check value according to the main frame data, performing data format conversion to form a shift output format, writing in a transmission FIFO, reading a state feedback FIFO, judging whether the main frame data is successfully transmitted, if the main frame data is not successfully transmitted, re-reading the state feedback FIFO, judging the transmission times, and if the set transmission times are not finished, re-writing in the transmission FIFO;
the simulation sending slave frame module: setting port address write port address RAM, setting slave frame data, calculating check value according to the slave frame data, converting the data format to form a shift output format, writing in a transmission FIFO, reading a state feedback FIFO, judging whether the slave frame data is successfully transmitted, if not, reading the state feedback FIFO again, judging the transmission times, and if not, writing the transmission FIFO again.
The invention provides a multifunctional vehicle bus simulation detection method, which comprises the following steps:
simulation function steps: receiving bus data, comparing the bus data with a set port address, and realizing sending simulation frame data, simulating sent main frame data and slave frame data, and state feedback data, wherein the main frame data, the slave frame data and the state feedback data are all stored in an FIFO memory, and the port address is stored in an RAM memory;
and a detection function step: acquiring data of a network communication waveform of the multifunctional vehicle bus, wherein the acquired data are sampled at a set sampling frequency by taking bytes as units;
l inux control steps, namely, setting the port address of the equipment, setting the data of the transmission main frame, setting the data of the transmission auxiliary frame, setting the transmission times of the simulation frame data, collecting the network data and extracting the network frame data so as to monitor the working state of the multifunctional vehicle bus.
Preferably, the multifunctional vehicle bus simulation detection method further comprises a USB function step of implementing interconversion between a USB communication protocol and a parallel bus.
Preferably, the L inux controlling step includes:
simulation control step: setting a port address is realized by writing port address data of the simulation equipment into a port address RAM; setting transmission main frame data is realized by writing the simulation transmission main frame data into a main frame data FIFO; setting the transmission slave frame data by writing the simulated transmission slave frame data into the slave frame data FIFO; setting the sending times of the simulation frame data by reading the state FIFO data;
a collection and analysis step: the working state of the multifunctional vehicle bus is monitored by reading the waveform data in the acquired data storage FIFO, analyzing and then detecting any one or more of network frame data, frame response time, frame collision, clutter, frame loss, data bit errors and frame check errors.
Preferably, the simulation function step includes:
a receiving step: detecting a multifunctional vehicle bus signal in real time, sending a bus busy message when detecting a data frame starting signal, and sending a bus idle message when detecting a data frame ending signal; if the bus main frame data is received, comparing the bus main frame data with the port address, and triggering to send a slave frame signal if the bus main frame data and the port address are the same; if the main frame data needing to be sent exists, the main frame signal is triggered to be sent,
a sending step: receiving and transmitting the slave frame signal, reading the slave frame data FIFO for transmission, receiving and transmitting the master frame signal, reading the master frame data FIFO for transmission, and writing the master frame transmission success state and the slave frame transmission success state into the state feedback FIFO respectively after transmission and reception.
Preferably, the simulation controlling step includes:
a step of simulating and sending a main frame: setting main frame data, calculating a check value according to the main frame data, performing data format conversion to form a shift output format, writing in a transmission FIFO, reading a state feedback FIFO, judging whether the main frame data is successfully transmitted, if the main frame data is not successfully transmitted, re-reading the state feedback FIFO, judging the transmission times, and if the set transmission times are not finished, re-writing in the transmission FIFO;
simulating the transmission slave frame: setting port address write port address RAM, setting slave frame data, calculating check value according to the slave frame data, converting the data format to form a shift output format, writing in a transmission FIFO, reading a state feedback FIFO, judging whether the slave frame data is successfully transmitted, if not, reading the state feedback FIFO again, judging the transmission times, and if not, writing the transmission FIFO again.
Compared with the prior art, the invention has the following beneficial effects:
1. and through simulation and acquisition, state monitoring, fault diagnosis, consistency test and network quality judgment of the multifunctional train bus are realized.
2. The research and development period of the vehicle-mounted equipment is shortened by simulating the data transmission process of the multifunctional train bus.
3. The method provides a technical means for network protocol analysis and equipment development, and provides reference for the popularization of MVB network application.
Drawings
Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:
FIG. 1 is a schematic diagram of a simulation function module;
FIG. 2 is a state transition diagram of a receiving module;
FIG. 3 is a state transition diagram of a sending module;
FIG. 4 is a schematic diagram of an acquisition structure of a detection function module;
FIG. 5 is a data analysis state transition diagram;
fig. 6 is a system architecture framework diagram.
Detailed Description
The present invention will be described in detail with reference to specific examples. The following examples will assist those skilled in the art in further understanding the invention, but are not intended to limit the invention in any way. It should be noted that it would be obvious to those skilled in the art that various changes and modifications can be made without departing from the spirit of the invention. All falling within the scope of the present invention.
The application provides an intelligent system based on an FPGA technology, a USB technology, a L inux operating system technology and a Python programming technology, the simulation of a plurality of functional nodes is concentrated in a simulation computer, an MVB network card is controlled through a Matlab/Simulink model, the functional simulation of the nodes is realized, and further simulation equipment and a system which are simple in structure, high in stability and easy in maintenance of software and hardware are obtained.
Example 1
The invention relates to a multifunctional vehicle bus simulation detection method, which comprises the following steps:
simulation function steps: receiving bus data, comparing the bus data with a set port address, and realizing sending simulation frame data, simulating sent main frame data and slave frame data, and state feedback data, wherein the main frame data, the slave frame data and the state feedback data are all stored in an FIFO memory, and the port address is stored in an RAM memory;
and a detection function step: acquiring data of a network communication waveform of the multifunctional vehicle bus, wherein the acquired data are sampled at a set sampling frequency by taking bytes as units;
USB function steps. . . . (ii) a
L inux control steps, namely, setting the port address of the equipment, setting the data of the transmission main frame, setting the data of the transmission auxiliary frame, setting the transmission times of the simulation frame data, collecting the network data and extracting the network frame data so as to monitor the working state of the multifunctional vehicle bus.
Wherein the L inux controlling step comprises:
simulation control step: setting a port address is realized by writing port address data of the simulation equipment into a port address RAM; setting transmission main frame data is realized by writing the simulation transmission main frame data into a main frame data FIFO; setting the transmission slave frame data by writing the simulated transmission slave frame data into the slave frame data FIFO; setting the sending times of the simulation frame data by reading the state FIFO data;
a collection and analysis step: the working state of the multifunctional vehicle bus is monitored by reading the waveform data in the acquired data storage FIFO, analyzing and then detecting any one or more of network frame data, frame response time, frame collision, clutter, frame loss, data bit errors and frame check errors.
The simulation function step comprises:
a receiving step: detecting a multifunctional vehicle bus signal in real time, sending a bus busy message when detecting a data frame starting signal, and sending a bus idle message when detecting a data frame ending signal; if the bus main frame data is received, comparing the bus main frame data with the port address, and triggering to send a slave frame signal if the bus main frame data and the port address are the same; if the main frame data needing to be sent exists, the main frame signal is triggered to be sent,
a sending step: receiving and transmitting the slave frame signal, reading the slave frame data FIFO for transmission, receiving and transmitting the master frame signal, reading the master frame data FIFO for transmission, and writing the master frame transmission success state and the slave frame transmission success state into the state feedback FIFO respectively after transmission and reception.
The simulation control step comprises:
a step of simulating and sending a main frame: setting main frame data, calculating a check value according to the main frame data, performing data format conversion to form a shift output format, writing in a transmission FIFO, reading a state feedback FIFO, judging whether the main frame data is successfully transmitted, if the main frame data is not successfully transmitted, re-reading the state feedback FIFO, judging the transmission times, and if the set transmission times are not finished, re-writing in the transmission FIFO;
simulating the transmission slave frame: setting port address write port address RAM, setting slave frame data, calculating check value according to the slave frame data, converting the data format to form a shift output format, writing in a transmission FIFO, reading a state feedback FIFO, judging whether the slave frame data is successfully transmitted, if not, reading the state feedback FIFO again, judging the transmission times, and if not, writing the transmission FIFO again.
Example 2
As shown in FIG. 6, the invention is a simulation and detection system of MVB multifunctional vehicle bus, the hardware structure comprises a simulation function FPGA chip, a waveform detection function FPGA chip and a USB control chip, the software structure comprises an embedded L inux system control module and L inux system internal control software, the simulation and MVB multifunctional vehicle bus simulation and detection system comprises two FPGA chips, a USB control chip, an embedded L inux system module and L inux system internal control software, the FPGA chip respectively realizes the simulation function and the MVB network signal acquisition function, the USB control chip realizes the function of mutual conversion between a USB communication protocol and a parallel bus, the embedded L inux system module realizes the data interaction between the control software and the FPGA chip through a USB interface and the function of data acquisition and storage, and the L inux system internal control software realizes the simulation control and the MVB network signal data analysis function.
The simulation function FPGA chip realizes logic functions including frame data sending, port address setting, sent main frame data and slave frame data setting, bus data receiving and port address comparison and sending state feedback, wherein a receiving module and a sending module are designed by adopting Verilog HD L language, the main frame and the slave frame data sent by simulation and the state feedback data are stored in respective FIFO memories (inside the FPGA), and the set port addresses are stored in the RAM memories (inside the FPGA).
The FPGA chip with the waveform detection function is used for carrying out data acquisition on the MVB network communication waveform, the sampling frequency is 24MHz, the sampled data takes bytes as a unit, the highest bit of the data is the level of a logic signal, and the lower seven bits of the data are represented as the period number of the signal width.
The L inux system internal control software is realized by Python language programming, and mainly completes the working functions of setting equipment port address, setting and sending main frame data, setting and sending auxiliary frame data, simulating the frame data sending times, collecting network data analysis, collecting network frame data extraction, collecting network quality analysis and system working state monitoring.
A simulation control program: the port address setting function is realized by writing port address data of the simulation equipment into a port address RAM; the main frame transmitting function is realized by writing the simulation transmission main frame data into the main frame data FIFO; the slave frame data is written into the slave frame data FIFO in a simulation mode, so that the slave frame data FIFO function is realized; the sending times of the simulation frame data are controlled by reading the state FIFO data;
collecting and analyzing programs: through reading the waveform data in the data storage FIFO, the data analysis can be analyzed: network frame data, frame response time, frame collision, clutter, frame loss, data bit errors, frame check errors and the like, so that the judgment on the network quality can be realized.
As shown in FIG. 1, the logic of the emulation function block includes: sending of frame data, setting of port addresses, sending of master and slave frame data, bus data reception and port address comparison, and feedback of sending status. The simulation function working method comprises the following steps:
1. the receiving module detects MVB bus signals in real time, when a data frame starting signal is detected, the busy bus is fed back to the sending module, and after a data frame ending signal is detected, the idle bus is fed back to the sending module;
2. when receiving the MVB bus main frame data, the receiving module compares the received data with the set port address, and when the comparison is the same, the sending module is triggered to send the slave frame data;
3. when the bus is idle, the sending module continuously detects the primary frame data FIFO, when the primary frame data to be sent exists, the sending module sends the primary frame data, and after the sending is finished, the state of successful sending of the primary frame is written into the state feedback FIFO;
4. reading the slave frame data FIFO when the sending module receives a trigger sending slave frame signal, if the slave frame data exist, sending the slave frame data by the sending module, and after the sending is finished, writing the successful sending state of the slave frame into the state feedback FIFO;
the receiving module in the simulation function detects a frame start bit, a frame end bit and main frame data on the MVB bus, and the data format of the MVB bus is as follows: the method comprises the following steps of starting bits, frame header sequences, frame data (including verification) + end bits, the bus transmission rate is 1.5Mbit/s, the data width of each bit is 667ns, a Manchester coding mode is adopted, and the specific coding mode is as follows:
data "1" encoding — high level of 1/2 × 667ns width + low level of 1/2 × 667ns width;
data "0" encoding-1/2 × 667ns wide low + 1/2 × 667ns wide high;
start bit encoding ═ 1/2 × 667ns wide high level +1/2 × 667ns wide low level;
a low level of the end bit coding width 667ns + (> = 667ns) a high level of the width;
in the invention, the logic sampling frequency of the MVB network signal is set to be 24MHz, namely the width of one-bit MVB data is 16 periods. Taking the number of cycles occupied by the level and the width of the logic signal as 8-bit analysis data elements, the most significant bit of the data is the level of the logic signal, and the seven lower bits are expressed as the number of cycles of the signal width, and converting the coded signal into the analysis data elements as follows:
start position 0x 08;
end bit 0x 10;
the main frame header sequence is 0x90+0x18+0x98+0x18+0x88+0x08+0x88+0x08+0x 88;
from frame header 0x88+0x08+0x88+0x08+0x88+0x18+0x98+0x18+0x 90;
the receiving module of the present invention is designed in a finite state machine mode, and the state transition diagram is shown in fig. 2:
s0: the data start of frame bit is received and after receiving the valid start of frame bit, the state transitions to S1 with the bus busy signal asserted. After receiving the effective frame end bit, the bus idle signal is effective;
s1: receiving a header sequence of a main frame, and after receiving an effective header of the main frame, transferring the state to S2, otherwise, transferring the state to S0;
s2: receiving the primary frame data, and after the primary frame data is successfully received, the state is transferred to S3, if a data bit error or a data check error occurs, the state is transferred to S0;
s3: receiving a frame end bit, receiving a valid frame end bit, and transitioning to S4 while the bus idle signal is valid, otherwise, transitioning to S4;
s4: the received master frame data is compared with the set port address data, and if the received master frame data is the same, the slave frame data signal is triggered to be sent, and the state is returned to S0.
And the transmitting module in the simulation function shifts and outputs 8-bit data from the highest bit to the lowest bit, wherein the shift frequency is 3 MHz. The frame data (byte unit) to be transmitted is coded and converted in the following way:
data "1" ═ 10 (two bits);
data "0" ═ 01 (two bits);
frame start bit is 0 xFE;
end-of-frame bit 0x 3F;
the header sequence of the main frame is 0xC7+0x 15;
from frame header 0xA8+0xE 3.
The sending module of the invention is designed in a finite state machine mode, and the state transition diagram is shown in figure 3:
s0: when the MVB bus is idle, the sending module detects the main frame FIFO, and after the valid main frame data is detected, the state is switched to S1; detecting the slave frame FIFO in a state where the transmission slave frame signal is valid, and after detecting valid slave frame data, the state proceeds to S3;
s1: reading and sending the main frame FIFO data, and after the end, switching to the state S2;
s2: writing the successful transmission state of the main frame into the state feedback FIFO, and returning the state to S0;
s3: reading and sending the slave frame FIFO data, and after the data is finished, switching to a state S4;
s4: the status of successful transmission of the slave frame is written to the status feedback FIFO and the status transitions back to S0.
Fig. 4 is a schematic diagram of an acquisition function structure, and an acquisition function working method is as follows:
1. the system operating frequency is 48MHz, and the sampling frequency is 24 MHz. In each sampling period, carrying out logic sampling on the MVB network waveform;
2. when the logic level changes, the previous level state and the continuous period number are recorded to form sampling data of one byte. Simultaneously, resetting the count and starting a new counting period;
3. when the level cycle number reaches 0x7F, the level state and the cycle number are recorded, and one byte of sampling data is formed. Simultaneously, resetting the count and starting a new counting period;
4. the network sampling data is stored into the data storage FIFO according to the principle of first-in first-out.
L inux software simulation in-system sends the main frame as follows:
the first step is as follows: setting main frame data and calculating a check value according to the main frame data;
the second step is that: data format conversion, converting the sending data into a shift output data format;
the third step: data is written into a transmission FIFO;
the fourth step: reading a state feedback FIFO;
the fifth step: judging whether the main frame is successfully transmitted, if not, the program is transferred to the fourth step;
and a sixth step: judging the sending times, and if the set sending times are not finished, transferring the program to the third step for execution;
the seventh step: the routine is ended.
L inux software emulation in-system send slave frame steps are as follows:
the first step is as follows: setting a port address and writing the port address into the RAM;
the second step is that: setting and sending slave frame data, and calculating a check value according to the slave frame data;
the third step: data format conversion, converting the sending data into a shift output data format;
the fourth step: data is written into a transmission FIFO;
the fifth step: reading a state feedback FIFO;
and a sixth step: judging whether the slave frame is successfully sent, if not, the program is switched to the fifth step;
the seventh step: judging the sending times, and if the set sending times are not finished, transferring the program to the fourth step for execution;
eighth step: the routine is ended.
L linux system software data analysis program, it through reading the collection data storage FIFO in the waveform data, data analysis, can be analyzed, network frame data, frame response time, collision frame, clutter, frame loss, data bit error and frame check error, so can realize the network quality judgment.
The data analysis method is as follows:
1. data less than 0x08, defined as "clutter" data;
2. the header sequence of the main frame is as follows: [144,24,152,24,136,8,136 ], starting from a frame header sequence:
[136,8,136,8,136,24,152,24,144]. When the frame header sequence is not satisfied, defining as a collision frame;
3. the waveform data corresponding to the normal frame data is: 136. 8, 144, 16, 24, other data defined as "data bit error";
4. the time interval between a master frame and a slave frame, defined as the "frame response time";
5. the master frame data is not followed by the slave frame data, and is defined as frame loss;
6. after a frame of data is completely received, a check value is calculated according to the type and the length of the frame of data, the received check data are compared, and if the two are inconsistent, the check value is defined as a check error.
The data analysis program of the invention adopts a finite state machine mode, and the state transition diagram is shown in figure 5:
s0: the system reads waveform data FIFO, the data are less than 0x08 and marked as 'clutter' data, and the data read from the initial bit are converted into an S1 state;
s1: buffering data from the start bit to the end bit, and switching to an S2 state;
s2: comparing the frame header sequences, if the frame header sequences are correct, correspondingly marking, and switching to an S3 state, otherwise, switching to an S21 state;
s3: converting the waveform data into a frame data format, if the data meets the standard, switching to an S4 state, otherwise, switching to an S21 state;
s4: comparing the frame data, if the frame data are identical, switching to the S5 state, otherwise, switching to the S21 state;
s5: calculating the frame interval time, and switching to an S21 state when the frame interval time exceeds a limit value, and switching to an S0 state when the frame interval time is normal;
s21: according to the last state, the judgment of frame collision, clutter, frame loss, data bit error and frame check error is carried out, and then the state is switched to the state S0.
The simulation and detection system of the invention provides an intelligent method for MVB network debugging, network equipment detection and maintenance, network equipment consistency test and network quality judgment. Meanwhile, a means is provided for network protocol analysis and equipment development, and reference is provided for popularization of MVB network application.
Those skilled in the art will appreciate that, in addition to implementing the systems, apparatus, and various modules thereof provided by the present invention in purely computer readable program code, the same procedures can be implemented entirely by logically programming method steps such that the systems, apparatus, and various modules thereof are provided in the form of logic gates, switches, application specific integrated circuits, programmable logic controllers, embedded microcontrollers and the like. Therefore, the system, the device and the modules thereof provided by the present invention can be considered as a hardware component, and the modules included in the system, the device and the modules thereof for implementing various programs can also be considered as structures in the hardware component; modules for performing various functions may also be considered to be both software programs for performing the methods and structures within hardware components.
The foregoing description of specific embodiments of the present invention has been presented. It is to be understood that the present invention is not limited to the specific embodiments described above, and that various changes or modifications may be made by one skilled in the art within the scope of the appended claims without departing from the spirit of the invention. The embodiments and features of the embodiments of the present application may be combined with each other arbitrarily without conflict.
Claims (10)
1. A multifunctional vehicle bus simulation detection system, characterized by comprising:
a simulation function module: receiving bus data, comparing the bus data with a set port address, and realizing sending simulation frame data, simulating sent main frame data and slave frame data, and state feedback data, wherein the main frame data, the slave frame data and the state feedback data are all stored in an FIFO memory, and the port address is stored in an RAM memory;
a detection function module: acquiring data of a network communication waveform of the multifunctional vehicle bus, wherein the acquired data are sampled at a set sampling frequency by taking bytes as units;
the L inux control module is used for setting the port address of the equipment, setting the sending of main frame data, setting the sending times of the sent auxiliary frame data, setting the sending times of the simulation frame data, collecting the network data and extracting the network frame data so as to monitor the working state of the multifunctional vehicle bus.
2. The multifunctional vehicle bus emulation detection system of claim 1, further comprising a USB functional module that implements a USB communication protocol to interconvert with the parallel bus.
3. The multifunction vehicle bus emulation detection system of claim 1, wherein said L inux control module comprises:
the simulation control module: setting a port address is realized by writing port address data of the simulation equipment into a port address RAM; setting transmission main frame data is realized by writing the simulation transmission main frame data into a main frame data FIFO; setting the transmission slave frame data by writing the simulated transmission slave frame data into the slave frame data FIFO; setting the sending times of the simulation frame data by reading the state FIFO data;
the acquisition and analysis module: the working state of the multifunctional vehicle bus is monitored by reading the waveform data in the acquired data storage FIFO, analyzing and then detecting any one or more of network frame data, frame response time, frame collision, clutter, frame loss, data bit errors and frame check errors.
4. The multifunction vehicle bus emulation detection system of claim 1, wherein the emulation function module comprises:
a receiving module: detecting a multifunctional vehicle bus signal in real time, sending a bus busy message when detecting a data frame starting signal, and sending a bus idle message when detecting a data frame ending signal; if the bus main frame data is received, comparing the bus main frame data with the port address, and triggering to send a slave frame signal if the bus main frame data and the port address are the same; if the main frame data needing to be sent exists, the main frame signal is triggered to be sent,
a sending module: receiving and transmitting the slave frame signal, reading the slave frame data FIFO for transmission, receiving and transmitting the master frame signal, reading the master frame data FIFO for transmission, and writing the master frame transmission success state and the slave frame transmission success state into the state feedback FIFO respectively after transmission and reception.
5. The multifunction vehicle bus emulation detection system of claim 3, wherein the emulation control module comprises:
a simulation sending main frame module: setting main frame data, calculating a check value according to the main frame data, performing data format conversion to form a shift output format, writing in a transmission FIFO, reading a state feedback FIFO, judging whether the main frame data is successfully transmitted, if the main frame data is not successfully transmitted, re-reading the state feedback FIFO, judging the transmission times, and if the set transmission times are not finished, re-writing in the transmission FIFO;
the simulation sending slave frame module: setting port address write port address RAM, setting slave frame data, calculating check value according to the slave frame data, converting the data format to form a shift output format, writing in a transmission FIFO, reading a state feedback FIFO, judging whether the slave frame data is successfully transmitted, if not, reading the state feedback FIFO again, judging the transmission times, and if not, writing the transmission FIFO again.
6. A multifunctional vehicle bus simulation detection method is characterized by comprising the following steps:
simulation function steps: receiving bus data, comparing the bus data with a set port address, and realizing sending simulation frame data, simulating sent main frame data and slave frame data, and state feedback data, wherein the main frame data, the slave frame data and the state feedback data are all stored in an FIFO memory, and the port address is stored in an RAM memory;
and a detection function step: acquiring data of a network communication waveform of the multifunctional vehicle bus, wherein the acquired data are sampled at a set sampling frequency by taking bytes as units;
l inux control steps, namely, setting the port address of the equipment, setting the data of the transmission main frame, setting the data of the transmission auxiliary frame, setting the transmission times of the simulation frame data, collecting the network data and extracting the network frame data so as to monitor the working state of the multifunctional vehicle bus.
7. The multifunctional vehicle bus emulation detection method of claim 1, further comprising a USB function step, implementing a USB communication protocol to parallel bus interconversion.
8. The multifunctional vehicle bus emulation detection method of claim 1, wherein said L inux controlling step comprises:
simulation control step: setting a port address is realized by writing port address data of the simulation equipment into a port address RAM; setting transmission main frame data is realized by writing the simulation transmission main frame data into a main frame data FIFO; setting the transmission slave frame data by writing the simulated transmission slave frame data into the slave frame data FIFO; setting the sending times of the simulation frame data by reading the state FIFO data;
a collection and analysis step: the working state of the multifunctional vehicle bus is monitored by reading the waveform data in the acquired data storage FIFO, analyzing and then detecting any one or more of network frame data, frame response time, frame collision, clutter, frame loss, data bit errors and frame check errors.
9. The multifunction vehicle bus emulation detection method of claim 1, wherein the emulation function step comprises:
a receiving step: detecting a multifunctional vehicle bus signal in real time, sending a bus busy message when detecting a data frame starting signal, and sending a bus idle message when detecting a data frame ending signal; if the bus main frame data is received, comparing the bus main frame data with the port address, and triggering to send a slave frame signal if the bus main frame data and the port address are the same; if the main frame data needing to be sent exists, the main frame signal is triggered to be sent,
a sending step: receiving and transmitting the slave frame signal, reading the slave frame data FIFO for transmission, receiving and transmitting the master frame signal, reading the master frame data FIFO for transmission, and writing the master frame transmission success state and the slave frame transmission success state into the state feedback FIFO respectively after transmission and reception.
10. The multifunction vehicle bus emulation detection method of claim 8, wherein the emulation control step comprises:
a step of simulating and sending a main frame: setting main frame data, calculating a check value according to the main frame data, performing data format conversion to form a shift output format, writing in a transmission FIFO, reading a state feedback FIFO, judging whether the main frame data is successfully transmitted, if the main frame data is not successfully transmitted, re-reading the state feedback FIFO, judging the transmission times, and if the set transmission times are not finished, re-writing in the transmission FIFO;
simulating the transmission slave frame: setting port address write port address RAM, setting slave frame data, calculating check value according to the slave frame data, converting the data format to form a shift output format, writing in a transmission FIFO, reading a state feedback FIFO, judging whether the slave frame data is successfully transmitted, if not, reading the state feedback FIFO again, judging the transmission times, and if not, writing the transmission FIFO again.
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