CN111458554A

CN111458554A - High-precision current monitoring circuit

Info

Publication number: CN111458554A
Application number: CN202010424547.XA
Authority: CN
Inventors: 李晴平; 曹天霖
Original assignee: Hangzhou Hongxin Microelectronics Technology Co ltd
Current assignee: Hangzhou Hongxin Microelectronics Technology Co ltd
Priority date: 2020-05-19
Filing date: 2020-05-19
Publication date: 2020-07-28
Anticipated expiration: 2040-05-19
Also published as: CN111458554B

Abstract

The invention realizes a wide-range and high-precision current monitoring circuit, which adjusts the voltages of a point D and a point E to be equal by introducing an AMP feedback circuit with an error amplifier, enables the voltages of a point B and a point C to be equal by the current mirror relationship of N1 and N2, and realizes the final high-precision current monitoring by two-way feedback.

Description

High-precision current monitoring circuit

Technical Field

The invention relates to the technical field of integrated circuits, in particular to a wide-range high-precision current monitoring circuit.

Background

For a high voltage current mode load, the circuit design for monitoring the current on the load is exemplified by APD (photo diode): an APD (photodiode) is an active current load, the actual current flowing through it is IAPD, and the current flowing through it is monitored, which is IMOUT. The traditional Current detection circuit containing a Current-mirror (mirror Current source) has no feedback link, and cannot realize high-precision detection in a wide range, so that IMOUT is IAPD.

Disclosure of Invention

In order to monitor the current more accurately, the invention provides a high-precision current monitoring circuit capable of realizing a wide range.

In order to achieve the purpose, the invention is realized by the following technical scheme:

a high-precision current monitoring circuit includes a conventional current monitoring circuit and an error amplifier AMP feedback circuit.

The traditional current monitoring circuit comprises PMOS tubes P1-P10, NMOS tubes N1 and N2, a Zener diode ZENER and a resistor R2. P5 source, P6 source, P9 source, ZENER cathode, R2 upper end, 5 devices are connected and connected to power supply BIAS. The P5 gate, the P6 gate, the P9 gate, the P8 source, the P4 source, and the lower end of R2 are connected to form a node a, the P5 drain, the P3 source, and the P4 gate are connected to form a node B, the P6 drain, the P8 gate, and the P7 source are connected to form a node C, the P7 gate, the P8 drain, the P10 gate, and the N2 drain are connected to form a node E, the N1 gate, and the N2 gate are connected to form a node F, the P9 drain, and the P10 source are connected to form a node G, the P4 drain, the N1 drain, and the N1 gate are connected, the N1 source, the N2 source, and the P2 source are connected, the P2 drain, the P2 gate, and the P2 source are connected, the P2 drain is connected to the lower end of R2, the P2 gate, the upper end of R2 is connected to the ZENER anode, the P2 drain is connected to the drain.

The error amplifier AMP feedback circuit comprises an error amplifier AMP, a resistor R3 and a resistor R4, wherein the upper end of the resistor R3 is connected with the drain electrode of the traditional current monitoring circuit P10 to form a node H, the lower end of the resistor R3, the upper end of the resistor R4 and the positive input end of the error amplifier AMP are connected to form a voltage feedback point VSAMP L E, the reverse input end of the error amplifier AMP is connected with a reference voltage V1P23, and the output of the error amplifier AMP is connected with the grid electrode of the P3 to form a node D.

The working principle of the invention is as follows: a high-precision current monitoring circuit has two more feedbacks compared with the traditional mirror structure. And the voltages of the point D and the point E are adjusted to be equal through an error amplifier AMP feedback circuit, the voltages of the point B and the point C are enabled to be equal through the mirror current mirror relationship of N1 and N2, and the final high-precision current monitoring is realized through two-path feedback. The circuit feeds back the IAPD current to the point A, then feeds back the point A to the point D, simultaneously feeds back the mirrors of N1 and N2 to the points E and F, feeds back the points E and F to the points B and C, and feeds back the point D to the point B, so that the voltages of the points B and C are consistent finally.

Compared with the prior art, the invention has the following advantages:

1. compared with the traditional current monitoring circuit, the current monitoring circuit has two more feedbacks, and the monitoring precision is greatly improved.

2. The operational amplifier adopted by the invention can reduce the gain to a certain extent by adding P11-P14 on the basis of the traditional operational amplifier, does not need compensation, and simultaneously avoids using high-voltage tubes for P8 and P9 by using a diode connection method of P11-P14, thereby saving the area.

3. The high-precision current monitoring circuit can realize high-voltage isolation: the stable voltage drop through the zenner tube is usually about 7V, and MOS tubes (not including AMP internal MOS tube) except P1, P3 and P7 are forced to work in a low voltage range of the voltage stabilizing voltage drop of which the potential difference is zenner.

Drawings

FIG. 1 is a schematic circuit diagram of a high precision current monitoring circuit of the present invention;

fig. 2 is a circuit diagram of an error amplifier AMP of a high-precision current monitoring circuit of the present invention.

Detailed Description

Embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

Example 1

As shown in FIG. 1, the high-precision current monitoring circuit comprises a PMOS tube P-P, an NMOS tube N, a Zener diode ZENER, an error amplifier AMP and a resistor R-R4, wherein the specific connection mode is that a P source electrode, a ZENER cathode and an R upper end are connected and connected with a power supply BIAS.P 5 grid electrode, a P source electrode and an R lower end are connected to form a node A, a P drain electrode, a P source electrode and a P grid electrode are connected to form a node B, a P drain electrode, a P grid electrode and a P source electrode are connected to form a node C, the error amplifier AMP output is connected with the P grid electrode to form a node D, the P grid electrode, the P drain electrode, the P grid electrode and the N drain electrode are connected to form a node E, the N grid electrode and the N grid electrode are connected to form a node F, the P drain electrode and the P source electrode are connected to form a node G, the resistor R upper end and the P drain electrode is connected with the P drain electrode to form a node H, the P drain electrode, the N drain electrode is connected to form a node AMP, the drain electrode, the N drain electrode, the P drain electrode, the N drain.

The specific working principle is as follows: high accuracy current monitoring is achieved by ensuring B, D to be consistent with C, E point voltages respectively. If IAPD is not equal to the current flowing through P9, the voltage of point D and point E is correspondingly adjusted through negative feedback of AMP, and finally the current flowing through point P5 is equal to the current flowing through point P9, namely the same potential is applied to point D and point E. In combination with the feedback of AMP, the mirror structure feedback of N1 and N2 makes the currents flowing through P4 and P8 equal, and the source terminals of P4 and P8 are connected together, so that the voltages at the point B and the point C are forced to be equal to ensure that the currents of N1 and N2 are equal.

IAPD increases so that the voltage at point a decreases, and since R2 is a fixed resistance, the current flowing through R2 increases, the voltage at point F increases, the voltage at point B decreases, and the sum of the currents flowing through N1 and N2 increases.

Further, P3 and P7 are understood as cascade tubes, further improving accuracy. Since the IAPD and IMOUT terminals are external ports, typically low voltage ports, the P3 and P7 also serve to isolate the high and low voltages.

Example 2

As shown in FIG. 2, the invented error amplifier AMP of a high-precision current monitor circuit of the present invention has four more PMOS transistors P11-P14 compared to a conventional operational amplifier. The source of the P11 is connected to a power BIAS, the grid of the P11, the drain of the P11 and the source of the P12 are connected, the grid of the P12, the drain of the P12 and the source of the P13 are connected, and the grid of the P13, the drain of the P13 and the source of the P14 are connected with other devices in the error amplifier in parallel to the output OUT. VDD and BIAS are low and high voltage power supply, respectively, Isink _ BIAS is current BIAS, PM7 and PM10 are high voltage PMOS.

Further, the four PMOS transistors P11-P14 of the error amplifier AMP of the invention reduce the switching gain of the operational amplifier by reducing the output resistance;

further, the four PMOS of the error amplifier AMP of the present invention P11 to P14 function as clamp protections P8 and P9. The gain of the operational amplifier cannot be too large, and if the gain is too large, output saturation is caused, so that the voltage at the point D is too high, and the current output capability of the circuit is influenced.

The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and improvements can be made without departing from the spirit of the present invention, and these modifications and improvements should also be considered as within the scope of the present invention.

Claims

1. The utility model provides a high accuracy current monitoring circuit, includes traditional current monitoring circuit, its characterized in that: further comprising an error amplifier AMP feedback circuit;

the conventional current monitoring circuit includes: PMOS tubes P1-P10, NMOS tubes N1 and N2, Zener diode ZENER, resistor R2, P5 source, P6 source, P9 source, ZENER cathode and the upper end of R2, wherein 5 devices are connected and connected with a power supply BIAS; the P5 gate, the P6 gate, the P9 gate, the P8 source, the P4 source, the lower end of R2 are connected to form a node a, the P5 drain, the P3 source, the P4 gate are connected to form a node B, the P6 drain, the P8 gate, the P7 source are connected to form a node C, the P7 gate, the P8 drain, the P10 gate, the N2 drain are connected to form a node E, the N1 gate, the N2 gate are connected to form a node F, the P9 drain, the P10 source are connected to form a node G, the P4 drain, the N1 drain, the N1 gate are connected, the N1 source, the N2 source, the P2 source are connected, the P2 drain, the P2 gate, the P2 source is connected, the P2 drain is connected to the lower end of R2, the upper end of the P2 gate, the R2 is connected to the ZENER anode, the P2 drain is connected to the drain of the external IAPD drain, the;

2. A high accuracy current monitoring circuit according to claim 1, wherein: compared with a conventional operational amplifier, the error amplifier AMP is provided with four more PMOS tubes P11-P14, a P11 source is connected to a power supply BIAS, a P11 grid electrode, a P11 drain electrode and a P12 source electrode are connected, a P12 grid electrode, a P12 drain electrode and a P13 source electrode are connected, and a P13 grid electrode, a P13 drain electrode and a P14 source electrode and other devices in the error amplifier are connected to an output OUT in parallel.

3. A high accuracy current monitoring circuit according to claim 1, wherein: the PMOS tubes P3 and P7 in the conventional current monitoring circuit are respectively connected to the IPAD end and the IMOUT end and can be cascade tubes.

4. A high accuracy current monitoring circuit according to claim 1, wherein: the monitored object may be an APD load or other types of current loads.