CN111435815B - Drive control system - Google Patents

Drive control system Download PDF

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Publication number
CN111435815B
CN111435815B CN201910028157.8A CN201910028157A CN111435815B CN 111435815 B CN111435815 B CN 111435815B CN 201910028157 A CN201910028157 A CN 201910028157A CN 111435815 B CN111435815 B CN 111435815B
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circuit
microprocessor
unit
drive
signal
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CN111435815A (en
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洪智铭
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Hella Shanghai Electronics Co Ltd
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Hella Shanghai Electronics Co Ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters

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  • Power Engineering (AREA)
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Abstract

The invention provides a drive control system, which comprises a programmable power supply, a control unit and a drive unit, wherein the control unit and the drive unit are connected with the programmable power supply, the programmable power supply supplies power for the control unit and the drive unit, the control unit is connected with the drive unit, the control unit outputs a pulse control signal to the input end of the drive unit, and the input end of the drive unit receives the pulse control signal to work and drive a next-stage circuit; the control unit comprises a first microprocessor, a second microprocessor and a pulse signal generating circuit. After the technical scheme is used, the technical problem that the high-power field effect transistor driving circuit is connected with the output when a programmable power supply is used for inputting at low voltage can be effectively solved, so that the MOS transistor at the high voltage side can be effectively controlled by the low voltage side, and meanwhile, the MOS transistor at the high voltage side can effectively and stably drive the next stage circuit.

Description

Drive control system
Technical Field
The invention relates to the field of drive control, in particular to a drive control system.
Background
The MOSFET has many advantages of fast switching speed, good conduction performance, high integration level, high flexibility, rich application scenes and the like, so that the MOSFET is widely applied to digital circuits and analog circuits, the MOSFET needs a driving circuit to drive the MOSFET to work, and the stability of the driving circuit directly influences the working performance of the MOSFET. The conventional driving circuits comprise a totem-pole circuit, a quasi-totem-pole circuit and an upgrading circuit based on an NMOS (N-channel metal oxide semiconductor) tube, but the circuits cannot efficiently and stably drive the MOSFET to work under various application scenes such as low-voltage input, wide-voltage input, double-voltage input and the like, and cannot enable the field effect tube to stably play a role to promote the next stage. Therefore, how to make the MOSFET function efficiently and stably in a plurality of comprehensive application scenarios such as low-voltage input, wide-voltage input, and dual-voltage input, etc. to drive the next stage becomes a problem to be solved urgently.
Disclosure of Invention
In order to overcome the technical defects, the invention aims to provide a drive control system. By using the drive control system, the MOSFET can be driven to work efficiently and stably under various comprehensive application scenes such as low-voltage input, wide-voltage input, double-voltage input and the like, and meanwhile, the next-stage circuit is promoted to work.
The invention discloses a drive control system, comprising: the programmable power supply supplies power to the control unit and the driving unit, the control unit is connected with the driving unit, the control unit outputs a pulse control signal to the input end of the driving unit, and the input end of the driving unit receives the pulse control signal to work and drive a next-stage circuit; the control unit comprises a first microprocessor, a second microprocessor and a pulse signal generating circuit, wherein the first microprocessor is connected with the driving unit and the second microprocessor, reads communication level signals of all components and circuits of the driving unit and outputs a first control signal to the second microprocessor according to the communication level signals; the second microprocessor is also connected with the driving unit and the pulse signal generating unit, reads power level signals of all components and circuits of the driving unit, generates a second control signal according to the power level signals and the first control signal, and outputs the second control signal to the input end of the pulse signal generating unit; and the input end of the pulse signal generating unit receives the second control signal, generates the pulse control signal and outputs the pulse control signal to the input end of the driving unit, and controls the driving unit to work.
Preferably, the control unit further comprises a temperature control device, the temperature control device is electrically insulated and connected with the driving unit, is electrically connected with the input end of the first microprocessor, and is used for measuring the real-time temperature of the driving unit, converting the real-time temperature into an electric signal and transmitting the electric signal to the first microprocessor, and the first microprocessor controls the temperature of the driving unit to be in a stable state.
Preferably, the control unit further includes a configurable base SBC, an input end of the configurable base SBC is connected to an output end of the programmable power supply, and receives a power input of the programmable power supply, and an output end of the configurable base SBC is connected to the first microprocessor and the second microprocessor, and supplies power to the first microprocessor and the second microprocessor and provides a watchdog signal.
Preferably, the control unit further includes a SEPIC circuit, an input end of the SEPIC circuit is connected to the configurable base, the configurable base supplies power to the SEPIC circuit, and an output end of the SEPIC circuit is connected to the first microprocessor and the second microprocessor, and provides a reference voltage signal to the first microprocessor and the second bit processor.
Preferably, the input terminal of the configurable base element is further connected to the output terminal of the first microprocessor, and the first microprocessor outputs an enable signal to the input terminal of the configurable base element; the input end of the SEPIC circuit is also connected with the output end of the first microprocessor, and the first microprocessor outputs an enabling signal to the input end of the SEPIC circuit.
Preferably, the control unit further comprises a first sampling circuit located between the second microprocessor and the driving unit.
Preferably, the control unit further comprises an ADC device located between the first sampling circuit and the second microprocessor.
Preferably, the pulse signal generating circuit is a PWM wave generating circuit, and the pulse control signal is a PWM pulse signal; the temperature control device is a temperature sensor.
Preferably, the driving unit includes: the pulse signal generating circuit comprises a current limiting device, an inverse totem-pole circuit, a current driving circuit, a voltage dividing circuit, a negative feedback circuit, a second sampling circuit and an MOSFET (metal-oxide-semiconductor field effect transistor), wherein the input end of the current limiting device is connected with the output end of the pulse signal generating circuit, and the output end of the current limiting device is connected with the input end of the inverse totem-pole circuit; the output end of the inverse totem-pole circuit is connected with the input end of the current driving unit; the output end of the current driving circuit is connected with the grid electrode of the MOSEFT to drive the MOSFET; one end of the voltage division circuit is connected with the programmable power supply, the other end of the voltage division circuit is grounded and is used for providing a voltage division reference of the pulse signal, the voltage division circuit comprises a voltage division point, and the voltage division point is connected with the other input end of the inverse totem-pole circuit; one end of the second sampling circuit is connected with the current driving circuit, the other end of the second sampling circuit is connected with the grid electrode of the MOSFET, the sampling unit comprises a sampling point, and the sampling point is connected with the negative feedback circuit and is used for sampling the grid electrode voltage of the MOSFET to the negative feedback circuit; one end of the negative feedback circuit is connected with the current driving circuit, and the other end of the negative feedback circuit is connected with the other input end of the inverse totem-pole circuit, and the negative feedback circuit is used for feeding back the grid voltage of the MOSFET to the inverse totem-pole circuit and limiting the grid voltage of the MOSFET.
Preferably, an acceleration circuit is further included between the output terminal of the current driving circuit and the gate of the MOSFET, for guaranteeing a time difference between the on and off of the MOSFET.
After the technical scheme is adopted, compared with the prior art, the method has the following beneficial effects:
1. the control unit ensures that the drive unit can stably drive the MOSFET to work under the conditions of low-voltage input, wide-voltage input and double-voltage input, thereby stably promoting the next-stage work;
2. the driving circuit realizes driving by clamping the output peak value of the grid voltage of the MOSFET and ensures stable output;
3. through the feedback and sampling circuit, the pulse signal waveform is corrected, and the switching-on and switching-off speed is high.
4. Real-time temperature control is realized, severe heating during short circuit is avoided, and reliability and safety are ensured.
Drawings
FIG. 1 is a schematic diagram of a drive control system according to a preferred embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a drive control system according to another preferred embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a drive control system according to another preferred embodiment of the present invention;
FIG. 4 is a schematic structural diagram of a drive control system according to another preferred embodiment of the present invention;
FIG. 5 is a schematic structural diagram of a drive control system according to another preferred embodiment of the present invention;
FIG. 6 is a schematic structural diagram of a drive control system according to another preferred embodiment of the present invention;
FIG. 7 is a schematic structural diagram of a drive control system according to another preferred embodiment of the present invention;
FIG. 8 is a schematic structural diagram of a drive control system according to another preferred embodiment of the present invention;
fig. 9 is a circuit diagram of a drive control system according to another preferred embodiment of the present invention.
Reference numerals:
1-programmable power supply
2-control Unit
3-drive unit
4-temperature sensor
5-configurable base part
6-SEPIC circuit
7-inverse totem-pole circuit
8-first current drive unit
9-second Current drive Unit
10-speed up circuit
11-negative feedback circuit
12-reset signal
13-OUTPUT
Detailed Description
The advantages of the invention are further illustrated in the following description of specific embodiments in conjunction with the accompanying drawings.
Fig. 1 is a schematic structural diagram of a driving control system according to a preferred embodiment of the present invention, where the driving control system includes a programmable power supply, a control unit connected to the programmable power supply, and a driving unit. The programmable power supply inputs a self-defined signal and supplies power to the control unit and the driving unit, the control unit is connected with the driving unit, the control unit outputs a pulse control signal to the input end of the driving unit, the input end of the driving unit receives the pulse control signal to work and drive the MOSFET, the MOSFET is a PMOS tube or an NMOS tube, and the MOSFET continues to promote the next-stage circuit to work. The control unit comprises a first microprocessor, a second microprocessor and a pulse signal generating circuit, the first microprocessor is a signal level processor MCU _1, is connected with the driving unit and the second microprocessor and is in communication connection with all components through a CANnase flash memory, the first microprocessor reads communication level signals of all components and circuits of the driving unit, including whether all the components work normally, whether current and voltage signals exist in all the circuits or lines and the like, and outputs a first control signal to the second microprocessor according to the specific condition of the obtained communication level signals. The first microprocessor can also control the working state of each component according to the acquired communication level signal output enable signal, so that stable output is realized, and the work of the driving circuit is controlled. The second microprocessor is a power level microprocessor MCU _2 and is connected with the driving unit and the pulse signal generating unit, reads power level signals of all components and circuits of the driving unit, including current and voltage and the like, generates a second control signal according to the power level signals and the received first control signal, outputs the second control signal to the input end of the pulse signal generating unit, and controls the amplitude, the frequency and the duty ratio of the pulse generating signal through the second control signal; and after the input end of the pulse signal generating unit receives the second control signal, the pulse signal generating unit generates the pulse control signal and outputs the pulse control signal to the input end of the driving unit to control the driving unit to work. When the MCU _1 and the MCU _2 read the signal level and the power level signal of the driving circuit, the current and voltage quantities of each component and each circuit of the driving circuit are not directly influenced, but the driving unit is controlled to stably work through the process, after all read logic signals or communication signals and power signals are input into the two microprocessors, the two MCUs respectively execute the functions of enabling signal voltage processing and generating square wave signals, the generated enabling signals are fed back to the front end for input again, and the generated enabling signals are output to the pulse signal generating unit after being integrated and processed to generate pulse control signals. The driving unit is an MOSFET driving circuit and drives the MOSFET to work.
Adopt the self-defined input of programmable power supply, compare traditional power input and more laminate actual circuit demand. The control unit monitors the drive circuit in real time and adjusts the first control signal, the second control signal and the working state of the components, so that stable pulse control signals are generated, reliable guarantee and real-time feedback monitoring are provided for realizing control and output of grid voltage in the next-stage drive circuit, the drive unit drives the MOSFET to work stably and effectively, the next-stage circuit is promoted to work, and the MOS tube with high grid voltage requirement driven by low-voltage PWM signals is realized.
Referring to fig. 2, a schematic structural diagram of a drive control system according to another preferred embodiment of the present invention is shown, in which the control unit of the drive control system further includes a temperature control device, the temperature control device is electrically insulated from the drive unit, and the drive control system includes a plurality of temperature measurement points, most of which are disposed in the drive unit, and preferably, a total of 30 temperature measurement points, 25 of which are disposed in the drive unit, are disposed in the drive system. So that the temperature of each part of the driving unit can be accurately measured. Meanwhile, the temperature control device is electrically connected with the input end of the first microprocessor, the measured real-time temperature of the driving circuit is converted into an electric signal and transmitted to the first microprocessor, the first microprocessor can control the working state of each component of the driving unit or the control unit to control the temperature of the driving unit to be in a stable state through outputting an enabling signal, and parameters of a pulse control signal, such as amplitude, frequency or duty ratio, can also be adjusted through adjusting the first control signal output to the MCU _2 to control the temperature of the driving circuit to be in a stable state. The temperature control means may be implemented by a temperature sensor or other temperature sensitive element. The temperature control device periodically converts the real-time temperature in the driving circuit into an electric signal and transmits the electric signal to the MCU _2, so that the temperature of the circuit is ensured to be in a normal controllable state.
Referring to fig. 3, in order to show a structural schematic diagram of a drive control system according to another preferred embodiment of the present invention, a control unit of the drive control system further includes a Configurable base part, where an input end of the Configurable base part is connected to an output end of the programmable power supply, receives a power input of the programmable power supply, generates a corresponding internal logic power supply, and an output end of the Configurable base part is connected to the first microprocessor and the second microprocessor, supplies power to the first microprocessor and the second microprocessor, and provides a watchdog signal.
Referring to fig. 4, a schematic structural diagram of a drive control system according to another preferred embodiment of the present invention is shown, where a control unit of the drive control system further includes a SEPIC circuit, an input terminal of the SEPIC circuit is connected to a configurable base, the configurable base supplies power to the SEPIC circuit, and an output terminal of the SEPIC circuit is connected to both the first microprocessor and the second microprocessor, and generates a sampling signal from a reference voltage provided by the ADC, and provides the reference voltage signal to the first microprocessor and the second microprocessor. The SEPIC circuit can effectively guarantee stable output of the MCU _1 and the MCU _2, and guarantee that the MCU _2 controls the pulse signal generating unit to output stable pulse control signals, so that the driving unit can drive the MOSFET more stably.
With continued reference to fig. 4, each of the configurable basic element and the SEPIC circuit has a module for receiving an enable signal (use/disable) from the MCU _1, the input end of the configurable basic element is connected to the first microprocessor, and receives the enable signal output by the MCU _1, the input end of the SEPIC circuit is also connected to the first microprocessor, and receives the enable signal output by the MCU _1, and the MCU _1 controls the operating states of the configurable basic element and the SEPIC circuit by outputting the enable signal. Except the configurable basic element and the SEPIC circuit, other elements can also be provided with modules which can receive enabling signals (used/forbidden) from the MCU _1 for power input, and the MCU _1 can control the on-off of the elements through outputting the enabling signals.
Referring to fig. 5, a schematic diagram of a driving control system according to another preferred embodiment of the present invention, the control unit further includes a first sampling circuit, which is located between the second microprocessor and the driving unit, and is used to sample all signals.
Referring to fig. 6, a schematic diagram of a driving control system according to another preferred embodiment of the present invention, the control unit further includes an ADC device, which is located between the first sampling circuit and the second microprocessor, and is used to digitize the sampling signal.
Continuing to refer to fig. 2, the pulse signal generating circuit is a PWM wave generating circuit, and the pulse control signal is a PWM pulse signal; the temperature control device is a temperature sensor. The temperature sensor is obtained by adhering the K-type thermocouple to a temperature point to be measured by using a heat-conducting adhesive. The thermocouple has high sensitivity to temperature change, low thermal conductivity and minimum dissipated energy. And the thermocouple is fixed on the temperature measuring point through the adhesive, so that the electric insulation connection is realized. During operation, the data log is used for carrying out data statistics on the real-time temperature of the data log, and the temperature change trend in the whole period can be observed. If the requirement on instantaneity is high, or only the temperature at a certain moment needs to be obtained, the infrared thermal imager can be used for photographing and reading. There was no significant error from the temperature measured by the thermocouple. The real-time temperature in the network circuit model is periodically transmitted to the MCU _1 through real-time temperature monitoring, so that the real-time temperature always conforms to the error range of the thermocouple, the temperature of the control circuit is in a normal controllable state, and the stability and reliability of operation are ensured.
Referring to fig. 7, a schematic structural diagram of a driving control system according to another preferred embodiment of the present invention is shown, in which a driving unit in the driving control system includes a current limiting device, an inverse totem pole circuit, a current driving circuit, a voltage dividing circuit, a negative feedback circuit, a second sampling circuit, and a MOSFET, where an input end of the current limiting device is connected to an output end of the pulse signal generating circuit, and an output end of the current limiting device is connected to an input end of the inverse totem pole circuit; the output end of the inverse totem-pole circuit is connected with the input end of the current driving unit; the output end of the current driving circuit is connected with the grid electrode of the MOSEFT to drive the MOSFET; one end of the voltage division circuit is connected with the programmable power supply, the other end of the voltage division circuit is grounded and is used for providing a voltage division reference of the pulse signal, and the voltage division circuit comprises a voltage division point which is connected with the other input end of the inverse totem-pole circuit; one end of the second sampling circuit is connected with the current driving circuit, the other end of the second sampling circuit is connected with the grid electrode of the MOSFET, the sampling unit comprises a sampling point, and the sampling point is connected with the negative feedback circuit and is used for sampling the grid electrode voltage of the MOSFET to the negative feedback circuit; and one end of the negative feedback circuit is connected with the current driving circuit, and the other end of the negative feedback circuit is connected with the other input end of the inverse totem-pole circuit, and is used for feeding back the grid voltage of the MOSFET to the inverse totem-pole circuit and limiting the grid voltage of the MOSFET.
Wherein the current limiting device may be a resistor; the reverse totem pole circuit is formed by connecting two opposite transistors in series, an upper tube is an NPN tube, a lower tube is a PNP tube, and bases of the NPN tube and the PNP tube are connected with a voltage division point of the voltage division circuit; the current driving circuit is divided into a first current driving circuit and a second current driving circuit, the first current driving circuit is connected with an NPN tube of the inverse totem pole circuit, and the second current driving circuit is connected with a PNP tube of the inverse totem pole circuit; the first current driving circuit and the first current driving circuit may be triode devices or integrated chips including variable resistors, NPN triodes, and linear drivers. The second sampling circuit can be composed of a first sampling resistor and a second sampling resistor, the sampling point is a connection point of the first sampling resistor and the second sampling resistor, the negative feedback circuit is composed of a triode device, a base of the negative feedback circuit is connected with the sampling point, an emitting electrode is connected with the current driving circuit, and a collecting electrode is connected with the other input end of the inverse totem pole.
Referring to fig. 8, a schematic structural diagram of a driving control system according to another preferred embodiment of the present invention, the driving unit in the driving control system further includes an acceleration circuit, which is located between the output terminal of the current driving circuit and the gate of the MOSFET, and is used to ensure the time difference between the on and off of the MOSFET. The accelerating circuit can be formed by a resistor or a resistor and a capacitor which are connected in parallel.
Referring to fig. 9, a circuit diagram of a drive control system according to another preferred embodiment of the present invention is shown, wherein a self-defined signal is input through a programmable power supply, on one hand, SBC configuration is introduced for generating a corresponding internal logic power supply, and on the other hand, an ADC and a SEPIC are connected for analog/digital signal conversion and sampling signal digital processing. After the generated logic signals and circuit control signals are input to the MCUs, the two MCUs respectively execute the functions of enabling signal voltage processing and generating square wave signals, the generated enabling signals are fed back to the front end for input again, and the integrated signals are output to the PWM generator to generate PWM pulse signals. The PWM pulse signal is connected with the inverted totem pole through the resistor after being input, so that the isolation and push-pull output are realized, the two driving current circuits are ensured not to be conducted simultaneously, and the resistor can effectively limit the current input of the driving current circuits. R2 and R3 provide the partial pressure benchmark of PWM input voltage through resistance partial pressure, can change the voltage waveform of output through changing the proportion of resistance, form comparatively steep or mellow waveform. When the driving current circuit is conducted, the direct minimum voltage drop between the corresponding output port and the grid electrode of the MOS to be tested is only about 0.3V between the collector electrode and the transmitter, and the voltage drop is greatly lower than that of a PN junction when the triode is conducted. R5 and R6 are input end feedback resistors, the voltage sampled by the grid voltage through a negative feedback device generates a strong negative feedback effect on the reverse end of the reverse totem pole through a negative feedback loop, so that the grid voltage is clamped in a limited range, meanwhile, feedback and sampling links are added in the control unit, MCU _1 and MCU _2 continuously detect and feed back signals of the driving unit in the whole process, the waveform is corrected, the circuit is ensured to be in a stable working state, the switching-on and switching-off speed is high, and therefore the driving unit can stably drive the MOSFET to work under low-voltage input, wide-voltage input and double-voltage input. The driving unit in the system is suitable for driving the PMOS, and when the NMOS is required to be driven, all components of the driving unit are only required to be mirrored.
It should be noted that the embodiments of the present invention have been described in terms of preferred embodiments, and not by way of limitation, and that those skilled in the art can make modifications and variations of the embodiments described above without departing from the spirit of the invention.

Claims (10)

1. A drive control system comprising: a programmable power supply, a control unit and a drive unit connected with the programmable power supply, wherein the programmable power supply supplies power for the control unit and the drive unit,
the control unit is connected with the driving unit, outputs a pulse control signal to the input end of the driving unit, and the input end of the driving unit receives the pulse control signal to work and drive a next-stage circuit; wherein,
the control unit comprises a first microprocessor, a second microprocessor and a pulse signal generating unit,
the first microprocessor is respectively connected with the driving unit and the second microprocessor, reads communication level signals of all components and circuits of the driving unit and outputs a first control signal to the second microprocessor according to the communication level signals;
the second microprocessor is also connected with the driving unit and the pulse signal generating unit respectively, reads power level signals of all components and circuits of the driving unit, generates a second control signal according to the power level signals and the first control signal, and outputs the second control signal to the input end of the pulse signal generating unit;
and the input end of the pulse signal generating unit receives the second control signal, generates the pulse control signal and outputs the pulse control signal to the input end of the driving unit, and controls the driving unit to work.
2. The drive control system of claim 1, wherein the control unit further comprises a temperature control device, the temperature control device is electrically isolated from the drive unit, the temperature control device is further electrically connected to an input terminal of the first microprocessor, and is used for measuring the real-time temperature of the drive unit and converting the real-time temperature into an electric signal to be transmitted to the first microprocessor, and the first microprocessor controls the temperature of the drive unit to be in a stable state.
3. The drive control system of claim 1, wherein the control unit further comprises a configurable base unit, an input of the configurable base unit is connected to an output of the programmable power supply to receive a power input of the programmable power supply, and an output of the configurable base unit is connected to the first microprocessor and the second microprocessor respectively to supply power to the first microprocessor and the second microprocessor and to provide a watchdog signal.
4. The drive control system of claim 3, wherein the control unit further comprises a SEPIC circuit, an input of the SEPIC circuit being connected to the configurable base, the configurable base powering the SEPIC circuit, an output of the SEPIC circuit being connected to the first microprocessor and the second microprocessor, respectively, to provide a reference voltage signal to the first microprocessor and the second microprocessor.
5. The drive control system of claim 4, wherein the input of the configurable base unit is further coupled to an output of the first microprocessor, the first microprocessor outputting an enable signal to the input of the configurable base unit; the input end of the SEPIC circuit is also connected with the output end of the first microprocessor, and the first microprocessor outputs an enabling signal to the input end of the SEPIC circuit.
6. The drive control system of claim 1, wherein the control unit further comprises a first sampling circuit located between the second microprocessor and the drive unit.
7. The drive control system of claim 6, wherein the control unit further comprises an ADC device located between the first sampling circuit and the second microprocessor.
8. The drive control system of claim 2,
the pulse signal generating unit is a PWM wave generating circuit, and the pulse control signal is a PWM pulse signal; the temperature control device is a temperature sensor.
9. The drive control system according to any one of claims 1 to 8, wherein the drive unit includes: a current limiting device, an inverse totem pole circuit, a current driving circuit, a voltage dividing circuit, a negative feedback circuit, a second sampling circuit and a MOSFET, wherein,
the input end of the current limiting device is connected with the output end of the pulse signal generating unit, and the output end of the current limiting device is connected with the input end of the inverse totem-pole circuit;
the output end of the inverse totem-pole circuit is connected with the input end of the current driving circuit;
the output end of the current driving circuit is connected with the grid electrode of the MOSEFT to drive the MOSFET;
one end of the voltage division circuit is connected with the programmable power supply, the other end of the voltage division circuit is grounded and is used for providing a voltage division reference of the pulse control signal, the voltage division circuit comprises a voltage division point, and the voltage division point is connected with the other input end of the inverse totem-pole circuit;
one end of the second sampling circuit is connected with the current driving circuit, the other end of the second sampling circuit is connected with the grid electrode of the MOSFET, the second sampling circuit comprises a sampling point, and the sampling point is connected with the negative feedback circuit and is used for sampling the grid electrode voltage of the MOSFET to the negative feedback circuit;
one end of the negative feedback circuit is connected with the current driving circuit, and the other end of the negative feedback circuit is connected with the other input end of the inverse totem-pole circuit, and the negative feedback circuit is used for feeding back the grid voltage of the MOSFET to the inverse totem-pole circuit and limiting the grid voltage of the MOSFET.
10. The drive control system of claim 9 further comprising a speed-up circuit between the output of the current drive circuit and the gate of the MOSFET for providing a time difference for turning the MOSFET on and off.
CN201910028157.8A 2019-01-11 2019-01-11 Drive control system Active CN111435815B (en)

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